CN103229240B - 用于共享集成电路装置中的内部电源的方法和设备 - Google Patents

用于共享集成电路装置中的内部电源的方法和设备 Download PDF

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Publication number
CN103229240B
CN103229240B CN201180056159.XA CN201180056159A CN103229240B CN 103229240 B CN103229240 B CN 103229240B CN 201180056159 A CN201180056159 A CN 201180056159A CN 103229240 B CN103229240 B CN 103229240B
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regulator
memory device
enable
terminal
chip package
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CN103229240A (zh
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P·吉利厄姆
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Examine Vincent Zhi Cai Management Co
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Examine Vincent Zhi Cai Management Co
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13005—Structure
    • H01L2224/13009—Bump connector integrally formed with a via connection of the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/0651—Wire or wire-like electrical connections from device to substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H01L2924/143—Digital devices
    • H01L2924/1434—Memory
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Semiconductor Integrated Circuits (AREA)
CN201180056159.XA 2010-11-23 2011-05-03 用于共享集成电路装置中的内部电源的方法和设备 Expired - Fee Related CN103229240B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US41643710P 2010-11-23 2010-11-23
US61/416437 2010-11-23
PCT/CA2011/000528 WO2012068664A1 (en) 2010-11-23 2011-05-03 Method and apparatus for sharing internal power supplies in integrated circuit devices

Publications (2)

Publication Number Publication Date
CN103229240A CN103229240A (zh) 2013-07-31
CN103229240B true CN103229240B (zh) 2015-05-20

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Country Status (6)

Country Link
US (2) US8625352B2 (enExample)
EP (1) EP2643835A1 (enExample)
JP (1) JP5623653B2 (enExample)
KR (1) KR20130140782A (enExample)
CN (1) CN103229240B (enExample)
WO (1) WO2012068664A1 (enExample)

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US8913443B2 (en) * 2011-09-19 2014-12-16 Conversant Intellectual Property Management Inc. Voltage regulation for 3D packages and method of manufacturing same
US9318186B1 (en) * 2014-12-31 2016-04-19 Nanya Technology Corporation DRAM wordline control circuit, DRAM module and method of controlling DRAM wordline voltage
TWI560718B (en) * 2015-03-27 2016-12-01 Silicon Motion Inc Data storage device and encoding method thereof
JP7685349B2 (ja) * 2021-03-18 2025-05-29 キオクシア株式会社 半導体記憶装置
US11816357B2 (en) * 2021-08-12 2023-11-14 Micron Technology, Inc. Voltage regulation distribution for stacked memory

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CN1190262A (zh) * 1996-05-30 1998-08-12 东芝株式会社 单片混合型半导体集成电路器件及其检查方法
US6031760A (en) * 1997-07-29 2000-02-29 Kabushiki Kaisha Toshiba Semiconductor memory device and method of programming the same
JP2002312306A (ja) * 2001-02-08 2002-10-25 Samsung Electronics Co Ltd 半導体メモリ装置及びメモリシステム
CN1838409A (zh) * 2005-01-05 2006-09-27 三星电子株式会社 具有不同类型的多芯片封装的存储模块
JP2006286048A (ja) * 2005-03-31 2006-10-19 Toshiba Corp 半導体記憶装置
US20080002490A1 (en) * 2006-06-30 2008-01-03 Hynix Semiconductor Inc. Semiconductor memory device with internal voltage generator and method for driving the same
CN101290896A (zh) * 2007-04-19 2008-10-22 矽品精密工业股份有限公司 可供堆叠的半导体装置及其制法

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US6750527B1 (en) * 1996-05-30 2004-06-15 Kabushiki Kaisha Toshiba Semiconductor integrated circuit device having a plurality of wells, test method of testing the semiconductor integrated circuit device, and test device which executes the test method
JP2003036673A (ja) * 2001-07-24 2003-02-07 Mitsubishi Electric Corp 半導体記憶装置
JP2003132679A (ja) * 2001-10-23 2003-05-09 Hitachi Ltd 半導体装置
US7466160B2 (en) * 2002-11-27 2008-12-16 Inapac Technology, Inc. Shared memory bus architecture for system with processor and memory units
JP4419049B2 (ja) * 2003-04-21 2010-02-24 エルピーダメモリ株式会社 メモリモジュール及びメモリシステム
JP4068616B2 (ja) * 2003-12-26 2008-03-26 エルピーダメモリ株式会社 半導体装置
KR100626385B1 (ko) 2004-09-13 2006-09-20 삼성전자주식회사 반도체 메모리 장치 및 그것을 포함하는 멀티칩 패키지
US20070170979A1 (en) * 2005-11-25 2007-07-26 Giovanni Campardo Charge pump systems and methods
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CN1190262A (zh) * 1996-05-30 1998-08-12 东芝株式会社 单片混合型半导体集成电路器件及其检查方法
US6031760A (en) * 1997-07-29 2000-02-29 Kabushiki Kaisha Toshiba Semiconductor memory device and method of programming the same
JP2002312306A (ja) * 2001-02-08 2002-10-25 Samsung Electronics Co Ltd 半導体メモリ装置及びメモリシステム
CN1838409A (zh) * 2005-01-05 2006-09-27 三星电子株式会社 具有不同类型的多芯片封装的存储模块
JP2006286048A (ja) * 2005-03-31 2006-10-19 Toshiba Corp 半導体記憶装置
US20080002490A1 (en) * 2006-06-30 2008-01-03 Hynix Semiconductor Inc. Semiconductor memory device with internal voltage generator and method for driving the same
CN101290896A (zh) * 2007-04-19 2008-10-22 矽品精密工业股份有限公司 可供堆叠的半导体装置及其制法

Also Published As

Publication number Publication date
WO2012068664A1 (en) 2012-05-31
JP2014501016A (ja) 2014-01-16
JP5623653B2 (ja) 2014-11-12
CN103229240A (zh) 2013-07-31
US20140119136A1 (en) 2014-05-01
HK1186569A1 (en) 2014-03-14
US9236095B2 (en) 2016-01-12
KR20130140782A (ko) 2013-12-24
US20120127798A1 (en) 2012-05-24
US8625352B2 (en) 2014-01-07
EP2643835A1 (en) 2013-10-02

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