CN103187383A - 一种肖特基二极管的封装结构 - Google Patents

一种肖特基二极管的封装结构 Download PDF

Info

Publication number
CN103187383A
CN103187383A CN2013100597713A CN201310059771A CN103187383A CN 103187383 A CN103187383 A CN 103187383A CN 2013100597713 A CN2013100597713 A CN 2013100597713A CN 201310059771 A CN201310059771 A CN 201310059771A CN 103187383 A CN103187383 A CN 103187383A
Authority
CN
China
Prior art keywords
metal framework
base metal
schottky diode
chip
draw
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2013100597713A
Other languages
English (en)
Inventor
陈钢全
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SHANDONG DIYI ELECTRONIC SCIENCE AND TECHNOLOGY Co Ltd
Original Assignee
SHANDONG DIYI ELECTRONIC SCIENCE AND TECHNOLOGY Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SHANDONG DIYI ELECTRONIC SCIENCE AND TECHNOLOGY Co Ltd filed Critical SHANDONG DIYI ELECTRONIC SCIENCE AND TECHNOLOGY Co Ltd
Priority to CN2013100597713A priority Critical patent/CN103187383A/zh
Publication of CN103187383A publication Critical patent/CN103187383A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005Shape
    • H01L2224/4007Shape of bonding interfaces, e.g. interlocking features
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005Shape
    • H01L2224/4009Loop shape
    • H01L2224/40095Kinked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8434Bonding interfaces of the connector
    • H01L2224/84345Shape, e.g. interlocking features
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8438Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/84385Shape, e.g. interlocking features
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848Bonding techniques
    • H01L2224/84801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1203Rectifying Diode
    • H01L2924/12032Schottky diode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

本发明一种肖特基二极管的封装结构,包括芯片、跳线和金属框架,金属框架包括间隔相对的一个基部金属框架和两个引出金属框架,芯片的下表面与基部金属框架的上表面相焊接,芯片上表面焊接跳线的一端,跳线的另一端焊接在引出金属框架的上表面,基部金属框架、引出金属框架之间和上方以及芯片、跳线的上方和外围均包覆有塑封体,基部金属框架和引出金属框架的下表面暴露在塑封体外,并且基部金属框架和引出金属框架均延伸有位于塑封体外的引脚。本发明的有益效果是:具有较高的散热效率,提高了可靠性,延长了使用寿命,提高了质量。

Description

一种肖特基二极管的封装结构
技术领域
 本发明涉及一种肖特基二极管的封装结构。
背景技术
目前,肖特基二极管的封装是关系到肖特基二极管性能的重要步骤,而现在的封装结构简单且不合理,尤其是散热性能差,这也影响到了肖特基二极管的使用寿命。而且在高温焊接芯片时,芯片容易发生旋转,增加了焊接难度。跳线在芯片上方的定位精度也不高,这些影响着产品的生产效率和质量。
发明内容
为解决以上技术上的不足,本发明提供了一种散热好、质量高的肖特基二极管的封装结构。
本发明是通过以下措施实现的:
本发明一种肖特基二极管的封装结构,包括芯片、跳线和金属框架,所
述金属框架包括间隔相对的一个基部金属框架和两个引出金属框架,所述芯片的下表面与基部金属框架的上表面相焊接,芯片上表面焊接跳线的一端,跳线的另一端焊接在引出金属框架的上表面,所述基部金属框架、引出金属框架之间和上方以及芯片、跳线的上方和外围均包覆有塑封体,基部金属框架和引出金属框架的下表面暴露在塑封体外,并且基部金属框架和引出金属框架均延伸有位于塑封体外的引脚。
上述基部金属框架的上表面设置有网格状的防移沟。
上述引出金属框架上表面设置有卡槽,所述跳线的端部设置有与卡槽相配合的凸块。
上述基部金属框架和引出金属框架相对的侧壁均为梯级形状且之间填充塑封体。
上述塑封体的长、宽、厚分别为5.4mm、4.0mm和1.1mm。
上述若干金属框架矩阵式排列连接为一体,包括20排,每排包括8个基部金属框架,每个基部金属框架相对设置有两个引出金属框架。
本发明的有益效果是: 
结构设计合理,具有较高的散热效率,提高了可靠性,延长了使用寿命;体积缩小,减少了占用空间;有效避免了高温焊接时的芯片在基部金属框架上的旋转,提升跳线在芯片上方的定位精度,提高了质量。
附图说明
图1 为本发明的正面结构示意图。
图2为本发明的反面结构示意图。
图3为本发明剖视结构示意图。
图4为本发明在生产中连为一体的金属框架。
其中:1塑封体,2基部金属框架,3引出金属框架,4引脚,5跳线,6芯片,7卡槽,8凸块。
具体实施方式
如图1、2、3、4所示,本发明一种肖特基二极管的封装结构,包括芯
片、跳线5和金属框架,金属框架包括间隔相对的一个基部金属框架2和两个引出金属框架3,芯片6的下表面与基部金属框架2的上表面相焊接,芯片6上表面焊接跳线5的一端,跳线5的另一端焊接在引出金属框架3的上表面,基部金属框架2、引出金属框架3之间和上方以及芯片6、跳线5的上方和外围均包覆有塑封体1,基部金属框架2和引出金属框架3的下表面暴露在塑封体1外,并且基部金属框架2和引出金属框架3均延伸有位于塑封体1外的引脚4。由于基部金属框架2和引出金属框架3的下表面暴露在塑封体1外,所以提高了芯片6的散热效率,延长了芯片6的使用寿命。同时塑封体1的长、宽、厚分别为5.4mm、4.0mm和1.1mm。封装的占位面积仅为26 mm2,较SMC封装小41%;高度只有1.1mm,仅为DPAK (TO252) 封装的一半。减少占用空间。
    基部金属框架2的上表面设置有网格状的防移沟。可有效避免高温焊接时的芯片6在基部金属框架2上的旋转。引出金属框架3上表面设置有卡槽7,跳线5的端部设置有与卡槽7相配合的凸块8。将跳线5的凸块8卡在卡槽7内再焊接,提升跳线5在芯片6上方的定位精度。基部金属框架2和引出金属框架3相对的侧壁均为梯级形状且之间填充塑封体1。有利于金属框架与塑封体1的结合,连接更加牢固。
在生产过程中,一般先加工出连为一体的金属框架,这些金属框架矩阵式排列连接为一体,包括20排,每排包括8个基部金属框架2,每个基部金属框架2相对设置有两个引出金属框架3。这样有效节省塑封时的黑胶用量,而且方便进行自动化生产方式。然后再进行自动印刷锡膏、自动固晶、自动点锡膏等工艺,最后将引脚4切断,成为一个一个的产品。
以上所述仅是本专利的优选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本专利技术原理的前提下,还可以做出若干改进和替换,这些改进和替换也应视为本专利的保护范围。

Claims (6)

1.一种肖特基二极管的封装结构,包括芯片、跳线和金属框架,所述金属框架包括间隔相对的一个基部金属框架和两个引出金属框架,所述芯片的下表面与基部金属框架的上表面相焊接,芯片上表面焊接跳线的一端,跳线的另一端焊接在引出金属框架的上表面,其特征在于:所述基部金属框架、引出金属框架之间和上方以及芯片、跳线的上方和外围均包覆有塑封体,基部金属框架和引出金属框架的下表面暴露在塑封体外,并且基部金属框架和引出金属框架均延伸有位于塑封体外的引脚。
2.根据权利要求1所述肖特基二极管的封装结构,其特征在于:所述基部金属框架的上表面设置有网格状的防移沟。
3.根据权利要求1所述肖特基二极管的封装结构,其特征在于:所述引出金属框架上表面设置有卡槽,所述跳线的端部设置有与卡槽相配合的凸块。
4.根据权利要求1所述肖特基二极管的封装结构,其特征在于:所述基部金属框架和引出金属框架相对的侧壁均为梯级形状且之间填充塑封体。
5.根据权利要求1所述肖特基二极管的封装结构,其特征在于:所述塑封体的长、宽、厚分别为5.4mm、4.0mm和1.1mm。
6.根据权利要求1所述肖特基二极管的封装结构,其特征在于:若干金属
框架矩阵式排列连接为一体,包括20排,每排包括8个基部金属框架,每个基部金属框架相对设置有两个引出金属框架。
CN2013100597713A 2013-02-26 2013-02-26 一种肖特基二极管的封装结构 Pending CN103187383A (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2013100597713A CN103187383A (zh) 2013-02-26 2013-02-26 一种肖特基二极管的封装结构

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2013100597713A CN103187383A (zh) 2013-02-26 2013-02-26 一种肖特基二极管的封装结构

Publications (1)

Publication Number Publication Date
CN103187383A true CN103187383A (zh) 2013-07-03

Family

ID=48678475

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2013100597713A Pending CN103187383A (zh) 2013-02-26 2013-02-26 一种肖特基二极管的封装结构

Country Status (1)

Country Link
CN (1) CN103187383A (zh)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105227129A (zh) * 2015-09-22 2016-01-06 常州星海电子有限公司 高导热贴片旁路二极管
CN105261604A (zh) * 2015-11-11 2016-01-20 扬州扬杰电子科技股份有限公司 一种新型二极管模块的跳线
CN106160507A (zh) * 2016-07-01 2016-11-23 扬州虹扬科技发展有限公司 同向阵列式整流桥堆
CN106685339A (zh) * 2015-11-06 2017-05-17 泰科电子(上海)有限公司 光伏接线盒和二极管
CN107195610A (zh) * 2017-05-16 2017-09-22 四川旭茂微科技有限公司 一种新型整流桥的引线框架
EP3308396A4 (en) * 2015-06-10 2019-02-06 Vishay General Semiconductor LLC LADDER FRAME WITH CONDUCTIVE CLIP FOR MOUNTING A SEMICONDUCTOR CHIP WITH REDUCED CLIP SHIFT
CN113937009A (zh) * 2021-10-13 2022-01-14 重庆平伟伏特集成电路封测应用产业研究院有限公司 表贴式双面散热半导体功率器件的封装方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0217664A (ja) * 1988-07-06 1990-01-22 Hitachi Ltd レジンモールド型高周波用半導体装置およびその製造方法
CN1967825A (zh) * 2005-11-16 2007-05-23 汕尾德昌电子有限公司 表面贴装塑封二极管及其制造方法
CN201946585U (zh) * 2011-01-19 2011-08-24 南通富士通微电子股份有限公司 一种半导体功率器件封装结构
CN102254879A (zh) * 2011-07-05 2011-11-23 启东市捷捷微电子有限公司 一种大尺寸硅芯片采用塑料实体封装的可控硅及其封装工艺
CN203242617U (zh) * 2013-02-26 2013-10-16 山东迪一电子科技有限公司 一种肖特基二极管的封装结构

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0217664A (ja) * 1988-07-06 1990-01-22 Hitachi Ltd レジンモールド型高周波用半導体装置およびその製造方法
CN1967825A (zh) * 2005-11-16 2007-05-23 汕尾德昌电子有限公司 表面贴装塑封二极管及其制造方法
CN201946585U (zh) * 2011-01-19 2011-08-24 南通富士通微电子股份有限公司 一种半导体功率器件封装结构
CN102254879A (zh) * 2011-07-05 2011-11-23 启东市捷捷微电子有限公司 一种大尺寸硅芯片采用塑料实体封装的可控硅及其封装工艺
CN203242617U (zh) * 2013-02-26 2013-10-16 山东迪一电子科技有限公司 一种肖特基二极管的封装结构

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3308396A4 (en) * 2015-06-10 2019-02-06 Vishay General Semiconductor LLC LADDER FRAME WITH CONDUCTIVE CLIP FOR MOUNTING A SEMICONDUCTOR CHIP WITH REDUCED CLIP SHIFT
CN105227129A (zh) * 2015-09-22 2016-01-06 常州星海电子有限公司 高导热贴片旁路二极管
CN105227129B (zh) * 2015-09-22 2017-11-28 常州星海电子股份有限公司 高导热贴片旁路二极管
CN106685339A (zh) * 2015-11-06 2017-05-17 泰科电子(上海)有限公司 光伏接线盒和二极管
EP3166222B1 (en) * 2015-11-06 2023-05-10 Tyco Electronics (Shanghai) Co., Ltd. Photovoltaic junction box
CN105261604A (zh) * 2015-11-11 2016-01-20 扬州扬杰电子科技股份有限公司 一种新型二极管模块的跳线
CN106160507A (zh) * 2016-07-01 2016-11-23 扬州虹扬科技发展有限公司 同向阵列式整流桥堆
CN106160507B (zh) * 2016-07-01 2018-07-10 扬州虹扬科技发展有限公司 同向阵列式整流桥堆
CN107195610A (zh) * 2017-05-16 2017-09-22 四川旭茂微科技有限公司 一种新型整流桥的引线框架
CN113937009A (zh) * 2021-10-13 2022-01-14 重庆平伟伏特集成电路封测应用产业研究院有限公司 表贴式双面散热半导体功率器件的封装方法

Similar Documents

Publication Publication Date Title
CN103187383A (zh) 一种肖特基二极管的封装结构
CN203242617U (zh) 一种肖特基二极管的封装结构
CN109411588B (zh) 一种平行贴装led元件、透明显示屏模组及其生产方法
CN202616226U (zh) 一种to系列的功率二极管引线框架结构
CN106783762A (zh) 一种双芯片垂直并联方式的二极体封装结构和制造方法
CN202905703U (zh) 组合型小功率贴片两极管引线框架件
CN208352336U (zh) 一种具有倒装smd的led封装结构
CN202816923U (zh) 一种集成电路陶瓷封装外壳用的引线框架
CN202678303U (zh) 一种引线框架
CN204464275U (zh) 一种新型led灯丝的密封装置
CN204516751U (zh) 一种四方扁平无引脚型态封装的引线框结构与封装体结构
CN203536439U (zh) 手机摄像模组的cob封装结构
CN216563187U (zh) 一种贴片式发光二极管的封装结构
CN211150551U (zh) 厚薄铜片引线框架结构
CN102856216B (zh) 一种方形扁平无引脚封装焊片的方法
CN208767285U (zh) 一种双排结构内绝缘型塑封半导体器件
CN102403281A (zh) 一种高性能芯片封装结构
CN202905704U (zh) 组合型贴片式两极管引线框架件
CN203760458U (zh) 一种整流扁桥模块
CN204596772U (zh) 一种qfn后贴膜球焊压板
CN104835772A (zh) 一种qfn后贴膜球焊压板
CN111276590A (zh) 一种框架型支架结构led封装技术
CN109449125A (zh) 一种双排结构内绝缘型塑封半导体器件及其制造方法
CN205303508U (zh) 低热阻高光效大功率led灯珠
CN202651203U (zh) 一种金属片

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20130703