CN203242617U - 一种肖特基二极管的封装结构 - Google Patents

一种肖特基二极管的封装结构 Download PDF

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CN203242617U
CN203242617U CN2013200867008U CN201320086700U CN203242617U CN 203242617 U CN203242617 U CN 203242617U CN 2013200867008 U CN2013200867008 U CN 2013200867008U CN 201320086700 U CN201320086700 U CN 201320086700U CN 203242617 U CN203242617 U CN 203242617U
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metal framework
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陈钢全
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SHANDONG DIYI ELECTRONIC SCIENCE AND TECHNOLOGY Co Ltd
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    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
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    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005—Shape
    • H01L2224/4009—Loop shape
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8434—Bonding interfaces of the connector
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    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
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    • H01L2924/11—Device type
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Abstract

本实用新型一种肖特基二极管的封装结构，包括芯片、跳线和金属框架，金属框架包括间隔相对的一个基部金属框架和两个引出金属框架，芯片的下表面与基部金属框架的上表面相焊接，芯片上表面焊接跳线的一端，跳线的另一端焊接在引出金属框架的上表面，基部金属框架、引出金属框架之间和上方以及芯片、跳线的上方和外围均包覆有塑封体，基部金属框架和引出金属框架的下表面暴露在塑封体外，并且基部金属框架和引出金属框架均延伸有位于塑封体外的引脚。本实用新型的有益效果是：具有较高的散热效率，提高了可靠性，延长了使用寿命，提高了质量。

Description

一种肖特基二极管的封装结构
技术领域
本实用新型涉及一种肖特基二极管的封装结构。
背景技术
目前，肖特基二极管的封装是关系到肖特基二极管性能的重要步骤，而现在的封装结构简单且不合理，尤其是散热性能差，这也影响到了肖特基二极管的使用寿命。而且在高温焊接芯片时，芯片容易发生旋转，增加了焊接难度。跳线在芯片上方的定位精度也不高，这些影响着产品的生产效率和质量。
发明内容
为解决以上技术上的不足，本实用新型提供了一种散热好、质量高的肖特基二极管的封装结构。
本实用新型是通过以下措施实现的：
本实用新型一种肖特基二极管的封装结构，包括芯片、跳线和金属框架，所
述金属框架包括间隔相对的一个基部金属框架和两个引出金属框架，所述芯片的下表面与基部金属框架的上表面相焊接，芯片上表面焊接跳线的一端，跳线的另一端焊接在引出金属框架的上表面，所述基部金属框架、引出金属框架之间和上方以及芯片、跳线的上方和外围均包覆有塑封体，基部金属框架和引出金属框架的下表面暴露在塑封体外，并且基部金属框架和引出金属框架均延伸有位于塑封体外的引脚。
上述基部金属框架的上表面设置有网格状的防移沟。
上述引出金属框架上表面设置有卡槽，所述跳线的端部设置有与卡槽相配合的凸块。
上述基部金属框架和引出金属框架相对的侧壁均为梯级形状且之间填充塑封体。
上述塑封体的长、宽、厚分别为5.4mm、4.0mm和1.1mm。
上述若干金属框架矩阵式排列连接为一体，包括20排，每排包括8个基部金属框架，每个基部金属框架相对设置有两个引出金属框架。
本实用新型的有益效果是： 
结构设计合理，具有较高的散热效率，提高了可靠性，延长了使用寿命；体积缩小，减少了占用空间；有效避免了高温焊接时的芯片在基部金属框架上的旋转，提升跳线在芯片上方的定位精度，提高了质量。
附图说明
图1 为本实用新型的正面结构示意图。
图2为本实用新型的反面结构示意图。
图3为本实用新型剖视结构示意图。
图4为本实用新型在生产中连为一体的金属框架。
其中：1塑封体，2基部金属框架，3引出金属框架，4引脚，5跳线，6芯片，7卡槽，8凸块。
具体实施方式
如图1、2、3、4所示，本实用新型一种肖特基二极管的封装结构，包括芯
片、跳线5和金属框架，金属框架包括间隔相对的一个基部金属框架2和两个引出金属框架3，芯片6的下表面与基部金属框架2的上表面相焊接，芯片6上表面焊接跳线5的一端，跳线5的另一端焊接在引出金属框架3的上表面，基部金属框架2、引出金属框架3之间和上方以及芯片6、跳线5的上方和外围均包覆有塑封体1，基部金属框架2和引出金属框架3的下表面暴露在塑封体1外，并且基部金属框架2和引出金属框架3均延伸有位于塑封体1外的引脚4。由于基部金属框架2和引出金属框架3的下表面暴露在塑封体1外，所以提高了芯片6的散热效率，延长了芯片6的使用寿命。同时塑封体1的长、宽、厚分别为5.4mm、4.0mm和1.1mm。封装的占位面积仅为26 mm2，较SMC封装小41%；高度只有1.1mm，仅为DPAK (TO252) 封装的一半。减少占用空间。
    基部金属框架2的上表面设置有网格状的防移沟。可有效避免高温焊接时的芯片6在基部金属框架2上的旋转。引出金属框架3上表面设置有卡槽7，跳线5的端部设置有与卡槽7相配合的凸块8。将跳线5的凸块8卡在卡槽7内再焊接，提升跳线5在芯片6上方的定位精度。基部金属框架2和引出金属框架3相对的侧壁均为梯级形状且之间填充塑封体1。有利于金属框架与塑封体1的结合，连接更加牢固。
在生产过程中，一般先加工出连为一体的金属框架，这些金属框架矩阵式排列连接为一体，包括20排，每排包括8个基部金属框架2，每个基部金属框架2相对设置有两个引出金属框架3。这样有效节省塑封时的黑胶用量，而且方便进行自动化生产方式。然后再进行自动印刷锡膏、自动固晶、自动点锡膏等工艺，最后将引脚4切断，成为一个一个的产品。
以上所述仅是本专利的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本专利技术原理的前提下，还可以做出若干改进和替换，这些改进和替换也应视为本专利的保护范围。

Claims (6)

1.一种肖特基二极管的封装结构，包括芯片、跳线和金属框架，所述金属框架包括间隔相对的一个基部金属框架和两个引出金属框架，所述芯片的下表面与基部金属框架的上表面相焊接，芯片上表面焊接跳线的一端，跳线的另一端焊接在引出金属框架的上表面，其特征在于：所述基部金属框架、引出金属框架之间和上方以及芯片、跳线的上方和外围均包覆有塑封体，基部金属框架和引出金属框架的下表面暴露在塑封体外，并且基部金属框架和引出金属框架均延伸有位于塑封体外的引脚。
2.根据权利要求1所述肖特基二极管的封装结构，其特征在于：所述基部金属框架的上表面设置有网格状的防移沟。
3.根据权利要求1所述肖特基二极管的封装结构，其特征在于：所述引出金属框架上表面设置有卡槽，所述跳线的端部设置有与卡槽相配合的凸块。
4.根据权利要求1所述肖特基二极管的封装结构，其特征在于：所述基部金属框架和引出金属框架相对的侧壁均为梯级形状且之间填充塑封体。
5.根据权利要求1所述肖特基二极管的封装结构，其特征在于：所述塑封体的长、宽、厚分别为5.4mm、4.0mm和1.1mm。
6.根据权利要求1所述肖特基二极管的封装结构，其特征在于：若干金属框架矩阵式排列连接为一体，包括20排，每排包括8个基部金属框架，每个基部金属框架相对设置有两个引出金属框架。
CN2013200867008U 2013-02-26 2013-02-26 一种肖特基二极管的封装结构 Expired - Fee Related CN203242617U (zh)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103187383A (zh) * 2013-02-26 2013-07-03 山东迪一电子科技有限公司 一种肖特基二极管的封装结构
CN110098128A (zh) * 2019-05-16 2019-08-06 强茂电子(无锡)有限公司 半导体桥式整流器的制作方法
CN110137331A (zh) * 2019-05-15 2019-08-16 强茂电子(无锡)有限公司 表面贴装二极管的制作方法
DE102020109703A1 (de) 2020-04-07 2021-10-07 Infineon Technologies Ag Halbleitergehäuse und verfahren zu seiner herstellung

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103187383A (zh) * 2013-02-26 2013-07-03 山东迪一电子科技有限公司 一种肖特基二极管的封装结构
CN110137331A (zh) * 2019-05-15 2019-08-16 强茂电子(无锡)有限公司 表面贴装二极管的制作方法
CN110098128A (zh) * 2019-05-16 2019-08-06 强茂电子(无锡)有限公司 半导体桥式整流器的制作方法
DE102020109703A1 (de) 2020-04-07 2021-10-07 Infineon Technologies Ag Halbleitergehäuse und verfahren zu seiner herstellung

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