CN103180079B - 焊料转印基材的制造方法、焊料预涂方法、及焊料转印基材 - Google Patents

焊料转印基材的制造方法、焊料预涂方法、及焊料转印基材 Download PDF

Info

Publication number
CN103180079B
CN103180079B CN201180050882.7A CN201180050882A CN103180079B CN 103180079 B CN103180079 B CN 103180079B CN 201180050882 A CN201180050882 A CN 201180050882A CN 103180079 B CN103180079 B CN 103180079B
Authority
CN
China
Prior art keywords
solder
powder
charges
transfer substrate
adhesive layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201180050882.7A
Other languages
English (en)
Other versions
CN103180079A (zh
Inventor
樱井大辅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Intellectual Property Management Co Ltd
Original Assignee
Panasonic Intellectual Property Management Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Intellectual Property Management Co Ltd filed Critical Panasonic Intellectual Property Management Co Ltd
Publication of CN103180079A publication Critical patent/CN103180079A/zh
Application granted granted Critical
Publication of CN103180079B publication Critical patent/CN103180079B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/02Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
    • B23K35/0222Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
    • B23K35/0244Powders, particles or spheres; Preforms made therefrom
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00Soldering, e.g. brazing, or unsoldering
    • B23K1/20Preliminary treatment of work or areas to be soldered, e.g. in respect of a galvanic coating
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00Soldering, e.g. brazing, or unsoldering
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00Soldering, e.g. brazing, or unsoldering
    • B23K1/0008Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
    • B23K1/0016Brazing of electronic components
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00Soldering, e.g. brazing, or unsoldering
    • B23K1/20Preliminary treatment of work or areas to be soldered, e.g. in respect of a galvanic coating
    • B23K1/203Fluxing, i.e. applying flux onto surfaces
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00Soldering, e.g. brazing, or unsoldering
    • B23K1/20Preliminary treatment of work or areas to be soldered, e.g. in respect of a galvanic coating
    • B23K1/206Cleaning
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K3/00Tools, devices, or special appurtenances for soldering, e.g. brazing, or unsoldering, not specially adapted for particular methods
    • B23K3/06Solder feeding devices; Solder melting pans
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K3/00Tools, devices, or special appurtenances for soldering, e.g. brazing, or unsoldering, not specially adapted for particular methods
    • B23K3/06Solder feeding devices; Solder melting pans
    • B23K3/0607Solder feeding devices
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K3/00Tools, devices, or special appurtenances for soldering, e.g. brazing, or unsoldering, not specially adapted for particular methods
    • B23K3/06Solder feeding devices; Solder melting pans
    • B23K3/0607Solder feeding devices
    • B23K3/0623Solder feeding devices for shaped solder piece feeding, e.g. preforms, bumps, balls, pellets, droplets
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof
    • H05K3/3478Applying solder preforms; Transferring prefabricated solder patterns
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof
    • H05K3/3485Applying solder paste, slurry or powder
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00Articles made by soldering, welding or cutting
    • B23K2101/36Electric or electronic devices
    • B23K2101/42Printed circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/11001Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
    • H01L2224/11003Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for holding or transferring the bump preform
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/111Manufacture and pre-treatment of the bump connector preform
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/113Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/11332Manufacturing methods by local deposition of the material of the bump connector in solid form using a powder
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/118Post-treatment of the bump connector
    • H01L2224/1182Applying permanent coating, e.g. in-situ coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/118Post-treatment of the bump connector
    • H01L2224/1182Applying permanent coating, e.g. in-situ coating
    • H01L2224/11822Applying permanent coating, e.g. in-situ coating by dipping, e.g. in a solder bath
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/118Post-treatment of the bump connector
    • H01L2224/11848Thermal treatments, e.g. annealing, controlled cooling
    • H01L2224/11849Reflowing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/119Methods of manufacturing bump connectors involving a specific sequence of method steps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/1302Disposition
    • H01L2224/13022Disposition the bump connector being at least partially embedded in the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13144Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354Coating
    • H01L2224/1357Single coating layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354Coating
    • H01L2224/13599Material
    • H01L2224/136Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13601Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13609Indium [In] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354Coating
    • H01L2224/13599Material
    • H01L2224/136Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13601Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13611Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/94Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01327Intermediate phases, i.e. intermetallics compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0206Materials
    • H05K2201/0209Inorganic, non-metallic particles
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03Metal processing
    • H05K2203/0338Transferring metal or conductive material other than a circuit pattern, e.g. bump, solder, printed component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04Soldering or other types of metallurgic bonding
    • H05K2203/0425Solder powder or solder coated metal powder
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04Soldering or other types of metallurgic bonding
    • H05K2203/043Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24355Continuous and nonuniform or irregular surface on layer or component [e.g., roofing, etc.]
    • Y10T428/24372Particulate matter

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

提供一种焊料转印基材的制造方法,该焊料转印基材的制造方法不会破坏具有脆性的电介质膜的半导体元件的脆性的电介质膜,且相对于电子元器件或电路基板能可靠地形成合适厚度的焊料层。焊料转印基材的制造方法包括:在基材表面形成粘合层(2)的粘合层形成工序;在粘合层上以具有间隙的方式装载多个焊料粉(3),以形成焊料层的焊料层形成工序;以及将充填物(4)提供到形成在粘合层上的焊料粉的间隙中的充填物提供工序。

Description

焊料转印基材的制造方法、焊料预涂方法、及焊料转印基材
技术领域
本发明涉及焊料转印基材的制造方法、焊料预涂方法、及焊料转印基材。
背景技术
近年来,为了同时推进半导体元件的高密度化和电极端子的多引脚化,正谋求半导体元件的电极端子的间距狭窄化和面积缩小化。
通常,在倒装芯片安装中,在LSI等半导体元件的电极端子上形成焊料凸点等突起电极,将该半导体元件面朝下地压接在安装基板的连接端子上,并进行加热来使预先形成在端子上的焊料层熔化,从而使其连接来进行安装。
但是,由于间距狭窄化获得了显著的进展,以往那样将电极端子以1列或2列交错状地配置在外周部的方法中,有时在电极端子之间会发生短路,或因半导体元件与安装基板之间的热膨胀系数之差而产生连接不良等。因此,至今采用将电极端子配置成面状来扩大电极端子之间间距的方法,但是,近年来,即使进行面状配置,间距还是显著变窄,因而,对于半导体元件、安装基板的电极端子上的焊料形成技术有严格的要求。
以往,作为电极端子上的焊料形成技术,使用镀敷法或丝网印刷法、植球法等,然而,尽管镀敷法适用于间距狭窄的情况,但工序复杂、设备线大型化,因此,在生产率方面存在问题。
此外,虽然丝网印刷法和植球法在生产率方面优异,但使用了掩模,因此难以应对间距狭窄化。
在这样的情况下,近年来,提出有几项在LSI元件的电极端子、电路基板的连接端子上选择性地形成焊料的技术(例如,参照专利文献1)。这些技术不仅适用于细微凸点的形成,还能一次性形成焊料层,生产率也优异,因此,正不断受到关注。
作为上述技术,专利文献1提出的技术中,首先,将由在表面形成有氧化膜的焊料粉末与助焊剂的混合物形成的焊料糊料涂布到形成有连接端子的电路基板的整个面上。然后,在此状态下对电路基板进行加热,从而使焊料粉熔融,来在连接端子上选择性地形成焊料层,以使得在相邻的连接端子之间不发生短路。
然而,在该焊料层形成方法中,由于电极端子之间较为狭窄,因此,即使在焊料糊料熔融之后进行清洗,电极端子之间还会残留未熔融的焊料粉和助焊剂成分,在倒装芯片安装之后的使用环境中,存在发生桥接不良、迁移不良这样的问题。
作为解决上述问题的方法,提出有一种将附着有焊料粉的支承体重叠在半导体元件、电路基板上,并进行加热、加压,从而使焊料粉选择性地附着在电极端子上的焊料形成技术(例如,参照专利文献2)。
图8(a)~(e)是专利文献2提出的实施方式中的形成焊料层(预涂)的工序的说明图。以下说明该工序。
首先,将粘合剂52涂布到支承体51的单面上(图8(a))。
接下来,将粉末焊料53以掩盖粘合剂52的程度撒在涂布在支承体51上的粘合剂52上(图8(b))。
此后,用刷子54将支承体51上的粉末焊料53刷均匀,并除去未粘在粘合剂52上的多余的粉末焊料53(图8(c))。
另一方面,用助焊剂喷雾机57将液状助焊剂58涂布在工件55的形成有焊接部56的面上(图8(d))。
接下来,使工件55的助焊剂涂布面与支承体51的粉末焊料粘合面重叠。此时,利用未图示的冲压机从支承体51的上方对工件55与支承体51间施加压力。于是,由于粘合剂52具有跟随性,因此,若对支承体51施加压力,则粘在粘合剂52上的粉末焊料53与焊接部56接触(图8(e))。
然后,若利用未图示的加热装置对工件55与支承体51重叠而成的结构体进行加热加压,则粉末焊料53在焊接部56的界面进行扩散接合。然后,若在冷却之后从工件55上除去支承体51,则在焊接部56的界面进行扩散接合的粉末焊料53会残留在焊接部56上,而抗蚀剂59上的粉末焊料53会与支承体51一起被除去。
此后,在回流炉中使焊接部56上的粉末焊料53熔融,从而在电极端子上形成焊料层。
根据该焊料层形成方法,即使在间距狭窄的电极端子上也能形成焊料,无需如电镀那样要求大型的设备线和复杂的工序,能以较高的生产率来简单地进行生产。
现有技术文献
专利文献
专利文献1:日本专利特开2000-094179号公报
专利文献2:国际公开WO2006/067827
发明内容
然而,若将上述那样的专利文献2的焊料形成技术用于使用低介电常数膜作为层间绝缘膜的半导体元件、形成有脆性的电极端子的电路基板,则在剥离焊料转印基材(焊料附着支承体)时,存在低介电常数膜、电极焊盘发生剥离这样的问题。
以应对近年来所要求的布线规则的细微化、高速信号处理为目的,开始对半导体元件的层间绝缘膜使用低介电常数膜(所谓的low-k膜、ULK(UltraLow-k:超低介电常数)膜等)。为了降低介电常数,低介电常数膜本身呈具有许多数nm的空孔的多孔状(低介电常数的密度例如为1.0~1.4g/cm3)。
图9(a)及(b)示出了示意性表示使用上述专利文献2的焊料形成技术在具有该脆性的低介电常数膜的半导体元件上的电极端子上形成焊料层的工序的放大剖视图。
如图9(a)所示的那样,在将焊料粉附着支承体(焊料转印基材65)按压在具有突起电极68的半导体元件66上并进行加热的工序中,粘合剂62与突起电极68彼此粘接。
粘合剂62与突起电极68之间的粘接强度会高于焊盘下侧的界面强度,因此,如图9(b)所示,在剥离焊料转印基材65的工序中,会出现从焊盘下侧的脆性的低介电常数膜67处发生剥离这样的问题。
此外,在安装时基板的翘曲较大的情况下,需要将焊料层形成得较厚以吸收翘曲,并且,使相邻的焊料粉63彼此接触而无间隙地进行铺满来形成焊料转印基材。
但是,在此情况下,在将焊料转印基材按压在半导体元件上并进行加热的工序中,焊料发生熔融,不仅焊料与突起电极进行相互扩散,而且相邻的焊料整体发生熔融而扩散,突起电极上的焊料与抗蚀剂上的焊料以相连的状态进行凝固。因此,在剥离焊料转印基材的工序中,存在会在焊料、粘合层界面发生剥离,焊料层不仅残留在突起电极上,而且还残留在抗蚀剂上,从而产生短路不良的问题。
此外,在由硅构成的电路基板上,在形成有由与Si的粘接力较弱的Cu所构成的电极焊盘的电路基板等中,在使用上述专利文献2的焊料形成技术形成焊料层时,与上述情况相同,在剥离焊料转印基材时,脆性的金属焊盘会从电路基板发生剥离。
鉴于上述问题,本发明的目的在于提供一种相对于具有脆性的部分的半导体元件等电子元器件、电路基板,能可靠地形成厚度合适的焊料层的焊料转印基材的制造方法、焊料预涂方法、及焊料转印基材。
解决技术问题所采用的技术方案
为了解决上述课题,本发明的第一方面是焊料转印基材的制造方法,包括:
在基材表面上形成粘合层的粘合层形成工序;
在所述粘合层上以具有间隙的方式装载多个焊料粉以形成焊料层的焊料层形成工序;以及
将充填物提供到所述焊料粉的所述间隙中的充填物提供工序。
此外,本发明的第二方面是焊料转印基材的制造方法,包括:
在基材表面上形成粘合层的粘合层形成工序;
在所述粘合层上以具有间隙的方式装载多个焊料粉以形成焊料层的焊料层形成工序;
以覆盖所述焊料粉的方式提供助焊剂的助焊剂提供工序;以及
将充填物提供到所述焊料粉的所述间隙的充填物提供工序。
此外,本发明的第三方面是焊料预涂方法,包括:
焊料接合工序,在该焊料接合工序中,将利用本发明的第一方面或第二方面的制造方法所制成的焊料转印基材、与具有在上方形成有电极的低介电常数层的工件,以形成有所述焊料层的面与形成有所述电极的面相对的方式进行重叠,并进行加热加压,使所述焊料粉与所述电极进行扩散接合;以及
转印基材剥离工序,在该转印基材剥离工序中,在冷却之后,将所述焊料转印基材从所述工件进行剥离。
此外,本发明的第四方面的焊料转印基材,包括:
基底层;
粘合层,该粘合层配置在所述基底层上;
焊料层,该焊料层以多个焊料粉具有间隙的方式配置在所述粘合层上;以及
充填物,该充填物配置在所述焊料粉的所述间隙中。
此外,本发明的第五方面是本发明的第四方面的焊料转印基材,所述充填物的粒径比所述焊料粉的粒径要小。
此外,本发明的第六方面是本发明第四方面或第五方面的焊料转印基材,所述充填物由相对于所述焊料粉不会浸润的材料构成。
此外,本发明的第七方面是本发明的第四方面至第六方面中的任一项所述的焊料转印基材,在所述焊料粉上形成有助焊剂的层。
此外,本发明的第八方面是本发明的第四方面至第七方面中的任一项所述的焊料转印基材,所述焊料层具有第一区域及第二区域,所述第一区域及所述第二区域中的所述焊料粉的密度不同。
此外,本发明的第九方面是本发明的第四方面至第八方面中的任一项所述的焊料转印基材,所述充填物的熔点比所述焊料粉的熔点要高。
[发明效果]
根据本发明,能提供一种相对于具有脆性部分的半导体元件等电子元器件、电路基板能可靠地形成厚度合适的焊料层的焊料转印基材的制造方法、焊料预涂方法、及焊料转印基材。
附图说明
图1(a)是示意性表示本发明的实施方式1中的焊料转印基材的剖视图,图1(b)是示意性表示本发明的实施方式1中的焊料转印基材的俯视图。
图2(a)~(d)是示意性表示本发明的实施方式1中的焊料转印基材的制造方法的剖视图。
图3(a)~(e)是示意性表示本发明的实施方式1中的、使用焊料转印基材的半导体装置的制造方法的剖视图及立体图。
图4(a)、(b)是示意性说明本发明的实施方式1中的、焊料转印基材的剥离工序的放大剖视图。
图5(a)~(e)是示意性说明本发明的实施方式2中的、焊料转印基材的制造方法以及使用该焊料转印基材的焊料转印方法的剖视图。
图6(a)~(c)是示意性表示使用本发明的实施方式2的焊料转印基材、来在电路基板电极上形成焊料涂层的制造方法的剖视图。
图7(a)是示意性表示本发明的实施方式3中的焊料转印基材的剖视图,图7(b)是示意性表示本发明的实施方式3中的焊料转印基材的俯视图。
图8(a)~(e)是现有的实施方式中的形成焊料层(预涂)的工序的说明图。
图9(a)、(b)是示意性表示利用现有的焊料形成技术在具有脆性的低介电常数膜的半导体元件上的电极端子上形成焊料层的工序的放大剖视图。
附图标记
1基底层
2粘合层
3焊料粉
4充填物
5焊料转印基材
6半导体元件
7低介电常数膜
8突起电极
9绝缘膜
10助焊剂(助焊剂材料)
11电路基板
12电极焊盘
13阻焊剂
15焊料转印基材
51支承体
52粘合剂
53粉末焊料
54刷子
55工件
56焊接部
57助焊剂喷雾机
58液状助焊剂
59抗蚀剂
62粘合剂
63粉末焊料
65焊料转印基材
66半导体元件
67低介电常数膜
68突起电极
具体实施方式
以下,参照附图对本发明的实施方式进行说明。
(实施方式1)
图1(a)及(b)是示意性表示本发明的实施方式1中的焊料转印基材的剖视图及俯视图。
如图1(a)所示的那样,本实施方式1的焊料转印基材5由以下构件构成:即,基底层1;配置在基底层1上的粘合层2;焊料层,该焊料层由多个焊料粉3形成,上述多个焊料粉3是以与粘合层2相粘接的方式来载放的;以及充填物4,该充填物4配置于以在相邻的焊料粉3之间具有间隙的方式配置在粘合层2上的焊料层的焊料粉3之间。而且,如图1(b)所示那样,充填物4配置在焊料粉3之间的平面的间隙中且配置在粘合层2上。
基底层1例如由聚对苯二甲酸乙二酯、聚萘二甲酸乙二醇酯、液晶聚合物、聚酰亚胺等薄膜基材所构成,其厚度为20~200μm。通过使用薄膜基材,在焊料转印基材剥离工序中,能在弯曲成任意角度时进行剥离,能降低施加到电极正下方的力,即使相对于更脆性的绝缘膜也能可靠地防止焊盘下侧的界面剥离。
粘合层2例如由丙烯酸类、硅类等粘合剂所构成。焊料粉3使用SnAgCu、SnAgBiIn、SnZnBi、Sn、In、SnBi等即可。
粘合层2的厚度能根据焊料粉3的直径而自由地设定。例如,在焊料粉3的直径为2~12μm时,将粘合层2的厚度设为5~100μm即可。
此外,对于充填物4,优选为在焊料熔融时焊料相对于填充物4不会发生浸润、不会发生扩散接合的物质。例如,能使用Al2O3、SiO2、MgO等无机充填物、Al、Fe等氧化膜较厚的金属、丙烯酸等树脂颗粒。例如,在焊料粉的填充率为70~80%时,将充填物4的直径设为0.1~1.5μm,将粉末填充率设为5~10%即可。
图2(a)~(d)是示意性表示本实施方式1中的、焊料转印基材5的制造方法的剖视图。以下,使用图2对焊料转印基材5的制造方法进行说明。
(1)准备上述的树脂薄膜等基底层1。也可对基底层1表面实施电晕放电处理、等离子处理、打底涂料涂布等用于提高粘合层的粘接强度的易粘接处理(图2(a))。
(2)通过粘贴粘合薄膜或涂布粘合剂来在基底层1上形成粘合层2(图2(b))。另外,该工序相当于本发明的粘合层形成工序的一个示例。
(3)从粘合层2的上方,使用筛网、空气喷射等方法撒落焊料粉3,从而使焊料粉3与粘合层2进行粘接。然后,为了在焊料粉3之间设置间隙,利用刷子、空气喷射等方式除去多余的焊料粉3(图2(c))。另外,该工序相当于本发明的焊料层形成工序的一个示例。
(4)进一步使用筛网、空气喷射等方法将充填物4撒落在焊料粉3上。通过该工序,微小的充填物4进入焊料粉3之间的间隙内,充填物4与粘合层2进行粘接。进一步利用空气喷射等除去附着在焊料粉3上的多余的充填物4(图2(d))。另外,该工序相当于本发明的充填物提供工序的一个示例。
经过以上的工序,完成本实施方式1的焊料转印基材5。
图3(a)~(e)是示意性表示使用本实施方式1中的焊料转印基材5的半导体装置的制造方法的剖视图。此处,示出了在形成为晶片的状态的半导体元件的电极上形成焊料的示例,在图3(a)~(e)所示的各工序的剖视图的左侧示出了各自对应的立体图。
以下,使用图3对本发明的实施方式1的半导体装置的制造方法进行说明。
如图3(a)所示的那样,在半导体元件6的内部形成有脆性的低介电常数膜(ExtremelyLowK:超低介电常数)7,在其最外表面上形成有例如由Au-Ni构成的突起电极8。此外,在半导体元件6表面的未形成有突起电极8的部分例如由氮化硅等绝缘膜9覆盖。
另外,此处,作为焊料形成的对象的半导体元件6只是本发明的工件的一个示例。
首先,将焊料转印基材5的形成有焊料层的面与突起电极8相对地进行重叠,并进行加热、加压。
于是,如图3(b)所示那样,粘合层2通过加热而软化,焊料粉3和充填物4埋入粘合层2中,而焊料粉3与突起电极8在突起电极8的界面进行相互扩散接合。焊料粉3相互之间存在间隔,粘合层2进入焊料粉3之间,因此,彼此相邻的焊料粉3不会因熔融而相连。
软化后的粘合层2经由充填物4与突起电极8上的未接合有焊料粉3的部分进行粘接。然后,冷却时,锚栓状地进入焊料粉3之间且与突起电极8相粘接的粘合层2成为固接状态。
接下来,如图3(c)所示那样,剥离焊料转印基材5。由于焊料粉3已经接合在突起电极8上,因此残留在突起电极8上。另一方面,由于焊料与粘合剂(粘合层2)之间的粘接强度大于粘合剂(粘合层2)与绝缘膜9之间的强度,因此,突起电极8之外的绝缘膜9上的焊料粉3被焊料转印基材5侧的粘合层2带走。由此,如图3(d)所示,成为突起电极8上接合有焊料粉3的状态。
然后,虽未图示,也可将助焊剂提供给表面,并放入回流炉,使焊料粉3完全熔融。通过熔融使焊料高度均匀,倒装芯片安装时能可靠地接合(图3(e))。
此处,对焊料转印基材5的剥离工序进行详细叙述。
图4(a)及图4(b)是示意性说明本实施方式1的焊料转印基材的剥离工序的剖视图的放大图。
如图4(a)所示,通过将充填物4填充到焊料转印基材5上的焊料粉3的间隙内,从而粘合层2与突起电极8进行粘接的面积减少,因此,突起电极8与粘合层2之间的粘接强度下降。此处,突起电极8与粘合层2之间的粘接强度小于焊盘下侧的界面强度,因此,在剥离焊料转印基材5时能抑制焊盘剥离、低介电常数膜7的剥离和开裂。
因此,如图4(b)所示,在剥离焊料转印基材5的工序中,能使得不会从脆性的低介电常数膜7处剥开而将焊料转印基材5剥离。
使用180°剥离试验法对焊料粉3熔融后的焊料转印基材5与Au-Ni电极之间的界面强度进行了测定,其结果是,以往不使用充填物时为10N/25mm,相比之下,根据本实施方式1,能降低到2N/25mm。
另外,优选充填物4的粒径比焊料粉3的粒径要小。这是由于,在充填物4的直径大于焊料粉3的直径时,能使降低焊料转印基材5与Au-Ni电极之间的界面强度的效果得到提高,但焊料转印到突起电极8的转印量减少,难以吸收安装时的翘曲。
另外,在图3(d)所示的焊料转印基材剥离工序之后,也可以使用纯水或乙醇、异丙醇、二醇醚等有机溶剂进行清洗。通过清洗,能可靠地除去残留在绝缘膜9表面的突起电极8之间的充填物4,能防止安装后残留在焊料接合部而产生焊料裂缝等这样的不良情况。不过,在充填物4的粒径相对于焊料粉3非常小的情况(例如,充填物粒径/焊料粉=1/20~1/10的情况)下,即使充填物4进入熔融焊料粉中也不会影响焊料粉3的物理特性,因此,也可不进行除去。
此外,即使对于将焊料粉3进行了密集填充的焊料转印基材5,通过填充充填物4,能防止邻接的焊料粉3的桥接,而且进一步减少粘合层2与突起电极8的粘接面积,因此,能降低焊料转印基材5与Au-Ni电极之间的界面强度,而且充填物4成为剥离的起点,具有更容易剥离这样的效果。作为将焊料粉进行了密集填充的焊料转印片材,例如,能使用焊料粉粒径10~20μm、焊料粉填充率80~85%、充填物直径1~2μm、充填物填充率5%。
此外,优选充填物4的熔点比焊料粉3的熔点要高。这是由于,若充填物4的熔点比焊料粉3的熔点要低,则在为了使焊料粉3与突起电极8进行扩散接合而进行加热时,充填物4会发生熔融,因此,使突起电极8与粘合层2之间的粘接强度降低的效果会变小。
如上所述,根据本实施方式1的焊料转印基材,即使在具有脆性的电介质膜的半导体元件中,也能使脆性的电介质膜不发生剥离、开裂,能可靠地形成焊料层。
(实施方式2)
图5(a)~(e)是示意性说明本发明的实施方式2中的、焊料转印基材的制造方法以及使用该焊料转印基材的焊料转印方法的剖视图。
(1)准备在实施方式1中进行了说明的树脂薄膜等基底层1。也可对基底层1表面实施电晕放电处理、等离子处理、底涂涂布等用于提高粘合层的粘接强度的易粘接处理(图5(a))。例如,对树脂薄膜使用厚度为20~50μm的聚酰亚胺。
(2)使用棒式涂布机、旋涂器、分配器、喷雾器等工具,或者使用层压机等将粘合薄膜粘贴在基底层1上,从而形成粘合层2(图5(b))。例如,将粘合层2的厚度设为10~30μm即可。另外,该工序相当于本发明的粘合层形成工序的一个示例。
(3)使用筛网、空气喷射等方法从粘合层2的上方撒落焊料粉3,从而使焊料粉3与粘合层2进行粘接。然后,为了在焊料粉3之间设置间隙,利用刷子、空气喷射等方式除去多余的焊料粉3,从而形成焊料层(图5(c))。例如,焊料粉3的粒径为5~12μm,组分由SnZnBi、Sn、SnBi、SnAgCu构成。另外,该工序相当于本发明的焊料层形成工序的一个示例。
(4)进一步使用喷射型点胶机、焊剂涂布器等,从焊料粉3的上方全面地涂布助焊剂10,从而形成助焊剂层(图5(d))。例如,将助焊剂层设为5~15μm即可。另外,该工序相当于本发明的助焊剂提供工序的一个示例。
(5)进一步使用筛网、空气喷射等方法将充填物4撒落在助焊剂层上。通过该工序,微小的充填物4进入焊料粉3之间的间隙内,充填物4与粘接层2进行粘接。进一步利用空气喷射等除去附着在焊料粉3上的多余的充填物4(图5(e))。例如,能将Al2O3、SiO2、MgO等无机充填物、Al、Fe等氧化膜较厚的金属、丙烯酸等树脂颗粒用作充填物4。例如,在焊料粉3的填充率为60~70%时,将充填物4的直径设为1~3μm,将粉末填充率设为10~20%即可。另外,该工序相当于本发明的充填物提供工序的一个示例。
经过以上的工序,完成本实施方式2的焊料转印基材15。
接下来,图6(a)~(c)是示意性表示使用本实施方式2的焊料转印基材15、来在电路基板电极上形成焊料涂层的制造方法的剖视图。
以下,使用图6对在电路基板电极上形成焊料涂层的制造方法进行说明。
如图6(a)所示,在由硅所构成的电路基板11的表面上设有表面布线层,该表面布线层由设置成面状配置的多个电极焊盘12、及对电极焊盘12之间进行连接的布线(未图示)所构成。此外,在表面布线层上以使电极焊盘12从表面露出的方式设有阻焊剂13,且该阻焊剂13比电极焊盘12的直径要大。
例如,表面布线层的层厚为12~18μm,并由Cu构成,尤其是电极焊盘12的直径为50μm,以100μm的间距设置。例如,阻焊剂13由感光性热固化树脂所构成,层厚形成为20μm,并与电极焊盘12的位置相对应地具有60μm的开口部,以使电极焊盘12露出。此外,对所露出的电极焊盘12的表面例如实施由水溶性预焊剂材料等构成的防锈处理(未图示)。
另外,在对焊料转印基材15加热、加压时,充填物4因压力和助焊剂10的对流而移动,因此,如图6(a)所示,撒落的充填物4的一部分附着在粘合层2的表面上。
另外,此处,作为焊料形成的对象的电路基板11相当于本发明的工件的一个示例。
如图6(b)所示,将本实施方式2的焊料转印基材15与这样的电路基板11相对地进行装载,并进行加热、加压。在该过程中发生以下的现象。
随着加热、加压,粘合层2的粘合剂发生软化,并且助焊剂材料10活性化。活性化的助焊剂材料10会去除焊料粉3表面及电路基板11的电极焊盘12表面上的氧化膜。
而且,若将温度提高到焊料粉3熔融的温度,则熔融的焊料粉3开始与去除了氧化膜的Cu进行扩散接合。此后,若冷却到常温,则原来熔融的焊料发生凝固,在焊料粉3与由Cu所构成的电极焊盘12之间形成金属间化合物。
另一方面,未发生反应而残留的助焊剂材料10浸渍在粘合层2中,其粘接强度比粘合层2本来所具有的粘接强度要强,与实施方式1相比,能使粘合层2与电极焊盘12更牢固地进行固接。但是,由于在粘合层2与电极焊盘12之间存在有许多充填物4,因此,与未添加充填物4的情况相比粘接强度下降。
例如,使用180°剥离(peel)试验对含有助焊剂的转印片材与Cu的粘接强度进行了测定,其结果是,充填物含有率为0%时为18~23N,而将充填物4添加15%,则能下降到4~6N。
使用本实施方式2那样的焊料转印基材15,在上述电路基板11上形成焊料层,其结果是,如图6(c)所示,即使对于与Si的粘接力较弱的Cu电极焊盘12,也能不剥离Cu电极焊盘12,就在电极焊盘12上形成由多个焊料粉3构成的焊料层。
另外,也可如图6(c)所示,在剥离焊料转印基材15之后,将第二助焊剂材料提供给电路基板11的表面,然后在回流炉内进行加热。通过追加该工序,电极焊盘12上的焊料粉3彼此熔融而与电极焊盘12进行扩散接合,从而形成焊料层。此时,由于焊料粉3与充填物4不会浸润,因此,充填物4会因熔融焊料的对流而被推出到焊料表面。然后,如果将上述电路基板11浸渍到溶剂或纯水槽中,一边加热一边施加超声波进行清洗,则能将焊料表面的充填物4与第二助焊剂材料一起除去。
如上所述,如果使用本实施方式2的焊料转印基材15,则即使是脆性的电极焊盘,也不会发生焊盘界面剥离,能可靠地形成焊料层。
(实施方式3)
图7(a)及图7(b)是示意性表示本发明的实施方式3中的焊料转印基材的剖视图及俯视图。
如图7(a)所示的那样,在基底层1的整个面上设置粘合层2,在粘合层2上粘接有焊料粉3和充填物4。此处,在粘合层2的表面,存在焊料粉3密集的区域和稀疏的区域。例如,在密集的区域中,焊料粉3的填充率为75~85%,而在稀疏的区域中则为0~15%。
在该示例中,如图7(b)所示那样,俯视时,外周部是焊料粉3密集的区域,内周部是稀疏的区域。
在将焊料转印基材应用于在外周部配置有1列或2列电极端子的半导体元件时,在没有电极端子的内周部不需要焊料粒子。
在这样的情况下,若使用图7所示那样的本实施方式3的焊料转印基材,则对于没有焊料而粘合剂与半导体元件表面直接进行粘接的区域,通过设置充填物4,能减少半导体元件表面与粘合剂的粘接面积,降低剥离强度。剥离焊料转印基材的强度随之下降,因此,即使对于焊料粉3密集的部分也能以较低的剥离强度进行剥离。
另外,在图7所示的结构中,焊料转印基材的粘合层2表面的周围部分相当于本发明的第一区域的一个示例,粘合层2表面的中央部分相当于本发明的第二区域的一个示例。
另外,此处,以沿着外周部的四个边配置有电极端子的半导体元件为例进行了说明,但是,例如在应用于仅沿着外周部的相对的两个边配置有电极端子的半导体元件时,仅对焊料转印基材的粘合层2表面的相对的两个边附近密集地配置焊料粉,将其他部分设为稀疏的区域即可。只要与作为对象的半导体元件等工件的电极配置相对应地将焊料粉形成密集的区域和稀疏的区域即可。
另外,各实施方式中,以具有脆性的低介电常数膜的半导体元件、以及具有相对于Si的粘接力较弱的Cu电极焊盘的电路基板为例进行了说明,但本发明的焊料转印基材及其制造方法并不限于上述结构,也可适用于具有脆性的膜或层、容易剥离的构件等表面具有脆性的部分的半导体元件、电路基板等。
如以上说明的那样,根据本发明的焊料转印基材及其制造方法,由于在焊料粉间的间隙且粘合剂上存在有充填物,因此,粘合剂与突起电极之间的粘接面积减少,能降低粘合剂与突起电极之间的强度,其强度会低于焊盘下侧的界面强度和脆性膜的破坏强度,因此,即使在剥离焊料转印基材的工序中,也能防止焊盘下侧的脆性的低介电常数膜、电极焊盘发生剥离。此外,焊料熔融时焊料粉彼此之间始终夹设有充填物,因此,即使以使得焊料粉彼此相接触的方式来无间隙地进行铺满,也能防止焊料短路不良的发生。
根据这样的焊料转印基材及其制造方法,对于具有低介电常数膜这样的脆性的膜的半导体元件等电子元器件、电路基板,能使得脆性的膜不会产生剥离、开裂,能可靠地形成合适厚度的焊料层。
此外,本发明的焊料转印基材及其制造方法是以在焊料粉之间的间隙且粘合剂上存在有充填物为特征的焊料转印基材及其制造方法,即使在间距狭窄的连接中也能实现较高的可靠性。
工业中的应用
本发明所涉及的焊料转印基材的制造方法、焊料预涂方法及焊料转印基材具有以下效果:即,能相对于具有脆性部分的半导体元件等电子元器件、电路基板,来可靠地形成合适厚度的焊料层,尤其适用于对间距不断变窄的半导体元件、具有由低介电常数材料等构成的层间绝缘膜的半导体元件等进行安装的安装领域。

Claims (7)

1.一种焊料预涂方法,其特征在于,包括:
焊料接合工序,在该焊料接合工序中,将利用焊料转印基材的制造方法所制成的焊料转印基材、与具有在上方形成有电极的低介电常数层的工件,以形成有焊料层的面与形成有所述电极的面相对的方式进行重叠,并在粘合层与所述电极进行粘接的面积因提供到焊料粉的间隙中的充填物而减少的状态下进行加热加压,使所述焊料粉与所述电极进行扩散接合,其中,所述焊料转印基材的制造方法包括在基材表面上形成所述粘合层的粘合层形成工序、在所述粘合层上以具有所述间隙的方式装载多个所述焊料粉以形成所述焊料层的焊料层形成工序、以及在所述焊料粉上撒落所述充填物、使所述充填物进入所述焊料粉的间隙内、将所述充填物与所述粘合层进行粘接、从而将所述充填物提供到所述焊料粉的所述间隙中的充填物提供工序;以及
转印基材剥离工序,在该转印基材剥离工序中,在冷却之后,以所述充填物为剥离的起点,将所述焊料转印基材从所述工件剥离。
2.如权利要求1所述的焊料预涂方法,其特征在于,
所述充填物的粒径比所述焊料粉的粒径要小。
3.如权利要求1所述的焊料预涂方法,其特征在于,所述充填物由相对于所述焊料粉不会浸润的材料所构成。
4.如权利要求1所述的焊料预涂方法,其特征在于,所述焊料层具有第一区域及第二区域,所述第一区域及所述第二区域中的所述焊料粉的密度不同。
5.如权利要求1所述的焊料预涂方法,其特征在于,所述充填物的熔点比所述焊料粉的熔点要高。
6.如权利要求1所述的焊料预涂方法,其特征在于,
包括以覆盖装载于所述粘合层上的所述焊料粉的方式提供助焊剂的助焊剂提供工序,
在所述充填物提供工序中,将所述充填物提供到提供有所述助焊剂的所述焊料粉的所述间隙中。
7.如权利要求6所述的焊料预涂方法,其特征在于,在所述焊料粉上形成有所述助焊剂的层。
CN201180050882.7A 2010-11-08 2011-08-25 焊料转印基材的制造方法、焊料预涂方法、及焊料转印基材 Expired - Fee Related CN103180079B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2010249576 2010-11-08
JP2010-249576 2010-11-08
PCT/JP2011/004731 WO2012063386A1 (ja) 2010-11-08 2011-08-25 はんだ転写基材の製造方法、はんだプリコート方法、及びはんだ転写基材

Publications (2)

Publication Number Publication Date
CN103180079A CN103180079A (zh) 2013-06-26
CN103180079B true CN103180079B (zh) 2016-03-30

Family

ID=46050559

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201180050882.7A Expired - Fee Related CN103180079B (zh) 2010-11-08 2011-08-25 焊料转印基材的制造方法、焊料预涂方法、及焊料转印基材

Country Status (6)

Country Link
US (1) US9027822B2 (zh)
JP (1) JP5536899B2 (zh)
KR (1) KR101530528B1 (zh)
CN (1) CN103180079B (zh)
TW (1) TWI517272B (zh)
WO (1) WO2012063386A1 (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6009350B2 (ja) * 2012-12-28 2016-10-19 花王株式会社 電子部品が接合した回路基板の製造方法
JP6042214B2 (ja) * 2013-01-15 2016-12-14 倉本 武夫 はんだバンプの製造方法とそれに用いる転写シートないし剥離シート
WO2014207835A1 (ja) * 2013-06-26 2014-12-31 千住金属工業株式会社 はんだボール供給方法、はんだボール供給装置およびはんだバンプ形成方法
WO2015068723A1 (ja) * 2013-11-05 2015-05-14 千住金属工業株式会社 はんだ転写シート
JP5944979B1 (ja) * 2014-12-26 2016-07-05 千住金属工業株式会社 はんだ転写シート、はんだバンプ及びはんだ転写シートを用いたはんだプリコート方法
US10625356B2 (en) 2015-02-11 2020-04-21 Alpha Assembly Solutions Inc. Electrical connection tape
KR102405231B1 (ko) * 2018-01-19 2022-06-03 엔씨씨 나노, 엘엘씨 열 취약성 기판 상에 솔더 페이스트를 경화시키는 방법
KR102422569B1 (ko) * 2019-12-27 2022-07-20 주식회사 아모그린텍 브레이징 리본 및 그 제조방법

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101084083A (zh) * 2004-12-20 2007-12-05 千住金属工业株式会社 焊料预涂方法及电子设备用工件
CN101142665A (zh) * 2005-03-29 2008-03-12 松下电器产业株式会社 倒装芯片封装方法及其焊锡点形成方法
CN101395976A (zh) * 2006-03-03 2009-03-25 松下电器产业株式会社 电子元件安装体、具有焊料凸点的电子元件、焊料树脂混合材料、电子元件安装方法以及电子元件制造方法
CN100533701C (zh) * 2005-03-16 2009-08-26 松下电器产业株式会社 使用了导电性粒子的倒装片安装方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3114162B2 (ja) 1991-07-14 2000-12-04 ソニーケミカル株式会社 電気的接続方法
JP3092118B2 (ja) 1991-07-14 2000-09-25 ソニーケミカル株式会社 導電粒子転写型異方性導電フィルム及び電気的接続方法
JP3202774B2 (ja) 1992-01-20 2001-08-27 昭和電工株式会社 はんだパターン転写フィルムおよびその製造方法
JPH0794853A (ja) * 1993-09-25 1995-04-07 Tanaka Kikinzoku Kogyo Kk プリント配線板の金属端子上への半田コーティング方法
TW250620B (en) 1994-05-31 1995-07-01 At & T Corp Method for interconnecting an electronic device using a transferable soldercarrying medium
US5591037A (en) 1994-05-31 1997-01-07 Lucent Technologies Inc. Method for interconnecting an electronic device using a removable solder carrying medium
JP3563500B2 (ja) 1995-08-14 2004-09-08 昭和電工株式会社 粉末はんだ付きシート及びはんだ回路の形成方法
JPH10233463A (ja) * 1997-01-27 1998-09-02 Toshiba Corp 半導体装置およびその製造方法
JP3996276B2 (ja) 1998-09-22 2007-10-24 ハリマ化成株式会社 ソルダペースト及びその製造方法並びにはんだプリコート方法
JP4185821B2 (ja) 2003-06-17 2008-11-26 新光電気工業株式会社 配線基板におけるはんだコーティング方法
JP2009010302A (ja) 2007-06-29 2009-01-15 Senju Metal Ind Co Ltd ソルダペースト層形成方法
TWI462676B (zh) 2009-02-13 2014-11-21 Senju Metal Industry Co The solder bumps for the circuit substrate are formed using the transfer sheet

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101084083A (zh) * 2004-12-20 2007-12-05 千住金属工业株式会社 焊料预涂方法及电子设备用工件
CN100533701C (zh) * 2005-03-16 2009-08-26 松下电器产业株式会社 使用了导电性粒子的倒装片安装方法
CN101142665A (zh) * 2005-03-29 2008-03-12 松下电器产业株式会社 倒装芯片封装方法及其焊锡点形成方法
CN101395976A (zh) * 2006-03-03 2009-03-25 松下电器产业株式会社 电子元件安装体、具有焊料凸点的电子元件、焊料树脂混合材料、电子元件安装方法以及电子元件制造方法

Also Published As

Publication number Publication date
TWI517272B (zh) 2016-01-11
JPWO2012063386A1 (ja) 2014-05-12
KR20130063017A (ko) 2013-06-13
JP5536899B2 (ja) 2014-07-02
WO2012063386A1 (ja) 2012-05-18
CN103180079A (zh) 2013-06-26
US9027822B2 (en) 2015-05-12
TW201230217A (en) 2012-07-16
KR101530528B1 (ko) 2015-06-22
US20130181041A1 (en) 2013-07-18

Similar Documents

Publication Publication Date Title
CN103180079B (zh) 焊料转印基材的制造方法、焊料预涂方法、及焊料转印基材
CN100399558C (zh) 半导体器件及其制造方法
KR100545008B1 (ko) 반도체소자와 그 제조방법 및 반도체장치와 그 제조방법
US8569109B2 (en) Method for attaching a metal surface to a carrier, a method for attaching a chip to a chip carrier, a chip-packaging module and a packaging module
TWI459505B (zh) 電互連結構及方法
KR101057608B1 (ko) 단자간 접속 방법 및 반도체 장치의 실장 방법
TW201244867A (en) Electroconductive bonding material, method for bonding conductor, and method for manufacturing semiconductor device
CN102208388A (zh) 半导体装置以及半导体装置的制造方法
JP2002026070A (ja) 半導体装置およびその製造方法
CN101030546B (zh) 电容安装方法
WO2020235684A1 (ja) 配線基板の製造方法
JP2009099669A (ja) 電子部品の実装構造および実装方法
JP3735059B2 (ja) 接着フィルム、それを用いた半導体パッケージまたは半導体装置、および半導体パッケージまたは半導体装置の製造方法
JP4802987B2 (ja) 接着フィルム
JP4876882B2 (ja) フリップチップ実装方法
JP4415920B2 (ja) 接着フィルム、それを用いた半導体パッケージまたは半導体装置、および半導体パッケージまたは半導体装置の製造方法
CN110504234A (zh) 一种高密度芯片焊接结构及焊接方法
KR101214061B1 (ko) 저가형 이방 도전성 페이스트를 사용한 전기적 접합 구조물의 제조방법
JP2005056932A (ja) 半導体装置の製造方法
JP2010140924A (ja) 電子部品実装構造および電子部品実装方法
JP3078781B2 (ja) 半導体装置の製造方法及び半導体装置
TW561563B (en) Flip-chip packaging process and its fixture
JP3204142B2 (ja) 半導体装置製造方法およびリードフレーム
TW200903750A (en) Semiconductor device having heat sink
KR20110053838A (ko) 도전성 접착제, 이를 이용한 반도체의 실장방법 및 웨이퍼 레벨 패키지

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C41 Transfer of patent application or patent right or utility model
TA01 Transfer of patent application right

Effective date of registration: 20151229

Address after: Osaka Japan

Applicant after: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT Co.,Ltd.

Address before: Osaka Japan

Applicant before: Matsushita Electric Industrial Co.,Ltd.

C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20160330

CF01 Termination of patent right due to non-payment of annual fee