CN1031627A - 采用超导材料的电子器件 - Google Patents
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Abstract
叙述了一种新型的超导电子器件。在介绍中,根
据本发明制造一种场效应半导体器件。在该半导体
器件的源区和漏区上淀积上超导陶瓷材料,其间夹有
绝缘膜,起隧道电流膜的作用。
Description
本发明是关于一种采用超导材料的电子器件。
迄今人们都在试图制造采用象Nb-Ge系列金属化合物之类的超导材料的固体电子器件,在超导状态下能按隧道效应工作的约瑟夫森器件是其中一个具有代表性的例子。这种超导器件是一种二端开关器件。
但由于约瑟夫森器件是个二端开关器件,输入信号和输出信号不能独立加以处理,因而没有放大功能可加以利用。因此尽管这种超导器件能在极高的频率下工作,但其设计极为复杂。此外还有这样另外一个缺点,即要采用一般目前已在半导体工业中高度发展的设计程序来设计这种超导器件,既不方便又有困难。
再有,将陶瓷超导体应用到半导体集成电路上时,集成电路经过长期使用之后,与陶瓷超导体接触的硅半导体表面往往会被氧化。这个氧化使半导体与超导体之间的界面不导电,从而使电流不能通过该界面。
因此本发明的一个目的是提供一种基于一种新的工作原理的超导器件。
本发明的另一个目的是提供一种频率特性优异的超导器件。
本发明的又一个目的是提供一种新型的在超导体与半导体表面之间的结。
为实现本发明的上述和其它目的,将一种超导体膜耦合到超导器件半导体区的表面部分,在两者之间夹上一绝缘膜。绝缘膜的作用是使隧道电流可以跨越绝缘膜在超导膜与半导体区之间流通,并保护衬底的半导体区不致因上覆的超导膜或加工工艺的影响而变质。为此绝缘膜系由厚度和禁带宽度选择得能容许隧道电流通过的绝缘或半绝缘膜制成的。
图1(A)至1(C)是本发明超导器件一些实施例的示意横向剖视图。
图2(A)至2(C)是说明本发明的超导器件工作情况的示意图。
图3是显示本发明超导器件的应用的电路图。
参看图1(A)至1(C),这是本发明的绝缘栅场效应晶体管的示意图。
图1(A)是本发明第一个实施例的示意图。超导陶瓷膜3和5是用丝网压印法、溅射法、MBE(分子束外延生长)法、CVD(化学汽相淀积)法等方法在YZT(氧化气稳定过的锆)或钛酸锶的绝缘基片1上淀积的。该陶瓷材料符合,例如,YBa2Cu3O6-8、YBaSrCu3O6-8或YBaCaCu3O6-8等化学式。其它的例子见诸本说明书的最后一部分。往这些配方中加入Ge、Sn、Pb、Sb、F和/或诸如此类的元素时可以降低出现在各晶体之间界面上阻挡层的高度。同时或在这之后,在500℃~1200℃下对该结构进行5~10小时的热退火,然后逐步加以冷却。
在陶瓷膜3和5以及膜3和5之间绝缘基片的夹层表面上形成绝缘膜之后,用光CVD法或等离子体CVD法在跨在绝缘基片1的夹层表面结构上形成非晶态或微晶硅半导体膜。结构的上部表面由不导电膜11加以绝缘。控制电极10是用蒸汽蒸发法由与上述相同的超导陶瓷或铜之类的金属材料或铜和镍之间的化合物制成的。虽然这里没有举例加以说明,但超导膜8和9在端部18和19与各超导引线进行没有任何接触电阻的接触。
下面参照图2(A)至2(C)说明本发明器件的工作情况。各图的横向相应于图1(A)的横向,垂直方向则与能级(电位)有关。
在图2(A)至2(C)中,器件是在膜4两端的超导膜3和5上加有一定的电压的。图2(A)是控制膜10上不加电压时的能态示意图。膜5的电位能变得比膜3的高30。由于存在电位差30,电子流20超过电子流20′,因此可以观测到有电流22存在。图2(B)是控制膜10上加有负电压时的能态示意图。由于在活性半导体膜4上形成有电位阻挡层,电子流20′和电子流20受到抑制。最后终于可以观测到有受限制的电流22′。图2(C)是控制膜10加有正电压时能态示意图。由于存在对应于膜4受抑制的电位,电子流20′提高,电子流20都受到抑制。但在电位抑制情况下一旦充以电子,电位线24′就偏移到电位线25(虚线)。于是与图2(A)中的电流22不相上下的电流22″可在其间通过。
如上所述,通过半导体膜4的输出电流可按加到控制电极10上的输入电压加以控制。若在控制电极底下的绝缘膜具有足够的绝缘性能,则输出能量可大于输入能量,因而可以起放大作用。此外,当按图3所示的电路配置时,该超导器件起倒相器的作用。
图1(B)是本发明第二个实施例的横向剖视图。在硅半导体基片1内形成有场绝缘区2,活性区4位于各区2之间。超导膜3和5在活性区4两边的基片表面上通过供隧道电流用的绝缘膜8和9形成。供隧道电流用的薄膜起势垒薄膜的作用,它提供势垒,使能起隧道效应。结构上形成有氧化硅绝缘膜11。在活性区上方和超导膜3和5的末端部分形成有控制电极10。
隧道电流用的绝缘膜是通过在700~950℃下的高纯度氨气氛中将硅基片加热15~40分钟以便在基片1表面形成10-25埃厚的氮化硅膜制成的。
图1(C)是本发明第三个实施例的示意图。场绝缘区2按前一个实施例同样的方式在硅半导体基片上形成。在各绝缘区2之间由热氧化膜形成绝缘膜11。接着,用超导陶瓷、硅半导体或金属氧化物制成控制膜10,然后在控制膜和衬底的绝缘膜上形成图案。
其它形成绝缘膜的实例是氧化硅、碳化硅和主要包括由碳例如金刚石类型碳组成的材料。碳材料的形成方法可以在1988年2月24日提交的中国专利申请88101061.8中找到。氧化硅、氮化硅和金刚石类型的碳,它们的能隙分别是8eV、5eV、3eV和1-5eV。
接下去,在控制膜和/或光致抗蚀剂仍然留在其上作为掩膜的情况下,用离子注入法往半导体基片上引入P型或n型杂质,以便在基片内产生杂质区13和14。各杂质区起IGFET(绝缘栅场效应晶体管)的源区和漏区的作用。在800~1050℃下的高纯度甲烷气氛中加热基片,以形成10~30埃厚的半绝缘碳化硅膜的绝缘膜8和9。在此工序中,同时对掺杂的半导体区进行退火,使其杂质密度达1×1019至1×1021厘米-3。用溅射法或电子束蒸发法在结构上淀积超导氧化物,并按以上诸实施例同样的方式形成图案,以形成超导膜3和5。超导膜3和5覆盖住杂质区13和14的大部分表面部分。此外,必要时可形成超导或非超导引线与超导膜3和5接触以便与外部线路连接。编号12表示上覆的绝缘膜。
作为一个修改方案,可以这样设计多层超导结构:将超导膜的上层表面覆以绝缘膜,在绝缘膜上开一个口,然后在绝缘膜上淀积上另一层超导膜,以便通过该口与下部超导膜接触。
本发明半导体基片活性区的长度选用1微米或小于1微米,这样器件就可以在低于1毫微秒的频率下工作。
本发明所用的超导陶瓷也可按化学计算式(A1-XBX)CuZOWXV制备。其中A是化学周期表Ⅲa族中的一个或一个以上的元素,例如稀土元素;B是化学周期表Ⅱa族中的一个或一个以上的元素,例如碱土金属,包括铍和镁在内,x是一组由Ge、Sn、Pb、F和Cl组成中的一个或一个以上的元素,且x=0~1,y=2.0~4.0,最好是2.5~3.5;z=1.0~4.0,最好是1.5~3.5,w=4.0~10.0,最好是6.0~8.0;v=0~3。此外本发明所用的超导陶瓷可按化学计算式(A1-XBX)yCuZOW制备,其中A是化学周期表Ⅴb族中一个或一个以上的元素,例如Bi、Sb和As;B是化学周期表Ⅱa中的一个或一个以上的族元素,例如碱土金属,包括铍和镁在内,x=0.3~1;y=2.0~4.0,最好是2.5~3.5;z=1.0~4.0,最好是1.5~3.5;w=4.0~10.0,最好是6.0~8.0。该一般式的例子有BiSrCaCu3Ox和Bi4Sr3Ca3Cu4Ox。经证实与式Bi4SryCa3Cu4Ox(y约为1.5)一致的初始Tc和Tco的样品经测定为40~60°K,不太高。符合化学计算式Bi4Sr4Ca2Cu4Ox和Bi2Sr3Ca3Cu2Ox的样品其临界温度较高。数字x表示氧比例,等于6~10,例如在8.1左右。这种超导材料可用丝网压印法、真空蒸发法或化学汽相淀积法制成。
此外还可采用引起广泛注意的有机超导材料来实施本发明。
尽管前面是就一些实施例进行说明,但本发明只应受本说明书所附权利要求的限制,不应受该诸特残实例的限制。举例说,本发明可应用于MISFET(金属绝缘体硅场效应晶体管)、双极型半导体器件、甚大规模集成电路或超大规模集成电路上。
Claims (9)
1、一种超导器件,其特征在于,该器件包括:
一半导体基片;
一在所述基片内形成的半导体器件;和
一超导膜,在所述半导体基片上形成,且与所述器件的一部分相连接,其间有一势垒膜。
2、权利要求1的器件,其特征在于,所述势垒膜的厚度系选取得使隧道电流可以通过。
3、权利要求1的器件,其特征在于,所述器件的一部分是个P型或n型半导体区。
4、权利要求3的器件,其特征在于,所述半导体器件是个场效应半导体器件。
5、权利要求4的器件,其特征在于,所述势垒膜是氮化硅膜。
6、权利要求4的器件,其特征在于,所述势垒膜是氧化硅膜。
7、权利要求4的器件,其特征在于,该器件还包括一在所述半导体器件活性区上形成的控制电极。
8、权利要求7的器件,其特征在于,所述控制电极由超导材料制成。
9、权利要求2的器件,其特征在于,所述超导膜起引线的作用,从所述半导体器件的所述部分延伸。
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Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP210862/87 | 1987-08-24 | ||
JP210863/87 | 1987-08-24 | ||
JP62210863A JPH0634415B2 (ja) | 1987-08-24 | 1987-08-24 | 酸化物超電導材料を用いた電子装置 |
JP62210862A JPS6453477A (en) | 1987-08-24 | 1987-08-24 | Electronic device using superconducting material |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1031627A true CN1031627A (zh) | 1989-03-08 |
CN1014382B CN1014382B (zh) | 1991-10-16 |
Family
ID=26518306
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN88106274A Expired CN1014382B (zh) | 1987-08-24 | 1988-08-24 | 采用超导材料的电子器件 |
Country Status (4)
Country | Link |
---|---|
US (1) | US5138401A (zh) |
EP (1) | EP0305167B1 (zh) |
CN (1) | CN1014382B (zh) |
DE (1) | DE3889263T2 (zh) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3020524B2 (ja) * | 1988-11-28 | 2000-03-15 | 株式会社日立製作所 | 酸化物超電導素子 |
US5256897A (en) * | 1988-11-28 | 1993-10-26 | Hitachi, Ltd. | Oxide superconducting device |
US5380704A (en) * | 1990-02-02 | 1995-01-10 | Hitachi, Ltd. | Superconducting field effect transistor with increased channel length |
EP0460356A3 (en) * | 1990-06-06 | 1992-11-04 | International Business Machines Corporation | Contacts to semiconductors having zero resistance |
FR2674067B1 (fr) * | 1991-03-15 | 1993-05-28 | Thomson Csf | Dispositif semiconducteur a effet josephson. |
JPH05304320A (ja) * | 1991-03-27 | 1993-11-16 | Semiconductor Energy Lab Co Ltd | 超伝導薄膜トランジスタ及びその作製方法 |
JPH0555514A (ja) * | 1991-08-28 | 1993-03-05 | Hitachi Ltd | 半導体装置およびその製造方法 |
US5965270A (en) * | 1996-07-19 | 1999-10-12 | National Science Council | Metal/amorphous material/metal antifuse structure with a barrier enhancement layer |
AU2002246934A1 (en) | 2001-01-03 | 2002-07-16 | Mississippi State University | Silicon carbide and related wide-bandgap transistors on semi-insulating epitaxy for high-speed, high-power applications |
US20030040171A1 (en) * | 2001-08-22 | 2003-02-27 | Weimer Ronald A. | Method of composite gate formation |
US8204564B2 (en) * | 2007-11-07 | 2012-06-19 | Brookhaven Science Associates, Llc | High temperature interfacial superconductivity |
KR20120027708A (ko) * | 2010-09-13 | 2012-03-22 | 삼성모바일디스플레이주식회사 | X-선 검출기 패널 |
US9653398B1 (en) * | 2015-12-08 | 2017-05-16 | Northrop Grumman Systems Corporation | Non-oxide based dielectrics for superconductor devices |
US10276504B2 (en) | 2017-05-17 | 2019-04-30 | Northrop Grumman Systems Corporation | Preclean and deposition methodology for superconductor interconnects |
US11621386B2 (en) | 2019-04-02 | 2023-04-04 | International Business Machines Corporation | Gate voltage-tunable electron system integrated with superconducting resonator for quantum computing device |
US11727295B2 (en) * | 2019-04-02 | 2023-08-15 | International Business Machines Corporation | Tunable superconducting resonator for quantum computing devices |
US11882770B2 (en) | 2020-12-10 | 2024-01-23 | International Business Machines Corporation | Area-selective deposition of metal nitride to fabricate devices |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5693375A (en) * | 1979-12-26 | 1981-07-28 | Shunpei Yamazaki | Photoelectric conversion device |
US4589001A (en) * | 1980-07-09 | 1986-05-13 | Agency Of Industrial Science & Technology | Quasiparticle injection control type superconducting device |
JPS57106186A (en) * | 1980-12-24 | 1982-07-01 | Fujitsu Ltd | Josephson element |
JPS57206286A (en) * | 1981-06-09 | 1982-12-17 | Sanyo Electric Co Ltd | Controlling method of motor |
JPS5952885A (ja) * | 1982-09-20 | 1984-03-27 | Agency Of Ind Science & Technol | ス−パ・シヨツトキ・トランジスタおよびその製造方法 |
US4816879A (en) * | 1982-12-08 | 1989-03-28 | North American Philips Corporation, Signetics Division | Schottky-type rectifier having controllable barrier height |
JPH0648733B2 (ja) * | 1984-01-25 | 1994-06-22 | 株式会社日立製作所 | 極低温用半導体装置 |
DE3588086T2 (de) * | 1984-11-05 | 1996-09-19 | Hitachi Ltd | Supraleiteranordnung |
JPS61171179A (ja) * | 1985-01-24 | 1986-08-01 | Nippon Telegr & Teleph Corp <Ntt> | 半導体結合超伝導素子 |
JPS61206279A (ja) * | 1985-03-11 | 1986-09-12 | Hitachi Ltd | 超電導素子 |
JPS62122287A (ja) * | 1985-11-22 | 1987-06-03 | Hitachi Ltd | 超伝導トランジスタ |
JP2540511B2 (ja) * | 1986-02-27 | 1996-10-02 | 株式会社日立製作所 | 超電導ホトトランジスタ |
JPH0666480B2 (ja) * | 1986-03-13 | 1994-08-24 | 日本電信電話株式会社 | ジヨセフソン接合素子 |
JPS6331181A (ja) * | 1986-07-25 | 1988-02-09 | Hitachi Ltd | 超伝導トランジスタ及びその製造方法 |
DE3810494C2 (de) * | 1987-03-27 | 1998-08-20 | Hitachi Ltd | Integrierte Halbleiterschaltungseinrichtung mit supraleitender Schicht |
US4960751A (en) * | 1987-04-01 | 1990-10-02 | Semiconductor Energy Laboratory Co., Ltd. | Electric circuit having superconducting multilayered structure and manufacturing method for same |
-
1988
- 1988-08-24 CN CN88106274A patent/CN1014382B/zh not_active Expired
- 1988-08-24 EP EP88307845A patent/EP0305167B1/en not_active Expired - Lifetime
- 1988-08-24 DE DE3889263T patent/DE3889263T2/de not_active Expired - Fee Related
-
1991
- 1991-10-17 US US07/780,441 patent/US5138401A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE3889263T2 (de) | 1994-08-11 |
US5138401A (en) | 1992-08-11 |
DE3889263D1 (de) | 1994-06-01 |
EP0305167A3 (en) | 1989-11-23 |
EP0305167A2 (en) | 1989-03-01 |
EP0305167B1 (en) | 1994-04-27 |
CN1014382B (zh) | 1991-10-16 |
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