CN103098190A - 具有底部填料的半导体芯片装置 - Google Patents

具有底部填料的半导体芯片装置 Download PDF

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Publication number
CN103098190A
CN103098190A CN2011800433411A CN201180043341A CN103098190A CN 103098190 A CN103098190 A CN 103098190A CN 2011800433411 A CN2011800433411 A CN 2011800433411A CN 201180043341 A CN201180043341 A CN 201180043341A CN 103098190 A CN103098190 A CN 103098190A
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CN
China
Prior art keywords
semiconductor chip
sidewall
interposer
side wall
substrate
Prior art date
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Pending
Application number
CN2011800433411A
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English (en)
Chinese (zh)
Inventor
迈克尔·Z·苏
傅雷
贾迈尔·里法伊-艾哈迈德
布莱恩·布莱克
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ATI Technologies ULC
Advanced Micro Devices Inc
Original Assignee
ATI Technologies ULC
Advanced Micro Devices Inc
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Filing date
Publication date
Application filed by ATI Technologies ULC, Advanced Micro Devices Inc filed Critical ATI Technologies ULC
Publication of CN103098190A publication Critical patent/CN103098190A/zh
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/012—Manufacture or treatment of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H10W72/07254—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting changes in dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/244—Dispositions, e.g. layouts relative to underlying supporting features, e.g. bond pads, RDLs or vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/247—Dispositions of multiple bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/381—Auxiliary members
    • H10W72/387—Flow barriers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
CN2011800433411A 2010-09-09 2011-09-09 具有底部填料的半导体芯片装置 Pending CN103098190A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/878,812 US8691626B2 (en) 2010-09-09 2010-09-09 Semiconductor chip device with underfill
US12/878,812 2010-09-09
PCT/US2011/051075 WO2012034064A1 (en) 2010-09-09 2011-09-09 Semiconductor chip device with underfill

Publications (1)

Publication Number Publication Date
CN103098190A true CN103098190A (zh) 2013-05-08

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN2011800433411A Pending CN103098190A (zh) 2010-09-09 2011-09-09 具有底部填料的半导体芯片装置

Country Status (6)

Country Link
US (1) US8691626B2 (https=)
EP (1) EP2614521B1 (https=)
JP (1) JP2013539910A (https=)
KR (1) KR101571837B1 (https=)
CN (1) CN103098190A (https=)
WO (1) WO2012034064A1 (https=)

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CN107004684A (zh) * 2014-12-16 2017-08-01 索尼公司 半导体设备、固态成像元件、成像设备以及电子设备
CN113571430A (zh) * 2020-04-28 2021-10-29 西部数据技术公司 具有减小的底部填充面积的倒装芯片封装体

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US8952540B2 (en) * 2011-06-30 2015-02-10 Intel Corporation In situ-built pin-grid arrays for coreless substrates, and methods of making same
US9006004B2 (en) 2012-03-23 2015-04-14 Taiwan Semiconductor Manufacturing Company, Ltd. Probing chips during package formation
TWI508249B (zh) * 2012-04-02 2015-11-11 矽品精密工業股份有限公司 封裝件、半導體封裝結構及其製法
US10192810B2 (en) 2013-06-28 2019-01-29 Intel Corporation Underfill material flow control for reduced die-to-die spacing in semiconductor packages
US9412674B1 (en) * 2013-10-24 2016-08-09 Xilinx, Inc. Shielded wire arrangement for die testing
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KR101622453B1 (ko) * 2014-01-22 2016-05-31 앰코 테크놀로지 코리아 주식회사 반도체 디바이스 및 그 제조 방법
US9230936B2 (en) * 2014-03-04 2016-01-05 Qualcomm Incorporated Integrated device comprising high density interconnects and redistribution layers
US9373559B2 (en) * 2014-03-05 2016-06-21 International Business Machines Corporation Low-stress dual underfill packaging
US9437576B1 (en) * 2015-03-23 2016-09-06 Advanced Semiconductor Engineering, Inc. Semiconductor device package and method of manufacturing the same
US9798088B2 (en) * 2015-11-05 2017-10-24 Globalfoundries Inc. Barrier structures for underfill blockout regions
US9627784B1 (en) 2015-12-01 2017-04-18 International Business Machines Corporation Method and apparatus for strain relieving surface mount attached connectors
US10701800B2 (en) * 2016-01-28 2020-06-30 Hewlett Packard Enterprise Development Lp Printed circuit boards
US10249515B2 (en) * 2016-04-01 2019-04-02 Intel Corporation Electronic device package
WO2017199278A1 (ja) * 2016-05-16 2017-11-23 株式会社日立製作所 半導体装置
US10475766B2 (en) * 2017-03-29 2019-11-12 Intel Corporation Microelectronics package providing increased memory component density
US10304800B2 (en) * 2017-06-23 2019-05-28 Taiwan Semiconductor Manufacturing Company Ltd. Packaging with substrates connected by conductive bumps
US10529693B2 (en) 2017-11-29 2020-01-07 Advanced Micro Devices, Inc. 3D stacked dies with disparate interconnect footprints
US10727204B2 (en) 2018-05-29 2020-07-28 Advances Micro Devices, Inc. Die stacking for multi-tier 3D integration
US10937755B2 (en) 2018-06-29 2021-03-02 Advanced Micro Devices, Inc. Bond pads for low temperature hybrid bonding
JP2020150145A (ja) * 2019-03-14 2020-09-17 キオクシア株式会社 半導体装置
KR102689648B1 (ko) 2020-02-03 2024-07-30 삼성전자주식회사 댐 구조물을 갖는 반도체 패키지
KR102825809B1 (ko) * 2020-07-10 2025-06-27 삼성전자주식회사 언더필이 구비된 반도체 패키지 및 이의 제조 방법
KR102853612B1 (ko) 2020-07-15 2025-09-03 삼성전자주식회사 반도체 패키지 및 이의 제조 방법
KR20230032592A (ko) * 2021-08-31 2023-03-07 삼성전자주식회사 반도체 패키지
JP7849687B2 (ja) * 2022-01-27 2026-04-22 エスケーハイニックス株式会社 Ｔｓｖ用モールドアンダーフィル組成物
JP2026510132A (ja) 2022-10-31 2026-04-01 キョーセラ・エーブイエックス・コンポーネンツ・コーポレーション 多層コンデンサ

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Publication number Priority date Publication date Assignee Title
CN107004684A (zh) * 2014-12-16 2017-08-01 索尼公司 半导体设备、固态成像元件、成像设备以及电子设备
CN107004684B (zh) * 2014-12-16 2020-10-27 索尼公司 半导体设备、固态成像元件、成像设备以及电子设备
CN113571430A (zh) * 2020-04-28 2021-10-29 西部数据技术公司 具有减小的底部填充面积的倒装芯片封装体

Also Published As

Publication number Publication date
KR101571837B1 (ko) 2015-11-25
WO2012034064A1 (en) 2012-03-15
EP2614521A1 (en) 2013-07-17
JP2013539910A (ja) 2013-10-28
US8691626B2 (en) 2014-04-08
EP2614521B1 (en) 2018-01-24
US20120061853A1 (en) 2012-03-15
KR20130109116A (ko) 2013-10-07

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Application publication date: 20130508