KR101571837B1 - 언더필을 갖는 반도체 칩 디바이스 - Google Patents
언더필을 갖는 반도체 칩 디바이스 Download PDFInfo
- Publication number
- KR101571837B1 KR101571837B1 KR1020137007013A KR20137007013A KR101571837B1 KR 101571837 B1 KR101571837 B1 KR 101571837B1 KR 1020137007013 A KR1020137007013 A KR 1020137007013A KR 20137007013 A KR20137007013 A KR 20137007013A KR 101571837 B1 KR101571837 B1 KR 101571837B1
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor chip
- underfill
- interposer
- sidewall
- cover
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
- H10W74/012—Manufacture or treatment of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/117—Shapes of semiconductor bodies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/0198—Manufacture or treatment batch processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07231—Techniques
- H10W72/07236—Soldering or alloying
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
- H10W72/07254—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting changes in dispositions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/241—Dispositions, e.g. layouts
- H10W72/244—Dispositions, e.g. layouts relative to underlying supporting features, e.g. bond pads, RDLs or vias
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/241—Dispositions, e.g. layouts
- H10W72/247—Dispositions of multiple bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/381—Auxiliary members
- H10W72/387—Flow barriers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Wire Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/878,812 US8691626B2 (en) | 2010-09-09 | 2010-09-09 | Semiconductor chip device with underfill |
| US12/878,812 | 2010-09-09 | ||
| PCT/US2011/051075 WO2012034064A1 (en) | 2010-09-09 | 2011-09-09 | Semiconductor chip device with underfill |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20130109116A KR20130109116A (ko) | 2013-10-07 |
| KR101571837B1 true KR101571837B1 (ko) | 2015-11-25 |
Family
ID=44652038
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020137007013A Active KR101571837B1 (ko) | 2010-09-09 | 2011-09-09 | 언더필을 갖는 반도체 칩 디바이스 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US8691626B2 (https=) |
| EP (1) | EP2614521B1 (https=) |
| JP (1) | JP2013539910A (https=) |
| KR (1) | KR101571837B1 (https=) |
| CN (1) | CN103098190A (https=) |
| WO (1) | WO2012034064A1 (https=) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12100635B2 (en) | 2020-07-15 | 2024-09-24 | Samsung Electronics Co., Ltd. | Semiconductor package and method of fabricating the same |
Families Citing this family (31)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20110099556A (ko) * | 2010-03-02 | 2011-09-08 | 삼성전자주식회사 | 반도체 패키지 테스트장치 |
| TWI496254B (zh) * | 2010-11-01 | 2015-08-11 | 欣興電子股份有限公司 | 嵌埋半導體元件之封裝結構及其製法 |
| US8363418B2 (en) * | 2011-04-18 | 2013-01-29 | Morgan/Weiss Technologies Inc. | Above motherboard interposer with peripheral circuits |
| US8952540B2 (en) * | 2011-06-30 | 2015-02-10 | Intel Corporation | In situ-built pin-grid arrays for coreless substrates, and methods of making same |
| US9006004B2 (en) | 2012-03-23 | 2015-04-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Probing chips during package formation |
| TWI508249B (zh) * | 2012-04-02 | 2015-11-11 | 矽品精密工業股份有限公司 | 封裝件、半導體封裝結構及其製法 |
| US10192810B2 (en) | 2013-06-28 | 2019-01-29 | Intel Corporation | Underfill material flow control for reduced die-to-die spacing in semiconductor packages |
| US9412674B1 (en) * | 2013-10-24 | 2016-08-09 | Xilinx, Inc. | Shielded wire arrangement for die testing |
| US9721852B2 (en) | 2014-01-21 | 2017-08-01 | International Business Machines Corporation | Semiconductor TSV device package to which other semiconductor device package can be later attached |
| KR101622453B1 (ko) * | 2014-01-22 | 2016-05-31 | 앰코 테크놀로지 코리아 주식회사 | 반도체 디바이스 및 그 제조 방법 |
| US9230936B2 (en) * | 2014-03-04 | 2016-01-05 | Qualcomm Incorporated | Integrated device comprising high density interconnects and redistribution layers |
| US9373559B2 (en) * | 2014-03-05 | 2016-06-21 | International Business Machines Corporation | Low-stress dual underfill packaging |
| JP2016115840A (ja) * | 2014-12-16 | 2016-06-23 | ソニー株式会社 | 半導体装置、固体撮像素子、撮像装置、および電子機器 |
| US9437576B1 (en) * | 2015-03-23 | 2016-09-06 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package and method of manufacturing the same |
| US9798088B2 (en) * | 2015-11-05 | 2017-10-24 | Globalfoundries Inc. | Barrier structures for underfill blockout regions |
| US9627784B1 (en) | 2015-12-01 | 2017-04-18 | International Business Machines Corporation | Method and apparatus for strain relieving surface mount attached connectors |
| US10701800B2 (en) * | 2016-01-28 | 2020-06-30 | Hewlett Packard Enterprise Development Lp | Printed circuit boards |
| US10249515B2 (en) * | 2016-04-01 | 2019-04-02 | Intel Corporation | Electronic device package |
| WO2017199278A1 (ja) * | 2016-05-16 | 2017-11-23 | 株式会社日立製作所 | 半導体装置 |
| US10475766B2 (en) * | 2017-03-29 | 2019-11-12 | Intel Corporation | Microelectronics package providing increased memory component density |
| US10304800B2 (en) * | 2017-06-23 | 2019-05-28 | Taiwan Semiconductor Manufacturing Company Ltd. | Packaging with substrates connected by conductive bumps |
| US10529693B2 (en) | 2017-11-29 | 2020-01-07 | Advanced Micro Devices, Inc. | 3D stacked dies with disparate interconnect footprints |
| US10727204B2 (en) | 2018-05-29 | 2020-07-28 | Advances Micro Devices, Inc. | Die stacking for multi-tier 3D integration |
| US10937755B2 (en) | 2018-06-29 | 2021-03-02 | Advanced Micro Devices, Inc. | Bond pads for low temperature hybrid bonding |
| JP2020150145A (ja) * | 2019-03-14 | 2020-09-17 | キオクシア株式会社 | 半導体装置 |
| KR102689648B1 (ko) | 2020-02-03 | 2024-07-30 | 삼성전자주식회사 | 댐 구조물을 갖는 반도체 패키지 |
| CN113571430B (zh) * | 2020-04-28 | 2025-10-31 | 桑迪士克科技股份有限公司 | 具有减小的底部填充面积的倒装芯片封装体 |
| KR102825809B1 (ko) * | 2020-07-10 | 2025-06-27 | 삼성전자주식회사 | 언더필이 구비된 반도체 패키지 및 이의 제조 방법 |
| KR20230032592A (ko) * | 2021-08-31 | 2023-03-07 | 삼성전자주식회사 | 반도체 패키지 |
| JP7849687B2 (ja) * | 2022-01-27 | 2026-04-22 | エスケーハイニックス株式会社 | Tsv用モールドアンダーフィル組成物 |
| JP2026510132A (ja) | 2022-10-31 | 2026-04-01 | キョーセラ・エーブイエックス・コンポーネンツ・コーポレーション | 多層コンデンサ |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009043765A (ja) * | 2007-08-06 | 2009-02-26 | Denso Corp | 電子装置 |
Family Cites Families (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3065753B2 (ja) | 1991-12-04 | 2000-07-17 | イビデン株式会社 | 半導体集積回路ベアチップの樹脂封止方法、半導体装置 |
| JPH1074868A (ja) * | 1996-08-30 | 1998-03-17 | Oki Electric Ind Co Ltd | 半導体実装装置及び半導体装置の封止方法 |
| US5901041A (en) * | 1997-12-02 | 1999-05-04 | Northern Telecom Limited | Flexible integrated circuit package |
| JP2000311905A (ja) | 1999-04-28 | 2000-11-07 | Nippon Inter Electronics Corp | 複合半導体装置の製造方法 |
| JP2000357768A (ja) | 1999-06-17 | 2000-12-26 | Hitachi Ltd | 半導体装置及びその製造方法 |
| US6589802B1 (en) * | 1999-12-24 | 2003-07-08 | Hitachi, Ltd. | Packaging structure and method of packaging electronic parts |
| US6949822B2 (en) * | 2000-03-17 | 2005-09-27 | International Rectifier Corporation | Semiconductor multichip module package with improved thermal performance; reduced size and improved moisture resistance |
| US6537482B1 (en) | 2000-08-08 | 2003-03-25 | Micron Technology, Inc. | Underfill and encapsulation of carrier substrate-mounted flip-chip components using stereolithography |
| JP2002124654A (ja) * | 2000-10-13 | 2002-04-26 | Mitsubishi Electric Corp | 固体撮像装置 |
| US6906415B2 (en) | 2002-06-27 | 2005-06-14 | Micron Technology, Inc. | Semiconductor device assemblies and packages including multiple semiconductor devices and methods |
| TW569416B (en) | 2002-12-19 | 2004-01-01 | Via Tech Inc | High density multi-chip module structure and manufacturing method thereof |
| US7122906B2 (en) | 2004-01-29 | 2006-10-17 | Micron Technology, Inc. | Die-wafer package and method of fabricating same |
| US7208342B2 (en) * | 2004-05-27 | 2007-04-24 | Intel Corporation | Package warpage control |
| JP2006261566A (ja) * | 2005-03-18 | 2006-09-28 | Alps Electric Co Ltd | 電子部品用ホルダ及び電子部品用保持シート、これらを用いた電子モジュール、電子モジュールの積層体、電子モジュールの製造方法並びに検査方法 |
| CN1949487A (zh) * | 2005-10-10 | 2007-04-18 | 南茂科技股份有限公司 | 可防止密封材料溢流的膜上倒装片封装结构 |
| JP2007183164A (ja) * | 2006-01-06 | 2007-07-19 | Fujitsu Ltd | 半導体集積回路装置及びその試験方法 |
| JP4391508B2 (ja) * | 2006-09-29 | 2009-12-24 | Okiセミコンダクタ株式会社 | 半導体装置、及び半導体装置の製造方法 |
| JP2008283004A (ja) * | 2007-05-11 | 2008-11-20 | Matsushita Electric Ind Co Ltd | 半導体装置 |
| JP2009158623A (ja) * | 2007-12-26 | 2009-07-16 | Panasonic Corp | 半導体装置の製造方法 |
| CN101777502B (zh) * | 2009-01-13 | 2011-12-07 | 日月光半导体制造股份有限公司 | 倒装芯片封装方法 |
-
2010
- 2010-09-09 US US12/878,812 patent/US8691626B2/en active Active
-
2011
- 2011-09-09 EP EP11757730.4A patent/EP2614521B1/en active Active
- 2011-09-09 KR KR1020137007013A patent/KR101571837B1/ko active Active
- 2011-09-09 JP JP2013528347A patent/JP2013539910A/ja active Pending
- 2011-09-09 WO PCT/US2011/051075 patent/WO2012034064A1/en not_active Ceased
- 2011-09-09 CN CN2011800433411A patent/CN103098190A/zh active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009043765A (ja) * | 2007-08-06 | 2009-02-26 | Denso Corp | 電子装置 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12100635B2 (en) | 2020-07-15 | 2024-09-24 | Samsung Electronics Co., Ltd. | Semiconductor package and method of fabricating the same |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103098190A (zh) | 2013-05-08 |
| WO2012034064A1 (en) | 2012-03-15 |
| EP2614521A1 (en) | 2013-07-17 |
| JP2013539910A (ja) | 2013-10-28 |
| US8691626B2 (en) | 2014-04-08 |
| EP2614521B1 (en) | 2018-01-24 |
| US20120061853A1 (en) | 2012-03-15 |
| KR20130109116A (ko) | 2013-10-07 |
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