CN103021979A - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN103021979A
CN103021979A CN2012100575230A CN201210057523A CN103021979A CN 103021979 A CN103021979 A CN 103021979A CN 2012100575230 A CN2012100575230 A CN 2012100575230A CN 201210057523 A CN201210057523 A CN 201210057523A CN 103021979 A CN103021979 A CN 103021979A
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China
Prior art keywords
electrode
semiconductor device
paper tinsel
metal paper
electric property
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CN2012100575230A
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English (en)
Inventor
中尾淳一
福吉宽
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Toshiba Corp
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Toshiba Corp
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Publication of CN103021979A publication Critical patent/CN103021979A/zh
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    • H01L23/049—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being perpendicular to the base
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Abstract

本发明的实施方式的半导体装置，具备第1半导体芯片、缓冲体和终端导线。第1半导体芯片具有第1电极和设于第1电极的相反侧的第2电极，在第1电极与第2电极之间流动电流。缓冲体，具有与第2电极电气性连接的下部金属箔、经由下部金属箔设于第2电极上的陶瓷片、设于陶瓷片的下部金属箔的相反侧并与下部金属箔电气性连接的上部金属箔。终端导线的一端设于上部金属箔上，与上部金属箔电气性连接。

Description

半导体装置
相关申请的交叉引用
本申请基于2011年9月21日提交的在先的日本专利申请No.2011-206313并要求其优先权，其全部内容通过引用结合在本申请中。
技术领域
后述的实施方式涉及一种半导体装置。
背景技术
逆变器等中使用的电源模块等半导体装置，在表面设有布线图案的陶瓷基板上具有IGBT(Insulated Gate Bipolar Transistor，绝缘栅双极型晶体管)和与其逆并联连接的环流二极管。IGBT、二极管等的半导体芯片的表面上的电极，由键合线(bonding wire)或者长条状的金属片等(以下，称引出导线)向陶瓷基板上的布线图案引出，然后，通过外部取出端子从布线图案向封装之外引出。半导体芯片表面的电极和引出导线通过焊料电气性地连接。近年来，半导体芯片的特性得到了提高并实现着小型化。特别是，关于环流二极管，开始代替Si(硅)而由SiC(碳化硅)构成，小型化得到了进展。由于半导体芯片的小型化，使得电流密度增大，半导体芯片的发热量也增大。由于发热量的增大，半导体芯片的ON/OFF带来的温度循环的变化变大。该温度循环引起由半导体芯片和引出导线间的热膨胀系数差所产生的应力(stress)的循环，并对焊料引起金属疲劳。其结果，引起半导体芯片的动作不良。人们期望一种即使在电流密度高的动作中，相对于温度循环的可靠性仍然高的半导体装置。
发明内容
本发明的实施方式提供相对于温度循环可靠性高的半导体装置。
本发明的实施方式的半导体装置具备第1半导体芯片、缓冲体和终端导线(terminal lead)。第1半导体芯片具有第1电极、设于所述第1电极的相反侧的第2电极，在第1电极和第2电极之间流动电流。缓冲体具有：电气连接于第2电极的下部金属箔、经由下部金属箔设于第2电极上的陶瓷片、和设于陶瓷片的下部金属箔的相反侧并与下部金属箔电气性连接的上部金属箔。终端导线的一端设于上部金属箔上，与上部金属箔电气性连接。
利用本发明的实施方式，能够提供相对于温度循环，可靠性高的半导体装置。
附图说明
图1的(a)是第1实施方式的半导体装置的要部斜视图，(b)是(a)的部分放大图。
图2是第1实施方式的半导体装置的图1的A-A线中的剖面图。
图3是第1实施方式的半导体装置的图1的A-A线剖面图中的缓冲体的剖面放大图。
图4是第2实施方式的半导体装置的图2的剖面图中的缓冲体的剖面放大图。
图5是第3实施方式的半导体装置的斜视图。
图6是第3实施方式的半导体装置的图5的B-B线中的剖面图。
具体实施方式
以下，参照附图说明本发明的实施方式。实施例中的说明所使用的图是用于简化说明的示意性的图，图中的各要素的形状、尺寸、大小关系等，在实际的实施中不必限定于与图中所示的一致，而是在能够得到本发明的效果的范围内能够适当地改变。
(第1实施方式)
使用图1至图3，说明第1实施方式的半导体装置。图1表示第1实施方式的半导体装置100，其中(a)是示意地示出要部的斜视图，(b)是将作为环流二极管来使用的FRD(Fast Recovery Diode，快速恢复二极管)2的周边放大而示意地示出的斜视图。图2是图1(a)的A-A线中的剖面图。图3是将图2的剖面图中的缓冲体6放大示出的剖面图。
如图1～图3所示，第1实施方式的半导体装置具备：金属散热板14、陶瓷基板9、FRD芯片(主要是第1半导体芯片)2、IGBT(Insulated Gate Bipolar Transistor)芯片(第1半导体芯片或者第2半导体芯片)11、缓冲体6、终端导线7以及键合线12。第1实施方式的半导体装置100，作为实施方式的一例，示出了在IGBT芯片11的发射极-集电极间逆并联连接有环流二极管2的例子。作为环流二极管的芯片2，使用了FRD的芯片作为一例，但也能够使用SBD(Schottkey Barrier Diode，肖特基势垒二极管)的芯片。此外，代替IGBT芯片11，能够使用MOSFET(Metal Oxide Semiconductor FieldEffect Transistor，金属氧化物半导体场效应晶体管)或者IEGT(Injection Enhanced Gate Transistor，注入增强栅晶体管)等、由栅极电极控制第1电极和第2电极之间流动的电流的半导体元件的芯片。
陶瓷基板9由陶瓷构成，其一个表面，为了电路布线，而具有例如：集电极图案(第1布线图案)1、发射极图案(第2布线图案)8以及栅极图案(第3布线图案)10。这些布线图案，作为一例，使用厚度为0.3mm左右的铜(Cu)箔(铜的板状的薄物)。厚度及图案形状根据电路布线的用途而进行设计。除铜箔以外，还能够用例如铝(Al)箔等其它金属箔。集电极图案1、发射极图案8以及栅极图案10例如通过银焊锡固定于陶瓷基板的上述一个表面。陶瓷基板1优选为热传导性高、绝缘性高、热膨胀系数小的基板。
陶瓷基板9，在与设有上述集电极图案1、发射极图案8以及栅极图案10的表面相反的一侧表面还具有铜箔13。该铜箔13也能够使用铝箔或者其它金属箔。陶瓷基板1经由铜箔13以及焊料3而固定于金属散热板14的一个表面上。
IGBT芯片11，在下表面上具有集电极电极(第1电极或者第3电极)，在与下表面相反一侧的上表面具有发射极电极(第2电极或者第4电极)以及栅极电极(控制电极或者第5电极)，在ON状态时，从集电极电极向发射极电极流动电流(各电极的详情未图示)。该电流由栅极电极进行控制。IGBT芯片11，经由集电极电极，设于陶瓷基板1上的集电极图案1上。集电极电极，例如经由焊料(未图示)与集电极图案1进行电气性连接。
IGBT芯片11的发射极电极，通过键合线12电气性连接于发射极图案8。键合线12例如由铝构成，但也能够用铜等其它金属。键合线12与发射极电极以及发射极图案8，通过焊料或者超声波接合进行电气性连接。键合线12采用了多根。通过采用多根，能够增加键合线12的电流流动的截面积并降低流向键合线12的电流密度。
IGBT芯片11的栅极电极，与上述同样地，通过键合线12电气性连接于栅极布线图案10。流过栅极电极的电流与流向发射极电极的电流相比非常少，所以键合线12用一根就够了。
集电极图案1、发射极图案8以及栅极图案10分别在未图示的部分通过外部取出端子连接于未图示集电极端子、发射极端子、栅极端子。
FRD芯片2，在下表面具有阴极电极(第1电极)，在与下表面为相反侧的上表面具有阳极电极(第2电极)(各电极的详情未图示)。FRD芯片2由碳化硅(SiC)构成。由此，与由Si构成的情况相比，FRD芯片具有低电阻特性，所以能够缩小FRD芯片2的芯片面积。本实施方式的FRD芯片2的面积为4.0mm×4.0mm。
FRD芯片2经由阴极电极设于集电极图案1上。阴极电极经由例如焊料(未图示)与集电极图案1电气性连接。阳极电极经由缓冲体6与终端导线7电气性连接。
缓冲体6由陶瓷片4和将其在上下相夹并电气性连接的金属箔5构成。即，缓冲体6具有：电气性连接于FRD芯片2的阳极电极的下部金属箔5b、经由该下部金属箔5b而设于阳极电极上陶瓷片4、以及设于陶瓷片4的与下部金属箔5b相反的一侧、并与下部金属箔5b电气性连接的上部金属箔5a。下部金属箔5b与上部金属箔5a通过连接导体5c进行电气性连接。缓冲体6的下部金属箔5b与FRD芯片2的阳极电极通过焊料3电气性连接。陶瓷片4采用比用于终端导线的铜或者铝等金属热膨胀系数小、与氮化硅或者硅热膨胀系数接近的陶瓷。能够采用例如A12O3(氧化铝)、AIN(氮化铝)、BN(氮化硼)或者SiN(氮化硅)等。陶瓷片4的厚度例如为0.32mm。
本实施方式的半导体装置100，在陶瓷片4的侧端部，连接导体5c与下部金属箔5b和上部金属箔5a电气性连接。连接导体5c、下部金属箔5b以及上部金属箔5a由同一材料一体地形成。例如，通过将厚度为0.3mm的一个铜箔弯曲成U字状，或者通过铸造成型为U字状，形成一体地具有连接导体5c、下部金属箔5b以及上部金属箔5a的金属箔5。金属箔5，除铜以外还能够为铝或者其它金属。下部金属箔5b以及上部金属箔5a，与陶瓷基板通过例如银焊锡15粘着。
终端导线7，在一端与缓冲体6的上部金属箔5a电气性连接。此外，终端导线7的另一端与发射极图案8电气性连接。终端导线7由带状的或者长条状的金属片构成，本实施方式的情况下，是宽度2.5mm、厚度0.4mm的铜片。终端导线7的两端(前述的一端和另一端)在长度方向上弯曲，以使与两端以外的部分相比成为陶瓷基板1侧。终端导线7，除铜以外还能以Al等其它金属构成，宽度和厚度能够基于电流的量来设定。终端导线7，能够与缓冲体6的上部金属箔5a以及发射极图案8通过焊料或者超声波接合而进行电气性连接。
如上构成的本实施方式的半导体装置100具有以下的特征。FRD芯片2作为用于使由负载的电感分量产生的环流电流流向半导体装置100中的环流二极管而实现功能。如果对电极驱动用的逆并联电路等使用半导体装置100，则流向环流二极管的环流电流，成为超过50A的大电流。如果这样的大电流流向FRD芯片2，则FRD芯片2发热。
在这里，作为比较例而考虑对FRD芯片2经由焊料直接连接终端导线7的情况。在这种比较例的情况下，由于上述发热，FRD芯片2以及经由焊料3与其连接的终端导线7产生热膨胀。如果环流电流减弱而消失，则由于散热，FRD芯片2和终端导线7收缩。构成FRD芯片的Si或者SiC的热膨胀系数与构成终端导线的铜或者铝的热膨胀系数，差别大到产生如下影响的程度。两者的热膨胀系数差大，所以由于上述热膨胀和上述收缩，接合两者的焊料3被施加了很大的应力。通过将半导体装置反复变化为ON状态和OFF状态，产生温度循环。该温度循环，使应力的循环发生，并引起对FRD芯片2和终端导线7进行接合的焊料3的金属疲劳，焊料3劣化。其结果，经温度循环，半导体装置变得具有了引起通电不良等的特性不良。
但是，本实施方式的半导体装置100与上述比较例不同，在FRD芯片2和终端导线7之间具备缓冲体6。缓冲体6是将陶瓷片4通过下部金属箔5b和上部金属箔5a在上下相夹的构造。下部金属箔5b和上部金属箔5a对陶瓷片4由银焊锡等粘着剂固着，如果陶瓷片4为大于等于0.2mm的厚度，则缓冲体6的热膨胀系数，能在经验上看作为大致为由陶瓷片4的热膨胀系数决定。陶瓷片4由与Si或者SiC热膨胀系数非常接近的Al2O3、AIN、BN或者SiN构成，所以缓冲体6的热膨胀系数能够视为与FRD芯片2的热膨胀系数大致相等。
其结果，在FRD芯片2、缓冲体6以及终端导线7各自的接合部，抑制热膨胀系数之差引起的应力的发生。即使发生温度循环，也能抑制接合FRD芯片2和缓冲体6的焊料3的劣化。缓冲体6和终端导线7通过超声波接合而接合时，不容易发生温度循环引起的接合不良。即使在通过焊料进行接合的情况下，在本实施方式中，由于在终端导线7和FRD芯片2之间存在缓冲体6，所以FRD芯片2的发热，几乎不对终端导线7和缓冲体6的接合产生影响。
如上所说明的那样，本实施方式的半导体装置100，通过在FRD芯片2和终端导线7之间具备缓冲体6，即使发生温度循环也能抑制通电不良的发生，提高可靠性。
(第2实施方式)
使用图4说明第2实施方式的半导体装置。图4是与本实施方式的半导体装置200的图2相当的剖面图中的缓冲体的剖面放大图。另外，与在第1实施方式中说明过的结构相同的结构的部分，使用相同的参照编号或者记号并省略其说明。主要说明与第1实施方式的不同点。
本实施方式的半导体装置200，如图4中的缓冲体6的剖面图所示的那样，与第1实施方式的半导体装置100在缓冲体6的构造上不同。本实施方式的半导体装置200中，连接导体5c设于贯通陶瓷片4的孔4a中。该连接导体5c，由例如银焊锡15构成。如果示出制造工序的一例，则在陶瓷片4的上表面和下表面的表面整体设置银焊锡15，将下部金属箔5b以及上部金属箔5a分别经由银焊锡接合到陶瓷片4的下表面以及上表面。由此，位于陶瓷片4和下部金属箔5b以及上部金属箔5a之间的银焊锡15，侵入到陶瓷片4的孔4a中而充填。其结果，连接导体5c由充填入贯通陶瓷片4的孔4a的银焊锡15构成。下部金属箔5b以及上部金属箔5a通过连接导体5c电气性连接。
本实施方式的半导体装置200，与第1实施方式的半导体装置100同样地，在FRD芯片2和终端导线7之间具备具有热膨胀系数与FRD芯片2的热膨胀系数大致相等的陶瓷片4的缓冲体6，即使发生温度循环，也能抑制通电不良的发生，提高半导体装置200的可靠性。
(第3实施方式)
使用图5以及图6说明第3实施方式的半导体装置。图5是示意性地示出本实施方式的半导体装置300的斜视图。图6示意性地图5的B-B线中的剖面图。另外，与在第1实施方式中说明过的结构相同的结构的部分，使用相同的参照编号或者记号并省略其说明。主要说明与第1实施方式的不同点。
如图5以及图6所示，本实施方式的半导体装置300，在对IGBT11的发射极电极和发射极图案8使用两根终端导线77，来代替在第1实施方式中使用的多根键合线12这一点上，与第1实施方式的半导体装置100不同。在本实施方式的半导体装置300中，与FRD芯片2(第1半导体芯片)和发射极图案8(第2布线图案)通过终端导线7进行电气性连接这一点同样地，IGBT芯片11(第2半导体芯片)的发射极电极和发射极图案8通过两根终端导线77电气性连接。
即，IGBT芯片11的发射极电极经由缓冲体66连接到两根中的各个终端导线77。连接IGBT芯片11的发射极电极和发射极图案8的缓冲体66的构造以及终端导线77的构造，分别与连接FRD芯片2的阳极电极和发射极图案8的缓冲体6的构造以及终端导线7的构造完全相同。其中，各个尺寸对应于各个芯片的规格而设定。
本实施方式的半导体装置300，在第1实施方式的半导体装置100中还具有具体的封装构造。半导体装置300还具备树脂匣16、树脂盖17、第1外部取出端子、第2外部取出端子、第3外部取出端子和硅凝胶(silicon gel)19。
树脂匣16，在金属散热板14的搭载了陶瓷基板9的表面上具有包围陶瓷基板9的环状构造。树脂匣16，例如由PPS(Poly PhenyleneSulfide，聚苯硫醚)或者PBT(Poly Butylene Terephthalate，聚对苯二甲酸丁二醇酯)等树脂构成。树脂匣16，在与金属散热板14相反一侧的上部具有环状构造的开口部。树脂盖17具有：设于该开口部并贯通树脂盖17的、第1外部取出端子(未图示)、第2外部取出端子18E以及第3外部取出端子18G。这些外部取出端子，由树脂盖17固定。树脂盖17由与树脂匣16相同的树脂材料构成。
第1外部取出端子的一端电气性连接于陶瓷基板1上的集电极图案1。第1外部取出端子的另一端在树脂盖17的外侧连接于集电极端子。第2外部取出端子18E的一端电气性连接于陶瓷基板1上的发射极图案8。第2外部取出端子18E的另一端在树脂盖17的外侧电气性连接于发射极端子。第3外部取出端子18G的一端电气性连接于栅极图案10。第3外部取出端子18G的另一端在树脂盖17的外侧电气性连接于栅极端子。
在由树脂匣16、树脂盖17以及金属散热板14包围的内部充填硅凝胶19。硅凝胶19覆盖FRD芯片2、IGBT芯片11、集电极图案1、发射极图案8、栅极图案10、缓冲体6、66以及终端导线7、77。
本实施方式的半导体装置300，与第1实施方式的半导体装置100同样地，在FRD芯片2和终端导线7之间具备具有热膨胀系数与FRD芯片2的热膨胀系数大致相等的陶瓷片4的缓冲体6，即使发生温度循环，也能抑制通电不良的发生，提高半导体装置200的可靠性。
进而，IGBT芯片11与发射极图案8，与FRD芯片2同样地经由缓冲体66通过终端导线77进行连接。在IGBT芯片11与终端导线77之间，也具备具有热膨胀系数与IGBT芯片11的热膨胀系数基本相等的陶瓷片4的缓冲体66。由此，即使发生温度循环，也能在IGBT芯片11中抑制通电不良的发生，提高可靠性。
如上所示的实施方式的半导体装置100～300，具有IGBT芯片11与FRD芯片11逆并联接合的构造。但是，本发明中的效用并不限于这些，而是即使在例如半导体装置仅具备FRD芯片2的情况，或者仅具备IGBT芯片11的情况下，同样地也能够应用。即，半导体装置至少通过具备经由具有陶瓷的缓冲体将半导体芯片和终端导线电气性接合的构造，对于温度循环来提高可靠性。
以上说明了本发明的若干实施方式，但这些实施方式，是作为例子提示的，并不是用来限定本发明的范围的。这些新颖的实施方式能够以其他各种方式进行实施，在不脱离发明的要旨的范围内能够进行各种省略、置换、变更。这些实施方式及其变形包含在发明的范围及要旨中，并且包含在与权利要求书所记载的发明等同的范围中。

Claims (15)

1.一种半导体装置，其特征在于，具备：
第1半导体芯片，具有第1电极、设于所述第1电极的相反侧的第2电极，在所述第1电极与所述第2电极之间流动电流；
缓冲体，具有与所述第2电极电气性连接的下部金属箔、经由所述下部金属箔而设于所述第2电极上的陶瓷片、以及设于所述陶瓷片的与所述下部金属箔相反的一侧并与所述下部金属箔电气性连接的上部金属箔；以及
终端导线，其一端设于所述上部金属箔上并与所述上部金属箔电气性连接。
2.如权利要求1所述的半导体装置，其特征在于，
所述陶瓷片由Al2O3、AlN、SiN中的任意一个构成。
3.如权利要求1所述的半导体装置，其特征在于，
所述下部金属箔和所述上部金属箔通过连接导体电气性连接。
4.如权利要求1所述的半导体装置，其特征在于，
所述连接导体设于所述陶瓷片的侧端部，
所述下部金属箔、所述上部金属箔以及所述连接导体由同一金属一体地形成。
5.如权利要求3所述的半导体装置，其特征在于，
所述连接导体设于贯通所述陶瓷片的孔。
6.如权利要求5所述的半导体装置，其特征在于，
所述连接导体是银焊锡。
7.如权利要求1所述的半导体装置，其特征在于，
所述上部金属箔以及所述下部金属箔由铜或者铝构成。
8.如权利要求1所述的半导体装置，其特征在于，
所述第2电极与所述下部金属箔通过焊料电气性连接。
9.如权利要求1所述的半导体装置，其特征在于，
所述第1半导体芯片为二极管。
10.如权利要求1所述的半导体装置，其特征在于，
所述第1半导体芯片，在设有所述第2电极的一侧具有控制所述第1电极和所述第2电极之间流动的所述电流的控制电极。
11.如权利要求10所述的半导体装置，其特征在于，
所述第1半导体芯片为MOSFET以及IGBT中的任意一个。
12.如权利要求1所述的半导体装置，其特征在于，
还具备：陶瓷基板，在该陶瓷基板的一个表面具有第1布线图案和与所述第1布线图案相离而设的第2布线图案，
所述第1半导体芯片经由所述第1电极与所述第1布线图案电气性连接地设置，
所述终端导线的与所述一端相反的一侧的另一端电气性连接于所述第2布线图案。
13.如权利要求12所述的半导体装置，其特征在于，
还具备：第2半导体芯片，该第2半导体芯片具有第3电极、设于所述第3电极的相反侧的第4电极，在所述第4电极侧的表面具有控制所述第3电极和所述第4电极之间流动的电流的第5电极，
所述陶瓷基板，在所述一个表面还具有设于关于所述第1布线图案与所述第2布线图案相反的一侧的第3布线图案，
所述第2半导体芯片被设置为经由所述第3电极电气性连接于所述第1布线图案，
所述第2半导体芯片的所述第4电极电气性连接于所述第2布线图案，
所述第2半导体芯片的所述第5电极电气性连接于所述第3布线图案。
14.如权利要求13所述的半导体装置，其特征在于，还具备：
金属散热板，在表面搭载了所述陶瓷基板；
树脂匣，具有在所述金属散热板的所述表面上包围所述陶瓷基板的环状构造；
树脂盖，设于所述树脂匣的与所述金属散热板相反的一侧的所述环状构造的开口部；
第1外部取出端子，贯通所述树脂盖，固定于所述树脂盖，并电气性连接于所述第1布线图案上，
第2外部取出端子，贯通所述树脂盖，固定于所述树脂盖，并电气性连接于所述第2布线图案上，
第3外部取出端子，贯通所述树脂盖，固定于所述树脂盖，并电气性连接于所述第3布线图案上，以及
硅凝胶，充填于所述树脂匣内，覆盖所述第1半导体芯片以及所述第2半导体芯片。
15.如权利要求12所述的半导体装置，其特征在于，
所述第1电极是阴极电极，
所述第2电极是阳极电极。
CN2012100575230A 2011-09-21 2012-03-07 半导体装置 Pending CN103021979A (zh)

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