CN102859671A - 半导体器件以及半导体器件的制造方法 - Google Patents

半导体器件以及半导体器件的制造方法 Download PDF

Info

Publication number
CN102859671A
CN102859671A CN2011800187629A CN201180018762A CN102859671A CN 102859671 A CN102859671 A CN 102859671A CN 2011800187629 A CN2011800187629 A CN 2011800187629A CN 201180018762 A CN201180018762 A CN 201180018762A CN 102859671 A CN102859671 A CN 102859671A
Authority
CN
China
Prior art keywords
wiring member
semiconductor device
electronic unit
wiring
grafting material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2011800187629A
Other languages
English (en)
Inventor
大西一永
高宫喜和
船越孝章
小平悦宏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Publication of CN102859671A publication Critical patent/CN102859671A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
    • H01L2224/26152—Auxiliary members for layer connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
    • H01L2224/26175—Flow barriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/4501—Shape
    • H01L2224/45012—Cross-sectional shape
    • H01L2224/45015—Cross-sectional shape being circular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
    • H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/48638—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/48647—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48699—Principal constituent of the connecting portion of the wire connector being Aluminium (Al)
    • H01L2224/487—Principal constituent of the connecting portion of the wire connector being Aluminium (Al) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/48738—Principal constituent of the connecting portion of the wire connector being Aluminium (Al) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/48747—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48799—Principal constituent of the connecting portion of the wire connector being Copper (Cu)
    • H01L2224/488—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/48838—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/48847—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83009—Pre-treatment of the layer connector or the bonding area
    • H01L2224/83051—Forming additional members, e.g. dam structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83447—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85447—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92—Specific sequence of method steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01028—Nickel [Ni]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01042—Molybdenum [Mo]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3512—Cracking

Abstract

在抑制制造成本时提高可靠性。半导体器件（100）包括基板（110）、安装在基板（110）上的绝缘基板（141和142）、在绝缘基板（141和142）上形成的金属图案（152和155）、隔着接合材料安装在金属图案（152和155）上的电子部件、以及与配线用布线分开的布线构件（201至206），该布线构件包含抗接合材料的材料并且在金属图案（152和155）上以及在电子部件周围形成。

Description

半导体器件以及半导体器件的制造方法
技术领域
本发明涉及使用接合材料的半导体器件、以及半导体器件的制造方法。
背景技术
存在其中电子部件隔着焊料安装于在绝缘基板上形成的金属层上的半导体器件。在该半导体器件的情况下，当隔着焊料在金属层上安装电子部件时，焊料流向周边，并且可能发生例如焊料扩散直至金属层的边缘、或者焊料扩散直至安装在金属层上的另一电子部件所设置的位置。
当焊料扩散直至金属层的边缘时，在施加热时在金属层的边缘附近向绝缘基板施加高应力，并且存在出现裂纹的可能性。同样，当焊料扩散直至另一电子部件所设置的位置时，存在其影响另一电子部件的结的可能性。
响应于此，为了抑制焊料的扩散，可构想例如在安装电子部件的位置周围在金属层上形成抗焊料的绝缘膜、或者在安装电子部件的位置周围在金属层中形成狭缝。
存在例如其中功率半导体元件隔着绝缘层通过焊料结合到安装在热沉的一个主表面上的金属图案上、并且金属图案被焊料掩模分成功率半导体元件形成区和布线中继区的功率半导体器件（例如，参见专利文献1）。
同样，存在例如具有其中密封盖焊接到绝缘材料的表面的焊料密封区的多芯片模块基板，其中金属层设置在焊料密封区内部或外部，并且没有金属层的恒定宽度的带状区域在焊料密封区和金属层之间的边界部分中形成为闭环（例如，参见专利文献2）。
相关技术文献
专利文献
专利文献1：JP-A-2009-158787
专利文献2：JP-A-9-74165
发明内容
本发明要解决的问题
然而，根据在安装电子部件的位置周围在金属层上形成抗焊料的绝缘膜的方法，用于形成绝缘膜的步骤最近是必要的，并且存在制造成本增加的可能性。同样，通过在超过280°C至300°C的温度区域中热分解有机物来生成气体，并且（1）掩模易于变成脱离的，这意味着难以进行组装。（2）气氛中的杂质浓度较高，并且难以进行组装。
同样，根据在安装电子部件的位置周围在金属层中形成狭缝的方法，当金属层形成电信号路径时，金属层的电感由于设置在金属层中的狭缝而改变，并且存在其影响半导体器件的电特性的可能性。为此，也许不可能在金属层中形成狭缝。
这些问题不限于在使用焊料时发生，还可在使用另一接合材料时以相同的方式发生。
鉴于这种类型的观点，本发明的目的在于，提供在抑制制造成本时提高可靠性的半导体器件、以及该半导体器件的制造方法。
解决问题的手段
为了实现上述目的，提供以下半导体器件、以及半导体器件制造方法。
半导体器件包括：基板；安装在基板上的绝缘基板；在绝缘基板上形成的金属层；隔着接合材料安装在金属层上的电子部件；与配线用布线分开的布线构件，该布线构件包含抗接合材料的材料并且在金属层上以及在电子部件周围形成。
同样，半导体器件制造方法包括：在金属层上且在电子部件安装区域周围形成与配线用布线分开的布线构件的步骤，该布线构件包含抗接合材料的材料，并且该金属层形成于安装在基板上的绝缘基板上且包括电子部件安装区域；以及在形成布线构件之后隔着接合材料在金属层上安装电子部件以覆盖电子部件安装区域的步骤。
本发明的优点
根据所公开的半导体器件、以及半导体器件制造方法，有可能在抑制制造成本时提高可靠性。
通过与示出作为本发明示例的优选实施方式的附图相关的以下描述，本发明的上述以及其他目的、特征、以及优点将得以阐明。
附图说明
图1是示出根据第一实施方式的半导体器件的示例的俯视图。
图2是示出根据第一实施方式的半导体器件的示例的截面图。
图3是示出根据第一实施方式的半导体器件的一个示例的部分放大图。
图4是示出根据第一实施方式的半导体器件的一个示例的部分放大图。
图5是示出参考例1的器件的示图。
图6是示出参考例2的器件的示图。
图7是示出参考例2的试验结果的示图。
图8是示出参考例3的器件的示图。
图9是示出参考例3的试验结果的示图。
图10是示出根据第一实施方式的半导体器件的修改例1的示图。
图11是示出根据第一实施方式的半导体器件的修改例1的示图。
图12是示出根据第一实施方式的半导体器件的修改例1的示图。
图13是示出根据第一实施方式的半导体器件的修改例2的示图。
图14是示出根据第二实施方式的半导体器件的示例的工艺图。
图15是示出根据第二实施方式的半导体器件的示例的工艺图。
图16是示出根据第二实施方式的半导体器件的示例的工艺图。
图17是示出根据第二实施方式的半导体器件的示例的工艺图。
具体实施方式
在下文中，将参考附图给出对各种实施方式的描述。
[第一实施方式]
图1是示出根据第一实施方式的半导体器件的示例的俯视图。图2是示出根据第一实施方式的半导体器件的示例的截面图。在此，图2对应于沿着图1的虚线A-A的截面图。
半导体器件100具有包括前表面111和后表面112的基板110。例如，金属板用作基板110。具体地，可使用例如铜、诸如Cu-Mo（铜-钼合金）之类的铜合金、或者AlSiC（碳化铝硅）作为基板110的材料。同样，例如，散热片（未示出）设置在基板110的后表面112上。
在基板110的前表面111上分别隔着接合材料121和122形成金属图案131和132。例如，焊料用作接合材料121和122。使用例如铜或铝作为金属图案131和132的材料。在铝的情况下，进行诸如Ni镀覆之类的处理以实现焊料结合。
绝缘基板141在金属图案131上形成。绝缘基板142在金属图案132上形成。使用例如基于氮化铝、氮化硅、或氧化铝的陶瓷作为绝缘基板141和142的材料。
金属图案151、152、153和154在绝缘基板141上形成。金属图案155和156在绝缘基板142上形成。使用例如铜作为金属图案151至156的材料。
半导体元件171、172、173和174以及外部连接端子181隔着接合材料161安装在金属图案152上。外部连接端子181设置在半导体元件171和半导体元件173之间。
外部连接端子182隔着接合材料162安装在金属图案155上。外部连接端子183隔着接合材料162安装在金属图案156上。
例如，焊料用作接合材料161和162。使用例如铜、黄铜、或磷青铜作为外部连接端子181至183的材料。例如，绝缘栅双极晶体管（IGBT）或续流二极管（FWD）用作半导体元件171至174。
半导体元件171和金属图案151通过多条配线用接合线191电连接。半导体元件171和半导体元件172通过多条配线用接合线192电连接。半导体元件172和金属图案153通过多条配线用接合线193电连接。
半导体元件173和金属图案151通过多条配线用接合线194电连接。半导体元件173和半导体元件174通过多条配线用接合线195电连接。半导体元件174和金属图案153通过多条配线用接合线196电连接。
金属图案154和金属图案156通过配线用布线接合线197电连接。金属图案153和金属图案155通过配线用接合线198电连接。使用例如铝、铜、或金作为配线用接合线191至198的材料。
此外，在金属图案152上，布线构件201在外部连接端子181和半导体元件171之间形成，而布线构件202在外部连接端子181和半导体元件173之间形成。
同样，布线构件203和204在金属图案155上形成，其中一个布线构件在外部连接端子182和金属图案155的任一边缘之间形成。布线构件205和206在金属图案156上形成，其中一个布线构件在外部连接端子183和金属图案156的任一边缘之间形成。
抗接合材料161的材料用作布线构件201和202，而抗接合材料162的材料用作布线构件203至206。抗接合材料意味着与接合材料具有低反应性。即，与接合材料161的湿润性差的材料用作布线构件201和202，而与接合材料162湿润性差的材料用作布线构件203至206。
例如，与配线用接合线191至198相同的材料用作布线构件201至206。具体地，铝用作布线构件201至206的材料。铝合具有焊料抗性。即，铝与焊料的湿润性差。
同样，布线构件201至206与诸如配线用接合线191至198之类的配线用接合线分开地设置。即，除了金属图案152以外，布线构件201和202不结合到金属图案151以及153至156或者半导体元件171至174。除了金属图案155以外，布线构件203和204不结合到金属图案151至154以及156或者半导体元件171至174。除了金属图案155以外，布线构件205和206不结合到金属图案151至155或者半导体元件171至174。
上述半导体元件171至174以及外部连接端子181至183各自可简称为电子部件。
接着，将给出对金属图案155上的结构的细节的描述。图3是示出根据第一实施方式的半导体器件的一个示例的部分放大图。图3(A)是其中切出图1的虚线D1所划界的区域的部分俯视图。图3(B)对应于沿着图3的虚线A-A的截面图。
其形状为长方形的金属图案155具有与长边相对应的边缘155a和155b、以及与短边相对应的边缘155c和155d。外部连接端子182具有基座部182a和突出部182b。外部连接端子182以基座部182a置于金属图案155的中央的方式设置。
接合材料162被形成为包围外部连接端子182。外部连接端子182的基座部182a通过接合材料162结合。接合材料162与金属图案155的边缘155a至155d中的每一个都间隔开一预定距离。
布线构件203设置在外部连接端子182和金属图案155的边缘155a之间。布线构件203具有多个布线部203a和多个接合部203b。多个接合部203b沿着边缘155a对齐地设置。多个布线部203a中的每一个都沿着边缘155a延伸。
布线构件204设置在外部连接端子182和金属图案155的边缘155b之间。布线构件204具有多个布线部204a和多个接合部204b。多个接合部204b沿着边缘155b对齐地设置。多个布线部204a中的每一个都沿着边缘155b延伸。
布线部203a和204a的直径为例如125至500μm。同样，多个接合部203b之间、以及多个接合部204b之间的间隔例如小于或等于6mm、优选小于或等于3mm。
金属图案156上的外部连接端子183、接合材料162、以及布线构件205和206同样具有与金属图案155上的外部连接端子182、接合材料162、以及布线构件203和204相同的配置。
接着，将给出对金属图案152上的结构的细节的描述。图4是示出根据第一实施方式的半导体器件的一个示例的部分放大图。图4(A)是其中切出图1的虚线D2所划界的区域的部分俯视图。图4(B)对应于沿着图4的虚线A-A的截面图。图4(C)对应于沿着图4的虚线B-B的截面图。
在此，将给出对其中结合半导体元件171的一个接合材料取为接合材料161a、且结合外部连接端子181的一个接合材料取为接合材料161b的接合材料161的描述。
半导体元件171和外部连接端子181彼此相邻地设置。金属图案152和半导体元件171之间的间隙用接合材料161a填充。此外，接合材料161a的一部分在半导体元件171的周围延伸出来。
外部连接端子181具有基座部181a和突出部181b。接合材料161b被形成为包围外部连接端子181。外部连接端子181的基座部181a通过接合材料161b结合。接合材料161a和接合材料161b间隔开一预定距离。
布线构件201设置在半导体元件171和外部连接端子181之间。布线构件201具有多个布线部201a和多个接合部201b。
多个接合部201b在与半导体元件171和外部连接端子181的结合方向垂直的方向上对齐地设置。多个布线部201a中的每一个都在与半导体元件171和外部连接端子181的结合方向垂直的方向上延伸。
布线部201a的直径为例如125至500μm。同样，多个接合部201b的间隔例如小于或等于6mm、优选小于或等于3mm。
以与布线构件201相同的方式，布线构件202也在半导体元件173和外部连接端子181之间形成。
如上所述，在半导体器件100中，在金属图案155上，与配线用接合线分开的包含抗接合材料162的材料的布线构件203和204在外部连接端子182和金属图案155的边缘155a和155b之间形成，如图3所示。
根据该配置，即使当结合外部连接端子182的接合材料162流动并在隔着接合材料162在金属图案155上安装外部连接端子182时四处扩散等时，布线构件203和204抗接合材料162，并且接合材料162被布线构件203和204阻止（stem）。为此，有可能防止接合材料162到达金属图案155的边缘155a和155b。
当接合材料162扩散直至金属图案155的边缘155a和155b时，在施加热时在金属图案155的边缘155a和155b附近向绝缘基板142施加高应力，并且存在出现裂纹的可能性。当在绝缘基板142中出现裂纹时，存在发生部分放电、或者发生击穿电压下降的可能性。
在此，将使用参考例给出对裂纹出现的描述。图5是示出参考例1的器件的示图。图6是示出参考例2的器件的示图。图5(A)是示出参考例1的器件的俯视图，而图5(B)对应于沿着图5(A)的虚线A-A的截面图。图6(A)是示出参考例2的器件的俯视图，而图6(B)对应于沿着图6(A)的虚线A-A的截面图。
首先，将给出对参考例1的器件300的描述。如图5(A)和(B)所示，器件300具有使用铜合金作为材料的金属基板310。铜箔330隔着焊料320在金属基板310上形成。陶瓷基板340在铜箔330上形成。铜箔350在陶瓷基板340上形成。使用铜作为材料的外部连接端子370隔着焊料360安装在铜箔350上。
在此，外部连接端子370邻近铜箔350的边缘351设置，并且焊料360扩散直至铜箔350的边缘351。在此情况下，由于陶瓷基板340、铜箔350、以及焊料360的热膨胀系数实质上不同，因此当向器件300施加热时，向置于铜箔350的边缘351附近的陶瓷基板340施加高应力，并且存在出现裂纹341的可能性，如图5(B)所示。
接着，将给出对参考例2的器件400的描述。如图6(A)和(B)所示，器件400具有使用铜合金作为材料的金属基板410。铜箔430隔着焊料420在金属基板410上形成。陶瓷基板440在铜箔430上形成。铜箔450在陶瓷基板440上形成。使用铜作为材料的外部连接端子470隔着焊料460安装在铜箔450上。
在此，外部连接端子470设置在铜箔450的中央，并且焊料460扩散直至铜箔450的边缘451和452。在此情况下，由于陶瓷基板440、铜箔450、以及焊料460的热膨胀系数实质上不同，因此当向器件400施加热时，向置于铜箔450的边缘451和452附近的陶瓷基板440施加高应力，并且存在出现裂纹441和442的可能性，如图6(B)所示。
在半导体器件100的情况下，由于如上所述有可能防止接合材料162到达金属图案155的边缘155a和155b，因此有可能抑制在金属图案155的边缘155a和155b附近在绝缘基板142中出现裂纹的可能性。同样，在半导体器件100的情况下，由于布线构件205和206也以与在金属图案155上相同的方式在金属图案156上形成，因此有可能抑制在金属图案156的边缘附近在绝缘基板142中出现裂纹的可能性。为此，有可能提高半导体器件100的可靠性。
图7是示出参考例2的试验结果的示图。图7所示的曲线图的横轴表示工艺温度周期，而纵轴表示在陶瓷基板440中出现的裂纹的裂纹长度。当在外部连接端子470与铜箔450的边缘451和452中的每一个之间形成布线构件、以及未形成布线构件时，该曲线图示出通过使用器件400对其中铜箔450形成为厚的结构A、以及其中铜箔450形成为薄的结构B执行温度周期试验所获取的结果。
折线a1示出在形成布线构件时的结构A中的试验结果。折线a2示出在未形成布线构件时的结构A中的试验结果。折线b1示出在形成布线构件时的结构B中的试验结果。折线b2示出在未形成布线构件时的结构B中的试验结果。
从该曲线图中可见，在结构A和B中的每一个结构中，在形成布线构件时在陶瓷基板440中出现的裂纹的裂纹长度较短。在结构B中，很少出现裂纹、或者不出现裂纹，如折线b1所示。
此外，在半导体器件100中，布线构件203和204的布线部203a和204a分别沿着金属图案155的边缘155a和155b延伸，如图3所示。
为此，布线部203a和204a在与接合材料162流动的方向交叉的方向上延伸，这意味着有可能有效地阻止接合材料162流向金属图案155的边缘155a和155b。同样，以与布线构件203和204相同的方式，布线构件205和206还可有效地阻止接合材料162流向金属图案156的边缘。
此外，在半导体器件100的情况下，由于布线构件203至206可通过与配线用布线接合线191至198相同的布线接合工艺来形成，因此不需要新的步骤来设置布线构件203至206。为此，有可能抑制制造成本。
此外，由于布线构件203至206的材料成本低，因此有可能降低半导体器件100的成本。
同样，在半导体器件100中，在金属图案152上，与配线用接合线分开的包含抗接合材料161a和161b的材料的布线构件201在半导体元件171和外部连接端子181之间形成，如图4所示。
根据该配置，即使当接合材料161a和接合材料161b流动并在隔着接合材料161a和161b在金属图案152上安装半导体元件17和外部连接端子181时四处扩散时，布线构件201抗接合材料161a和161b，并且接合材料161a和161b被布线构件201阻止。为此，有可能防止接合材料161a和接合材料161b会合。
当接合材料161a和接合材料161b会合时，可对半导体元件171的结合产生影响。将使用参考例3给出对该影响的描述。图8是示出参考例3的器件的示图。
图8(A)是示出参考例3的器件的俯视图。图8(B)和(C)对应于沿着图8(A)的虚线A-A的截面图。在此，图8(B)和(C)示出在发生不同现象时的器件的截面图。
如图8(A)至(C)所示，器件500具有使用铜合金作为材料的金属基板510。铜箔530隔着焊料520在金属基板510上形成。陶瓷基板540在铜箔530上形成。铜箔550在陶瓷基板540上形成。半导体元件570隔着焊料560a安装，并且此外，使用铜作为材料的外部连接端子580隔着焊料560b安装在铜箔550上。
在此，半导体元件570和外部连接端子580彼此相邻地设置，并且焊料560a和焊料560b会合。在此情况下，存在发生以下两种现象的可能性。
首先，作为第一现象，当焊料560a和焊料560b会合时，焊料560a被拉到外部连接端子580侧，并且存在半导体元件570下方出现空隙561的可能性，如图8(B)所示。在此情况下，从半导体元件570向金属基板510的散热路径的热阻增大，并且存在散热减少的可能性。当散热减少时，半导体元件570未充分地冷却，从而导致更高的温度，这影响布线等并且可靠性降低。
接着，作为第二现象，当焊料560a和焊料560b会合时，焊料560b被拉到半导体元件570侧，并且存在半导体元件570下方的接合材料变厚的可能性，如图8(C)所示。同样在此情况下，从半导体元件570向金属基板510的散热路径的热阻增大，并且存在散热减少的可能性。
40至60W/mK数量级的焊料的热导率显著地低于诸如铝或铜之类的金属的热导率（200至400W/mK数量级）。
在半导体器件100的情况下，由于如上所述有可能防止接合材料161a和接合材料161b会合，因此有可能避免出现空隙、或者半导体元件171下方的接合材料变厚的现象。为此，有可能抑制从半导体元件171向基板110的散热路径的热阻的增大。
同样，在半导体器件100的情况下，由于在金属图案152上布线构件202也以相同的方式在半导体元件173和外部连接端子181之间形成，因此有可能防止接合半导体元件173的接合材料以及接合外部连接端子181的接合材料161b会合，并且有可能抑制从半导体元件173向基板110的散热路径的热阻增大。
为此，在半导体器件100的情况下，有可能在同一金属图案152上相邻地设置半导体元件171和173以及外部连接端子181而不减少散热。即，有可能在平衡尺寸的减小和散热的提高的同时实现半导体器件100。
此外，在半导体器件100的情况下，布线构件201的布线部201a在与半导体元件171和外部连接端子181接合的方向垂直的方向上延伸，如图4所示。
为此，布线部201a在与接合材料161a和161b流动的方向交叉的方向上延伸，这意味着有可能有效地阻止接合材料161a和161b。同样，以与布线构件201相同的方式，布线构件202也可有效地阻止接合半导体元件173的接合材料、以及接合外部连接端子181的接合材料161b。
此外，在半导体器件100的情况下，由于布线构件201和202可通过与配线用接合线191至198相同的布线接合工艺来形成，因此不需要新的步骤来设置布线构件201和202。为此，有可能抑制制造成本。
此外，由于布线构件201和202的材料成本低，因此有可能降低半导体器件100的成本。
图9是示出参考例3的试验结果的示图。图9所示的表格示出当其中在半导体元件570和外部连接端子580之间形成接合间距为6mm的布线构件、形成接合间距为3mm的布线构件、以及不形成布线构件的大量半导体器件各自加载到参考例3的器件500中时对焊料560a和焊料560b会合情况的数量（发生次数）计数所获取的结果。
如在该表格中所示，形成接合间距为3mm的布线构件的发生率为0%。形成接合间距为6mm的布线构件的发生率为低值6%。不形成布线构件的发生率为100%。如可见的，通过形成布线构件，有可能防止焊料560a和焊料560b会合。
在半导体器件100的情况下，还有可能获取与安装其他电子部件（例如，半导体元件）来代替外部连接端子181至183时的以上所述的优点相同的优点。
（修改例1）
将给出对其中在金属图案155和156上形成其他布线构件来代替布线构件203至206的多个修改例的描述作为修改例1。图10至12是示出根据第一实施方式的半导体器件的修改例1的示图。在此，将给出对作为代表的金属图案155上的结构的描述。
图10至12所示的各个附图示出彼此不同的修改例。同样，图10至12所示的每一附图对应于图3(A)所示的部分俯视图。
在图10(A)所示的修改例中，具有布线部和多个接合部的布线构件501在外部连接端子182与金属图案155的边缘155a和155b中的每一个之间形成。
在图10(B)所示的修改例中，具有多个布线部和多个接合部的布线部502在外部连接端子182与金属图案155的边缘155a和155b中的每一个之间形成。
在图10(C)所示的修改例中，形成多个布线构件503，其中从每一布线构件切出布线部、且每一布线构件仅由接合部构成。多个布线构件503在外部连接端子182与金属图案155的边缘155a和155b中的每一个之间沿着边缘155a和155b中的每一个对齐地设置。
在此，仅由接合部构成的布线构件也称为布线构件。布线构件503没有任何布线部，但是接合材料162可被接合部阻止。
此外，由于布线构件503没有布线部的事实，多个布线构件503可通过布线接合器件以短的间隔设置。
在图10(D)所示的修改例中，多个布线构件503以包围外部连接端子182的方式形成。
在图11(A)所示的修改例中，外部连接端子182邻近金属图案155的边缘155d。同样也适用于图11(B)至(F)以及图12(A)至(E)所示的修改例。
此外，在图11(A)所示的修改例中，具有多个布线部和多个接合部的布线构件504在外部连接端子182与金属图案155的边缘155a和155b中的每一个之间形成。
在图11(B)所示的修改例中，布线构件504在外部连接端子182与金属图案155的边缘155a和155b中的每一个之间形成。此外，布线构件503在外部连接端子182和金属图案155的边缘155d之间形成。
在图11(C)所示的修改例中，布线构件504在外部连接端子182与金属图案155的边缘155a和155b中的每一个之间形成。此外，布线构件503在外部连接端子182与金属图案155的边缘155c和155d中的每一个之间形成。
在图11(D)所示的修改例中，布线构件501在外部连接端子182与金属图案155的边缘155a和155b中的每一个之间形成。
在图11(E)所示的修改例中，多个布线构件503在外部连接端子182与金属图案155的边缘155a和155b中的每一个之间沿着边缘155a和155b中的每一个对齐地设置。
在图11(F)所示的修改例中，布线构件503在外部连接端子182与金属图案155的边缘155a、155b和155d之间形成。
在图12(A)至(E)所示的每一修改例中，多个布线构件503以包围外部连接端子182的方式形成。
（修改例2）
接着，将给出对其中在金属图案152上形成其他布线构件来代替布线构件201和202的多个修改例的描述作为半导体器件100的修改例2。图13是示出根据第一实施方式的半导体器件的修改例2的示图。在此，将给出对作为代表的半导体元件171和外部连接端子181之间的结构的描述。
图13所示的各个附图示出彼此不同的修改例。同样，图13所示的每一附图对应于图4(A)所示的部分俯视图。
在图13(A)所示的修改例中，具有布线部和多个接合部的布线构件511在外部连接端子181和半导体元件171之间形成。
在图13(B)至(E)所示的修改例中，形成多个布线构件512，其中从每一布线构件切出布线部、且每一布线构件仅由接合部构成。多个布线构件512在外部连接端子181和半导体元件171之间形成，并且在与外部连接端子181和半导体元件171接合的方向交叉的方向上对齐地设置。
布线构件512没有任何布线部，但是接合材料161a和161b可被接合部阻止。
此外，由于布线构件512没有布线部的事实，多个布线构件512可通过布线接合器件以短的间隔设置。
[第二实施方式]
接着，将给出对第一实施方式的半导体器件100的制造方法的描述作为第二实施方式。图14至17是示出根据第二实施方式的半导体器件的制造方法的一个示例的工艺图。图14是俯视图，而图15是沿着图14的虚线A-A的截面图。图16是俯视图，而图17是沿着图16的虚线A-A的截面图。
首先，制备其中金属图案131和132隔着接合材料121和122在基板110上形成、绝缘基板141和142在金属图案131和132上形成、而金属图案151至156在绝缘基板141和142上形成的多层体，如图14和15所示。然后，隔着接合材料161在多层体上的金属图案152上安装半导体元件171至174。
接着，使用布线接合器件来形成配线用接合线191至198以及布线构件201至206，如图16和17所示。即，以相同的配线用接合步骤形成配线用接合线191至198和布线构件201至206。
接着，将接合材料161供应到金属图案152上，并且将接合材料162供应到金属图案155和156上。随后，隔着接合材料161在金属图案152上安装外部连接端子181，隔着接合材料162在金属图案155上安装外部连接端子182，并且隔着接合材料162在金属图案156上安装外部连接端子183。通过以上工艺生成图1和2所示的半导体器件100。
以此方式，根据第二实施方式的半导体器件的制造方法，布线构件201至206通过与配线用接合线191至198相同的布线接合工艺形成。
根据该配置，不需要新的步骤来形成布线构件201至206。为此，有可能抑制制造成本。
以上描述简单地示出本发明的原理。此外，本领域技术人员可作出其许多修改和变更的本发明不限于以上显示和描述的准确配置和应用，并且相应的修改例和等效方案被视为在所附权利要求及其等效方案所涵盖的本发明的范围内。
附图标记的说明
100 半导体器件
110 基板
111 前表面
112 后表面
121、122、161、161a、161b、162 接合材料
131、132、151至156 金属图案
141、142 绝缘基板
155a至155 d边缘
171至174 半导体元件
181至183 外部连接端子
181a、182a 基座部
181b、182b 突出部
191至198 配线用接合线
201至206、501至504、511、512 布线构件
201a、203a、204a 布线部
201b、203b、204b 接合部

Claims (14)

1.一种半导体器件，其特征在于，所述半导体器件包括：
基板；
安装在所述基板上的绝缘基板；
在所述绝缘基板上形成的金属层；
隔着接合材料安装在所述金属层上的电子部件；以及
与配线用布线分开的布线构件，所述布线构件包含抗所述接合材料的材料并且在所述金属层上以及在所述电子部件周围形成。
2.如权利要求1所述的半导体器件，其特征在于，
所述布线构件设置在所述电子部件与所述金属层的边缘之间。
3.如权利要求2所述的半导体器件，其特征在于，
所述布线构件具有布线部，并且所述布线部沿着所述金属层的边缘延伸。
4.如权利要求2所述的半导体器件，其特征在于，
所述布线构件具有接合部，并且多个接合部沿着所述金属层的边缘对齐地设置。
5.如权利要求2至4中任一项所述的半导体器件，其特征在于
所述电子部件是外部连接端子。
6.如权利要求1所述的半导体器件，其特征在于，
另一电子部件隔着接合材料安装在所述金属层上；以及
所述布线构件设置在所述电子部件和所述另一电子部件之间。
7.如权利要求6所述的半导体器件，其特征在于，
所述布线构件具有布线部，并且所述布线部在与所述电子部件和所述另一电子部件的结合方向交叉的方向上延伸。
8.如权利要求6所述的半导体器件，其特征在于，
所述布线构件具有接合部，并且多个接合部在与所述电子部件和所述另一电子部件的结合方向交叉的方向上对齐地设置。
9.如权利要求6至8中任一项所述的半导体器件，其特征在于
所述电子部件是外部连接端子，并且所述另一电子部件是半导体元件。
10.如权利要求6至8中任一项所述的半导体器件，其特征在于
所述电子部件和所述另一电子部件中的每一个都是半导体元件。
11.如权利要求1至10中任一项所述的半导体器件，其特征在于
所述接合材料是焊料。
12.一种半导体器件制造方法，其特征在于，所述半导体器件制造方法包括：
在金属层上且在电子部件安装区域周围形成与配线用布线分开的布线构件，所述布线构件包含抗接合材料的材料，并且所述金属层形成于安装在基板上的绝缘基板上且包括所述电子部件安装区域；以及
在形成所述布线构件之后，隔着所述接合材料在所述金属层上安装电子部件以覆盖所述电子部件安装区域。
13.如权利要求12所述的半导体器件制造方法，其特征在于，
形成布线构件的所述步骤通过与形成配线用布线的步骤相同的布线结合工艺来执行。
14.如权利要求12或13所述的半导体器件制造方法，其特征在于，所述接合材料是焊料。
CN2011800187629A 2010-12-03 2011-09-08 半导体器件以及半导体器件的制造方法 Pending CN102859671A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2010-270080 2010-12-03
JP2010270080 2010-12-03
PCT/JP2011/070472 WO2012073572A1 (ja) 2010-12-03 2011-09-08 半導体装置、および、半導体装置の製造方法

Publications (1)

Publication Number Publication Date
CN102859671A true CN102859671A (zh) 2013-01-02

Family

ID=46171528

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2011800187629A Pending CN102859671A (zh) 2010-12-03 2011-09-08 半导体器件以及半导体器件的制造方法

Country Status (5)

Country Link
US (1) US8664765B2 (zh)
EP (1) EP2546869A4 (zh)
JP (1) JP5776701B2 (zh)
CN (1) CN102859671A (zh)
WO (1) WO2012073572A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7305603B2 (ja) 2020-09-18 2023-07-10 株式会社東芝 半導体装置

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI467272B (zh) * 2012-06-08 2015-01-01 E Ink Holdings Inc 接合結構
JP5975926B2 (ja) * 2013-03-29 2016-08-23 本田技研工業株式会社 半導体チップの実装方法
JP6086055B2 (ja) * 2013-11-26 2017-03-01 トヨタ自動車株式会社 半導体装置
DE102014110473A1 (de) 2014-07-24 2016-01-28 Osram Opto Semiconductors Gmbh Träger für ein elektrisches Bauelement
DE102014114982B4 (de) * 2014-10-15 2023-01-26 Infineon Technologies Ag Verfahren zum Bilden einer Chip-Baugruppe
FR3028665B1 (fr) * 2014-11-18 2021-11-26 Ulis Assemblage d'un composant plan sur un support plan
US10600753B2 (en) * 2015-08-28 2020-03-24 Texas Instruments Incorporated Flip chip backside mechanical die grounding techniques
JP7347047B2 (ja) 2019-09-12 2023-09-20 富士電機株式会社 半導体装置
JP7422646B2 (ja) 2020-11-27 2024-01-26 三菱電機株式会社 半導体装置および半導体装置の製造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000286289A (ja) * 1999-03-31 2000-10-13 Fujitsu Ten Ltd 金属貼付基板および半導体装置
JP2002124550A (ja) * 2000-10-17 2002-04-26 Hitachi Cable Ltd テープキャリア及びそれを用いた半導体装置
CN101587870A (zh) * 2008-05-23 2009-11-25 富士电机电子技术株式会社 半导体器件
JP2010103222A (ja) * 2008-10-22 2010-05-06 Fuji Electric Systems Co Ltd 半導体装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0974165A (ja) 1995-09-07 1997-03-18 Oki Electric Ind Co Ltd マルチチップモジュール用基板
JP4608810B2 (ja) * 2001-05-23 2011-01-12 パナソニック株式会社 表面実装型の半導体装置
US7615873B2 (en) * 2004-04-21 2009-11-10 International Rectifier Corporation Solder flow stops for semiconductor die substrates
JP2006351988A (ja) * 2005-06-20 2006-12-28 Denki Kagaku Kogyo Kk セラミック基板、セラミック回路基板及びそれを用いた電力制御部品。
JP4924411B2 (ja) 2007-12-27 2012-04-25 三菱電機株式会社 電力半導体装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000286289A (ja) * 1999-03-31 2000-10-13 Fujitsu Ten Ltd 金属貼付基板および半導体装置
JP2002124550A (ja) * 2000-10-17 2002-04-26 Hitachi Cable Ltd テープキャリア及びそれを用いた半導体装置
CN101587870A (zh) * 2008-05-23 2009-11-25 富士电机电子技术株式会社 半导体器件
JP2010103222A (ja) * 2008-10-22 2010-05-06 Fuji Electric Systems Co Ltd 半導体装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7305603B2 (ja) 2020-09-18 2023-07-10 株式会社東芝 半導体装置
US11705438B2 (en) 2020-09-18 2023-07-18 Kabushiki Kaisha Toshiba Semiconductor device

Also Published As

Publication number Publication date
US8664765B2 (en) 2014-03-04
JPWO2012073572A1 (ja) 2014-05-19
JP5776701B2 (ja) 2015-09-09
US20130020725A1 (en) 2013-01-24
WO2012073572A1 (ja) 2012-06-07
EP2546869A4 (en) 2017-01-25
EP2546869A1 (en) 2013-01-16

Similar Documents

Publication Publication Date Title
CN102859671A (zh) 半导体器件以及半导体器件的制造方法
US8963321B2 (en) Semiconductor device including cladded base plate
JP5572678B2 (ja) クラッド型ベースプレートを含む半導体装置
US7190581B1 (en) Low thermal resistance power module assembly
US9648732B2 (en) Semiconductor device
US20150092379A1 (en) Semiconductor device and method for manufacturing the same
US9390995B2 (en) Semiconductor device and method of manufacturing the same
CN102593081A (zh) 包括散热器的半导体器件
CN105428321B (zh) 一种气密性芯片倒装安装用陶瓷焊盘阵列外壳结构
US20160056088A1 (en) Cold Plate, Device Comprising a Cold Plate and Method for Fabricating a Cold Plate
CN103477429A (zh) 半导体器件及其制造方法
US20150076681A1 (en) Semiconductor package and semiconductor device
EP3276657A1 (en) Cooler, power semiconductor module arrangement having a cooler, and methods for producing the same
EP3367435A2 (en) Electronic assembly with enhanced thermal dissipation thanks to a metallic bonding layer composed of solder and copper
JP2017123360A (ja) 半導体モジュール
JP2017017109A (ja) 半導体装置
JP2012064855A (ja) 半導体装置
JP2006287168A (ja) 混成回路と複合基板を具えたパッケージ構造
JP4062157B2 (ja) 半導体モジュール実装構造
JP2014007323A (ja) 半導体パッケージ
JP2013120866A (ja) 半導体装置
US20180315679A1 (en) Circuit cooled on two-sides
CN104867897A (zh) 一种二极管功率模块
CN112310029A (zh) 衬板和基体集成的功率半导体器件及其制造方法
KR101897304B1 (ko) 파워 모듈

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20130102