CN102844860A - 具有组装在半蚀刻的金属引线框架上的芯片的球栅阵列器件 - Google Patents

具有组装在半蚀刻的金属引线框架上的芯片的球栅阵列器件 Download PDF

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Publication number
CN102844860A
CN102844860A CN2011800187864A CN201180018786A CN102844860A CN 102844860 A CN102844860 A CN 102844860A CN 2011800187864 A CN2011800187864 A CN 2011800187864A CN 201180018786 A CN201180018786 A CN 201180018786A CN 102844860 A CN102844860 A CN 102844860A
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CN
China
Prior art keywords
terminal
lead
lead frame
metal
wire
Prior art date
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Pending
Application number
CN2011800187864A
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English (en)
Chinese (zh)
Inventor
R·C·雅维耶
S·K·科杜里
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Texas Instruments Inc
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Texas Instruments Inc
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Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of CN102844860A publication Critical patent/CN102844860A/zh
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/411—Chip-supporting parts, e.g. die pads
    • H10W70/415—Leadframe inner leads serving as die pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/04—Manufacture or treatment of leadframes
    • H10W70/042—Etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H10W70/424—Cross-sectional shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/456—Materials
    • H10W70/457—Materials of metallic layers on leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5366—Shapes of wire connectors the bond wires having kinks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
CN2011800187864A 2010-04-12 2011-04-12 具有组装在半蚀刻的金属引线框架上的芯片的球栅阵列器件 Pending CN102844860A (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US32308810P 2010-04-12 2010-04-12
US61/323,088 2010-04-12
US12/902,306 US20110248392A1 (en) 2010-04-12 2010-10-12 Ball-Grid Array Device Having Chip Assembled on Half-Etched metal Leadframe
US12/902,306 2010-10-12
PCT/US2011/032094 WO2011130252A2 (en) 2010-04-12 2011-04-12 Ball-grid array device having chip assembled on half-etched metal leadframe

Publications (1)

Publication Number Publication Date
CN102844860A true CN102844860A (zh) 2012-12-26

Family

ID=44760335

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2011800187864A Pending CN102844860A (zh) 2010-04-12 2011-04-12 具有组装在半蚀刻的金属引线框架上的芯片的球栅阵列器件

Country Status (4)

Country Link
US (1) US20110248392A1 (https=)
JP (1) JP2013524552A (https=)
CN (1) CN102844860A (https=)
WO (1) WO2011130252A2 (https=)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103972196A (zh) * 2013-02-04 2014-08-06 飞思卡尔半导体公司 利用倒装芯片片芯附接的阵列引线框架封装
CN104465593A (zh) * 2014-11-13 2015-03-25 苏州日月新半导体有限公司 半导体封装体及封装方法
CN105720035A (zh) * 2016-03-25 2016-06-29 上海凯虹科技电子有限公司 引线框架及采用该引线框架的封装体

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CN102879246A (zh) * 2012-09-28 2013-01-16 无锡江南计算技术研究所 封装芯片金相制样方法以及金相样品模具
US10345343B2 (en) 2013-03-15 2019-07-09 Allegro Microsystems, Llc Current sensor isolation
US9190606B2 (en) * 2013-03-15 2015-11-17 Allegro Micosystems, LLC Packaging for an electronic device
US9640468B2 (en) * 2014-12-24 2017-05-02 Stmicroelectronics S.R.L. Process for manufacturing a package for a surface-mount semiconductor device and semiconductor device
US11081429B2 (en) * 2019-10-14 2021-08-03 Texas Instruments Incorporated Finger pad leadframe
JP2022140870A (ja) * 2021-03-15 2022-09-29 株式会社村田製作所 回路モジュール
JP7241805B2 (ja) 2021-05-24 2023-03-17 アオイ電子株式会社 半導体装置およびその製造方法
US11768230B1 (en) 2022-03-30 2023-09-26 Allegro Microsystems, Llc Current sensor integrated circuit with a dual gauge lead frame

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Cited By (5)

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Publication number Priority date Publication date Assignee Title
CN103972196A (zh) * 2013-02-04 2014-08-06 飞思卡尔半导体公司 利用倒装芯片片芯附接的阵列引线框架封装
CN103972196B (zh) * 2013-02-04 2018-05-29 恩智浦美国有限公司 利用倒装芯片片芯附接的阵列引线框架封装
CN104465593A (zh) * 2014-11-13 2015-03-25 苏州日月新半导体有限公司 半导体封装体及封装方法
CN104465593B (zh) * 2014-11-13 2018-10-19 苏州日月新半导体有限公司 半导体封装体及封装方法
CN105720035A (zh) * 2016-03-25 2016-06-29 上海凯虹科技电子有限公司 引线框架及采用该引线框架的封装体

Also Published As

Publication number Publication date
JP2013524552A (ja) 2013-06-17
WO2011130252A3 (en) 2012-01-26
WO2011130252A2 (en) 2011-10-20
US20110248392A1 (en) 2011-10-13

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Application publication date: 20121226