CN102650786B - 一种薄膜晶体管阵列基板及其制造方法和显示装置 - Google Patents

一种薄膜晶体管阵列基板及其制造方法和显示装置 Download PDF

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CN102650786B
CN102650786B CN201210129992.9A CN201210129992A CN102650786B CN 102650786 B CN102650786 B CN 102650786B CN 201210129992 A CN201210129992 A CN 201210129992A CN 102650786 B CN102650786 B CN 102650786B
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contact hole
resin bed
film transistor
packed layer
chock insulator
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崔贤植
徐智强
李会
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BOE Technology Group Co Ltd
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Abstract

本发明公开了一种薄膜晶体管阵列基板及其制造方法和显示装置,在形成有薄膜晶体管阵列的基板上形成树脂层;利用构图工艺对树脂层进行构图,形成隔垫物和接触孔填充层;该接触孔填充层用于填充薄膜晶体管阵列基板上的接触孔;在形成有隔垫物和接触孔填充层的基板上形成取向膜。由于使用接触孔填充层填平阵列基板上的接触孔,在后续取向液涂覆时,取向液就不会流到接触孔内,而引起取向液固化后形成的取向膜厚度减少,避免了图像出现残像以及图像对比度减少的问题。

Description

一种薄膜晶体管阵列基板及其制造方法和显示装置
技术领域
本发明涉及显示技术领域,尤其涉及一种薄膜晶体管阵列基板及其制造方法和显示装置。
背景技术
目前,在薄膜晶体管(TFT)阵列基板上使用传统的氮化硅工艺(SiNx PA)制作绝缘层,不会出现接触孔的问题,如图1所示。但是,在TFT阵列基板上使用树脂工艺(Resin PA)制作绝缘层,如图2所示,就会出现许多像像素点一样的接触孔1,在后续的取向液例如PI液2涂覆时,PI液2会流到这些接触孔中,引起固化后的取向膜厚度减少。
一般地,接触孔容量的大小以及数量的多少和PI膜厚度的减少成正比,即,接触孔越多,接触孔越大,PI膜厚度减少的越多,而接触孔的数量正比于像素的数量,在60-120PPI的普通分辨率下,接触孔引起的PI膜厚度的减少还不明显,不会造成明显的缺点;但是,在大于1700PPI的高分辨率下,例如1.5μm深的接触孔会引起PI膜厚度较大的减少,如从
Figure BDA0000158322070000011
减少到
Figure BDA0000158322070000012
过薄的PIP膜会引起液晶器件显示的图像出现残像,以及图像对比度减少问题。
为了避免PI膜厚度减少的问题,现有技术中的方法一般为增加PI液中PI的比例,例如:在FFS TFT基板中涂覆的PI液中PI的比例一般在5%-6.5%,稍高于在TN TFT基板中涂覆的PI液中的比例,但是,一般PI液的比例很难高于6.5%,如果PI液中PI的比例太高,PI液过于粘稠,会引起PI液涂覆不均匀的问题。因此,现有的这种做法对于高分辨率的TFT基板,并不能有效地避免PI层厚度的减少而带来的问题。
发明内容
本发明实施例提供了一种薄膜晶体管阵列基板及其制造方法和显示装置,用以解决现有技术中接触孔引起取向膜厚度减少,引起图像出现残像以及图像对比度减少的问题。
本发明实施例提供的薄膜晶体管阵列基板的制作方法,包括:
在形成有薄膜晶体管阵列的基板上形成树脂层;
利用构图工艺对所述树脂层进行构图,形成隔垫物和接触孔填充层;所述接触孔填充层用于填充所述薄膜晶体管阵列基板上的接触孔;
在形成有所述隔垫物和所述接触孔填充层的基板上形成取向膜。
本发明实施例还提供了一种薄膜晶体管阵列基板,包括薄膜晶体管阵列和取向膜,还包括:
位于所述薄膜晶体管阵列上的隔垫物;以及
填充在所述薄膜晶体管阵列基板上的接触孔内的接触孔填充层;
所述取向膜形成在所述接触孔填充层和所述薄膜晶体管阵列上。
本发明实施例还提供了一种显示装置,包括本发明实施提供的薄膜晶体管阵列基板。
本发明实施例的有益效果包括:
本发明实施例提供的一种薄膜晶体管阵列基板及其制造方法和显示装置,在形成有薄膜晶体管阵列的基板上形成树脂层;利用构图工艺对树脂层进行构图,形成隔垫物和接触孔填充层;该接触孔填充层用于填充薄膜晶体管阵列基板上的接触孔;在形成有隔垫物和接触孔填充层的基板上形成取向膜。由于使用接触孔填充层填平阵列基板上的接触孔,在后续取向液涂覆时,取向液就不会流到接触孔内,而引起生成的取向膜厚度的减少,避免了图像出现残像以及图像对比度减少的问题。
附图说明
图1为现有技术中在TFT阵列基板上使用SiNx PA制作绝缘层时形成取向膜后的结构示意图;
图2为现有技术中在TFT阵列基板上使用Resin PA制作绝缘层时形成取向膜后的结构示意图;
图3为本发明实施例提供的TFT阵列基板的制造方法的流程图;
图4为本发明实施例提供的TFT阵列基板上形成树脂层后的结构示意图;
图5为本发明实施例提供的使用双色调掩膜板对树脂层进行曝光处理的示意图;
图6为本发明实施例提供的显影后的TFT阵列基板的的结构示意图;
图7为本发明实施例提供的TFT阵列基板的结构示意图。
具体实施方式
下面结合附图,对本发明实施例提供的薄膜晶体管阵列基板及其制造方法和显示装置的具体实施方式进行详细地说明。
本发明实施例提供的一种薄膜晶体管阵列基板的制作方法,如图3所示,具体包括以下几个步骤:
步骤S301、在形成有薄膜晶体管阵列的基板上形成树脂层。
如图4所示,形成的树脂层3的厚度会大于薄膜晶体管阵列基板上的接触孔4的孔深,即树脂层3将会填满接触孔4;
具体地,在形成有薄膜晶体管的阵列基板上形成的树脂层3为负性感光材料层。
其中,树脂层3的具体材料可以是正性感光材料,也可是负性感光材料,树脂层3的形成属于现有技术,在此不再赘述。
以下步骤,以负性感光材料为例进行说明,但本发明并不局限于负性感光材料。
步骤S302、利用构图工艺对树脂层进行构图,形成隔垫物和接触孔填充层;
所述接触孔填充层用于填充薄膜晶体管阵列基板上的接触孔;
较佳地,形成的接触孔填充层的厚度和接触孔的深度一致。
较佳地,步骤S302利用构图工艺对树脂层进行构图,形成隔垫物和接触孔填充层的具体过程为:
在形成有树脂层3的阵列基板上,利用双色调掩模板5对树脂层3进行曝光处理,如图5所示;其中,双色调掩模板5的完全透光区域对应树脂层3用于形成隔垫物的区域6,双色调掩模板5的部分透光区域对应树脂层3用于形成接触孔填充层的区域7,双色调掩模板5的完全不透光区域对应树脂层5除用于形成隔垫物和接触孔填充层以外的区域;进一步的,双色调掩模板5可以是半色调掩模板(Half Tone Mask),也可以是灰色调掩模板(Gray ToneMask)。
由于树脂层3为负性感光材料层,因此,在经过光照射(图5中的箭头所示)即曝光后,双色调掩模板5的完全透光区域对应的树脂层3用于形成隔垫物的区域6会产生光化学反应,形成所需的隔垫物(PS);双色调掩模板5的部分透光区域对应的树脂层3用于形成接触孔填充层的区域7会有部分树脂发生光化学反应,形成接触孔填充层,填平薄膜晶体管阵列基板上的接触孔;而双色调掩模板的完全不透光区域对应的树脂层3的区域没有发生光化学反应,在后续操作中会被去除掉。
曝光处理后,对树脂层进行显影处理,去除掉没有发生光化学反应的树脂层,形成隔垫物8和接触孔填充层9,如图6所示,形成的隔垫物8在薄膜晶体管阵列基板和彩膜基板的对合过程中将会起到液晶间隙的作用。
较佳地,在曝光过程中,对于树脂层3用于形成隔垫物的区域6的曝光量可以为100%;对于树脂层3用于形成接触孔填充层的区域7的曝光量可以为小于50%。并且,曝光时间一般控制在3-8秒,这样能够防止过度曝光,以确保形成在接触孔内的接触孔填充层9的高度与接触孔的深度一致,这样使得接触孔的表面与其他区域齐平。
S303、在形成有隔垫物8和接触孔填充层9的基板上形成取向膜10。
例如取向膜(PI膜),如图7所示,在图中可以看出,由于接触孔已经被接触孔填充层9填平,因此,形成在薄膜晶体管阵列基板上的取向液不会因为流到接触孔中而引起不均匀的情况,均匀的取向液固化后形成厚度均匀的取向膜10,从而防止了因厚度减少引起的残像及对比度不均的情况,由于取向膜10的形成工艺为现有技术,可以是印刷工艺或涂覆工艺,在此不再赘述。
较佳地,在具体实施时,形成的取向膜10的厚度一般在0.6-0.8μm。
较佳地,还可以采用多次印刷取向液的工艺,来保证形成的取向膜的厚度。
本发明实施例还提供了一种薄膜晶体管阵列基板,如图7所示,包括薄膜晶体管阵列11和取向膜10,还包括:
位于薄膜晶体管阵列11上的隔垫物8;以及
填充在薄膜晶体管阵列11基板上的接触孔内的接触孔填充层9;
其中,取向膜10形成在接触孔填充层9和薄膜晶体管阵列11上。
较佳地,上述薄膜晶体管阵列基板中的隔垫物8和接触孔填充层9的材料为树脂材料,具体可以为负性感光材料和正性感光材料。
较佳地,上述薄膜晶体管阵列基板中的接触孔填充层9的厚度与接触孔的深度一致。
较佳地,上述薄膜晶体管阵列基板中的取向膜10的厚度为0.6~0.8μm。
本发明实施例还提供了一种显示装置,包括本发明实施例提供的上述薄膜晶体管阵列基板。所述显示装置可以为:液晶面板、电子纸、OLED面板、液晶电视、液晶显示器、数码相框、手机、平板电脑等具有任何显示功能的产品或部件。
本发明实施例提供的一种薄膜晶体管阵列基板及其制造方法和显示装置,在形成有薄膜晶体管阵列的基板上形成树脂层;利用构图工艺对树脂层进行构图,形成隔垫物和接触孔填充层;该接触孔填充层用于填充薄膜晶体管阵列基板上的接触孔;在形成有隔垫物和接触孔填充层的基板上形成取向膜。由于使用接触孔填充层填平阵列基板上的接触孔,在后续取向液涂覆时,取向液就不会流到接触孔内,而引起生成的取向膜厚度的减少,避免了图像出现残像以及图像对比度减少的问题。
显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。

Claims (3)

1.一种薄膜晶体管阵列基板的制作方法,其特征在于,包括:
在形成有薄膜晶体管阵列的基板上形成树脂层;
利用同一构图工艺对所述树脂层进行构图,同时形成隔垫物和接触孔填充层;所述接触孔填充层用于填充所述薄膜晶体管阵列基板上的接触孔;形成的所述接触孔填充层的厚度和所述接触孔的深度一致;
在形成有所述隔垫物和所述接触孔填充层的基板上形成取向膜;
所述利用同一构图工艺对所述树脂层进行构图,形成隔垫物和接触孔填充层,具体包括:
在形成有所述树脂层的阵列基板上,利用双色调掩模板对所述树脂层进行曝光处理,其中,所述双色调掩模板的完全透光区域对应所述树脂层用于形成所述隔垫物的区域,所述双色调掩模板的部分透光区域对应所述树脂层用于形成所述接触孔填充层的区域,所述双色调掩模板的完全不透光区域对应所述树脂层除用于形成所述隔垫物和所述接触孔填充层以外的区域;
曝光处理后对所述树脂层进行显影处理,形成所述隔垫物和所述接触孔填充层。
2.如权利要求1所述的方法,其特征在于,在形成有薄膜晶体管阵列的基板上形成的所述树脂层为负性感光材料层。
3.如权利要求1或2所述的方法,其特征在于,所述取向膜的厚度为0.6~0.8μm。
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CN102650786B (zh) * 2012-04-27 2014-04-02 京东方科技集团股份有限公司 一种薄膜晶体管阵列基板及其制造方法和显示装置
CN103500731B (zh) * 2013-10-18 2015-07-01 京东方科技集团股份有限公司 Oled背板及其制作方法
CN104407224A (zh) * 2014-11-27 2015-03-11 合肥京东方光电科技有限公司 半导体-金属接触电阻率检测方法、阵列基板
KR20160086521A (ko) * 2015-01-09 2016-07-20 삼성디스플레이 주식회사 액정 표시 장치 및 그 제조 방법
CN104656315B (zh) 2015-03-17 2017-08-25 合肥鑫晟光电科技有限公司 液晶显示基板及其制备方法
CN104880865B (zh) * 2015-06-19 2019-03-19 武汉华星光电技术有限公司 阵列基板及其制作方法、液晶面板
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Publication number Priority date Publication date Assignee Title
JPH11111995A (ja) 1997-10-03 1999-04-23 Matsushita Electric Ind Co Ltd 表示装置の製造方法
JP2003280020A (ja) 2002-03-22 2003-10-02 Seiko Epson Corp 電気光学装置及びその製造方法並びに電子機器
JP4021392B2 (ja) * 2002-10-31 2007-12-12 セイコーエプソン株式会社 電気光学装置及び電子機器
KR100570974B1 (ko) 2003-06-25 2006-04-13 삼성에스디아이 주식회사 박막 트랜지스터
JP4717392B2 (ja) * 2004-08-13 2011-07-06 富士通株式会社 液晶表示装置用基板及びそれを備えた液晶表示装置
CN100498487C (zh) 2007-05-17 2009-06-10 友达光电股份有限公司 液晶面板及其制造方法
CN101387799B (zh) * 2007-09-13 2011-04-13 北京京东方光电科技有限公司 液晶显示器基板、液晶显示器及制造方法
CN101398570A (zh) * 2007-09-26 2009-04-01 北京京东方光电科技有限公司 液晶显示装置及制造方法
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