CN102629574A - 一种氧化物tft阵列基板及其制造方法和电子器件 - Google Patents
一种氧化物tft阵列基板及其制造方法和电子器件 Download PDFInfo
- Publication number
- CN102629574A CN102629574A CN201110241809XA CN201110241809A CN102629574A CN 102629574 A CN102629574 A CN 102629574A CN 201110241809X A CN201110241809X A CN 201110241809XA CN 201110241809 A CN201110241809 A CN 201110241809A CN 102629574 A CN102629574 A CN 102629574A
- Authority
- CN
- China
- Prior art keywords
- active layer
- tft array
- array substrate
- barrier layer
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 48
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 23
- 239000004065 semiconductor Substances 0.000 claims abstract description 28
- 238000000034 method Methods 0.000 claims abstract description 25
- 239000012212 insulator Substances 0.000 claims abstract description 17
- 238000005530 etching Methods 0.000 claims abstract description 14
- 238000000151 deposition Methods 0.000 claims abstract description 10
- 230000004888 barrier function Effects 0.000 claims description 46
- 238000013459 approach Methods 0.000 claims description 17
- 239000000463 material Substances 0.000 claims description 10
- 238000001039 wet etching Methods 0.000 claims description 9
- 238000001312 dry etching Methods 0.000 claims description 8
- 230000015572 biosynthetic process Effects 0.000 claims description 7
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 6
- 238000002360 preparation method Methods 0.000 claims description 6
- 238000009413 insulation Methods 0.000 claims description 3
- 230000008021 deposition Effects 0.000 abstract description 5
- 238000004140 cleaning Methods 0.000 abstract description 4
- 238000012545 processing Methods 0.000 abstract description 4
- 230000000694 effects Effects 0.000 abstract description 3
- 239000000203 mixture Substances 0.000 abstract description 3
- 238000012827 research and development Methods 0.000 abstract description 3
- 238000000059 patterning Methods 0.000 abstract 2
- 230000001360 synchronised effect Effects 0.000 abstract 2
- 238000005516 engineering process Methods 0.000 description 17
- 230000003647 oxidation Effects 0.000 description 12
- 238000007254 oxidation reaction Methods 0.000 description 12
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 9
- 239000010408 film Substances 0.000 description 8
- 238000002161 passivation Methods 0.000 description 5
- 239000010409 thin film Substances 0.000 description 4
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 229910001182 Mo alloy Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 238000009832 plasma treatment Methods 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000000047 product Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
Abstract
本发明涉及TFT制造方法，特别涉及一种氧化物TFT阵列基板及其制造方法和电子器件。本发明在栅极绝缘层上先后连续形成有源层和阻挡层，通过同步连续刻蚀工艺对有源层和阻挡层进行图形化。本发明在没有增加曝光掩膜次数的情况下，减少了在氧化物半导体成膜之后，先进行一次构图工艺使氧化物半导体进行图形化，而后经过剥离，清洗等工艺后再进行阻挡层的沉积等工艺步骤，避免了上述工艺过程中对氧化物半导体薄膜表面及特性的影响。同时本发明所采用同步连续刻蚀的工艺过程可以有效的提高产品的性能和良率，进而减少了研发和生产成本。
Description
技术领域
本发明涉及TFT制造方法，特别涉及一种氧化物TFT阵列基板及其制造方法和电子器件。
背景技术
氧化物薄膜晶体管(Oxide TFT)最初的研究是为了降低有源显示器件的能耗，令显示器件的更薄更轻，相应速度更快而研发的技术。大约在二十一世纪初开始走向试用阶段。随着具有超薄、重量轻、低耗电，同时其自身发光的特点，可以提供更艳丽的色彩和更清晰的影像的新一代有机发光液晶面板OLED(Organic Light-Emitting Diode，有机发光二极管)正式走上实用阶段。氧化物TFT技术也被人们给予为能够代替现有LTPS(Low Temperature Poly Silicon，低温多晶硅技术)，特别是大尺寸显示领域被广泛研究的最有应用前景的技术。
图2为氧化物TFT阵列基板截面图，图1为现有技术中氧化物TFT阵列基板制造方法的流程框图，具体包括步骤S101～S111。现有技术通过6次曝光掩膜(Mask)来形成栅线层、氧化物半导体层、阻挡层(Etch Stop Layer，ESL)，数据线层，接触孔(Via hole)和像素电极。
氧化物TFT阵列基板的有源层是氧化物半导体，有源层的制作是氧化物TFT阵列基板制作的关键环节，其步骤包括：
S105、在栅极绝缘层形成氧化物半导体有源层；
S106、对氧化物半导体有源层进行图形化。
上述现有技术工艺对氧化物半导体层先进行一次构图工艺使氧化物半导体进行图形化，而后经过剥离，清洗等工艺后再进行阻挡层的沉积。对有源层氧化物半导体图形化工艺主要的刻蚀工艺有两种，一种为湿法刻蚀，另一种为干法刻蚀，无论采用哪种刻蚀工艺，都不能避免对氧化物半导体薄膜表面造成损害，影响最后产品的性能。
发明内容
(一)要解决的技术问题
本发明要解决的技术问题是：提供一种减小对有源层氧化物半导体表面及性能影响的氧化物TFT阵列基板的制造方法。
(二)技术方案
为了解决上述技术问题，本发明提供一种氧化物TFT阵列基板的制造方法，包括步骤：
M1、在基板上依次制备栅电极和栅极绝缘层；
M2、制备有源层和阻挡层；
M3、形成数据线、电源线和接触孔，并制备像素电极；
其中步骤M2包括：
S305、在栅极绝缘层上形成有源层氧化物半导体；
S306、有源层上形成阻挡层；
S307、对有源层和阻挡层进行图形化，
S308、对阻挡层进行二次图形化；
其中，步骤S307使用有源层掩模板进行图形化，使有源层和阻挡层形成有源层图案。
其中，步骤S308采用阻挡层掩模板进行二次图形化，使阻挡层形成阻挡层图案。
其中，步骤S307中使用干法刻蚀或者湿法刻蚀对有源层和阻挡层进行图形化。
其中，步骤S307中使用干法刻蚀或者湿法刻蚀对阻挡层进行图形化。
其中，步骤S305中使用磁控溅射沉积法或者溶液法在在栅极绝缘层上形成有源层氧化物半导体。
其中，氧化物半导体材料为IGZO、ITGO、IZO、ITO。
本发明还提供了一种氧化物TFT阵列基板，包括栅电极、栅绝缘层、有源层、阻挡层、数据线和像素电极，所述有源层和阻挡层是通过同步连续刻蚀工艺实现图形化的。
进一步地，所述有源层的材料为IGZO、ITGO、IZO或ITO。
本发明还提供一种电子器件，包括上述的氧化物TFT阵列基板。
(三)有益效果
上述技术方案具有如下优点：本发明的氧化物TFT阵列基板制造方法在没有增加曝光掩膜次数的情况下，减少了在氧化物半导体成膜之后，先进行一次构图工艺使氧化物半导体进行图形化，而后经过剥离、清洗等工艺后再进行阻挡层的沉积等工艺步骤，避免了上述工艺过程中对氧化物半导体薄膜表面及特性的影响。同时本发明所采用同步连续刻蚀的工艺过程可以有效的提高产品的性能和良率，进而减少了研发和生产成本。
附图说明
图1是现有技术氧化物TFT阵列基板制造方法流程图；
图2是氧化物TFT阵列基板截面图；
图3是本发明实施例氧化物TFT阵列基板制造方法流程图；
图4A是本发明实施例步骤S301后氧化物TFT阵列基板截面图；
图4B是本发明实施例步骤S302后氧化物TFT阵列基板截面图；
图4C是本发明实施例步骤S303后氧化物TFT阵列基板截面图；
图4D是本发明实施例步骤S305后氧化物TFT阵列基板截面图；
图4E是本发明实施例步骤S306后氧化物TFT阵列基板截面图；
图4F是本发明实施例步骤S307后氧化物TFT阵列基板截面图；
图4G是本发明实施例步骤S308后氧化物TFT阵列基板截面图；
图4H是本发明实施例步骤S309沉积金属层后氧化物TFT阵列基板截面图；
图4I是本发明实施例步骤S309后氧化物TFT阵列基板截面图；
图4J是本发明实施例步骤S310沉积钝化层后氧化物TFT阵列基板截面图；
图4K是本发明实施例步骤S310后氧化物TFT阵列基板截面图；
图4L是本发明实施例步骤S310形成像素电极层后氧化物TFT阵列基板截面图。
其中，401：基板；402：栅极金属层；402a：栅电极；403：栅极绝缘层；404：有源层；405：阻挡层；406：金属层；407：钝化层；407a：接触孔；408：像素电极层；408a：源电极；408b：漏电极。
具体实施方式
下面结合附图和实施例，对本发明的具体实施方式作进一步详细描述。以下实施例用于说明本发明，但不用来限制本发明的范围。
本实施例氧化物TFT阵列基板制造方法的流程框图如图3所示。图4A～图4L为本发明氧化物TFT阵列基板的制造过程中的截面图。
S301、在基板上形成栅电极层。
如图4A所示，采用磁控溅射的方法在玻璃基板401上形成栅极金属层402。栅电极的材料根据不同的器件结构和工艺要求可以进行选择，通常被采用的栅电极金属有Mo、Cu、Ti及其合金等，厚度一般采用200nm-350nm，令其方块电阻保持在一个相对比较低的水平。
S302、对栅电极进行图形化。
第一次曝光掩膜：通过湿法刻蚀的方式，对栅极金属层402进行图形化，形成图4B中所示的栅电极402a。
S303、在栅电极上形成栅极绝缘层403。
如图4C所示，在栅电极图形化后，通过Pre-clean(成膜前清洗)工艺，通过PECVD(等离子体增强化学汽相淀积法)，在带有栅极图案的基板上制备栅极绝缘层403。栅极绝缘层403的材料选择比较广泛，如二氧化硅(SiO2)薄膜，氮化硅(SiNx)薄膜，氮氧化硅(SiOxNy)薄膜，氧化铝(Al2O3)薄膜，TiOx薄膜以及复合的多层结构的薄膜。
S304、对栅极绝缘层进行表面处理。
在TFT的制备过程中，栅极绝缘层表面的特性对整个TFT的特性的影响起着非常重要的作用，在氧化物TFT中显现得尤其重要。本实施例中采用等离子处理机(Plasma)对栅极绝缘层403进行处理或者表面修饰。
S305、有源层氧化物半导体的形成。
氧化物TFT制作最为关键的环节就是有源层404的制作。本实施例采用磁控溅射沉积方法在栅极绝缘层403上形成氧化物半导体材料的有源层404，完成后结构如图4D所示。现在广为使用的氧化物半导体有铟镓锌氧化物(IGZO)、铟镓锡氧化物(ITGO)、铟锌氧化物(IZO)、氧化铟锡(ITO)等，以及与其相关的不同比例的配合物。
S306、形成刻蚀阻挡层。
在有源层403上直接形成刻蚀阻挡层(简称阻挡层)405，完成后结构如图4E所示，阻挡层405其材料因不同的工艺要求而不同，通常需用如SiOx、SiNx，SiOxNy、Al2O3、TiOx等无机绝缘材料，其目的是为了减少在数据线图形化的过程中，对氧化物半导体薄膜造成伤害。
在有源层404和阻挡层405先后形成之后，通过同步连续刻蚀(Single-step Continuous Etch Method，以下简称SCEM)工艺对有源层404和阻挡层405进行图形化，其步骤包括S307和S308：
S307、对有源层404和阻挡层405进行图形化。
第二次曝光掩膜：采用有源层404图形化的掩模板对阻挡层405进行图形化工艺。本实施例采用干法刻蚀的方法对阻挡层405进行图形化；在阻挡层405被刻蚀之后，对有源层404进行图形化；完成后结构如图4F所示。
S308、对阻挡层405进行二次图形化。
第三次曝光掩膜：用阻挡层4的掩模板对阻挡层405进行二次刻蚀工艺，从而得到阻挡层图案，完成后结构如图4G所示。本实施例采用干法刻蚀的方法。
S309、形成数据线和电源线。
首先，采用磁控溅射的方法在表面沉积一层金属层406，如图4H所示；
第四次曝光掩膜：在金属层形成后，采用湿法刻蚀的方法对其进行图形化工艺形成数据线和电源线，完成后结构如图4I所示。
电极材料根据不同的器件结构和工艺要求可以进行选择，通常被采用的电极金属有Mo，Mo/Al/Mo合金，Mo/Al-Nd/Mo叠层结构的电极、Cu以及金属钛及其合金，ITO电极等，厚度一般采用100nm-350nm，令其方块电阻保持在一个相对比较低的水平。
S310、Via hole刻蚀。
在数据线和电源线图形化之后，在整个平面形成一层钝化层407，完成后结构如图4J所示。钝化层通常需用如SiOx、SiNx，SiOxNy、Al2O3、TiOx等无机绝缘材料。
第五次曝光掩膜：在钝化层形成之后进行Via hole的刻蚀，用以实现各导线以及与像素电极的连接，完成后接触孔407a如图4K中所示。
S311、像素电极的沉积及图形化。
如图4L所示，在接触孔407a形成之后，形成像素电极层408，其材料现在广为采用的铟锡氧化物ITO电极。
第六次曝光掩膜：通过湿法刻蚀的方法对像素电极层408进行图形化，形成源电极408a、和漏电极408b，完成后结构如图2所示。
本实施例通过6次曝光掩膜来形成栅线层、有源层404、阻挡层405，数据线层，接触孔407a和像素电极，在不增加曝光掩膜次数的情况下，采用SCEM方法很好的保护了有源层氧化物半导体，避免了有源层的沟道区域被直接光照和刻蚀。进而改善了TFT器件的性能，从而对整个基板良率的提升，降低成本起到非常关键的作用。
上述实施例步骤S305中可以使用磁控溅射沉积法或者溶液法等方法在栅极绝缘层403上形成有源层404氧化物半导体。
上述实施例步骤S307和步骤S308中可以使用干法刻蚀或者湿法刻蚀对有源层404和阻挡层405进行图形化。
本发明还提供一种氧化物TFT阵列基板，其采用上述方法制得。所述氧化物TFT阵列基板包括栅电极、栅绝缘层、有源层、阻挡层、数据线和像素电极，所述有源层和阻挡层通过SCEM工艺实现图形化。所述有源层的材料可以为IGZO、ITGO、IZO或ITO。由于采用SCEM方法很好地保护了有源层氧化物半导体，避免了有源层的沟道区域被直接光照和刻蚀，改善了TFT器件的性能，并且具有更高的良率，更低的成本。
本发明实施例还提供一种电子器件，使用了上述的阵列基板。所述电子器件可以为液晶面板、电子纸显示屏、OLED显示屏、手机、平板电脑等。
以上所述仅是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明技术原理的前提下，还可以做出若干改进和替换，这些改进和替换也应视为本发明的保护范围。
Claims (10)
1.一种氧化物TFT阵列基板的制造方法，包括步骤：
M1、在基板上依次制备栅电极(402a)和栅极绝缘层(403)；
M2、制备有源层(404)和阻挡层(405)；
M3、形成数据线、电源线和接触孔，并制备像素电极；
其特征在于，所述步骤M2包括：
S305、在栅极绝缘层(403)上形成有源层氧化物半导体；
S306、有源层(404)上形成阻挡层(405)；
S307、对有源层(404)和阻挡层(405)进行图形化；
S308、对阻挡层(405)进行二次图形化。
2.如权利要求1所述的氧化物TFT阵列基板的制造方法，其特征在于，所述步骤S307使用有源层掩模板进行图形化，使有源层(404)和阻挡层(405)形成有源层图案。
3.如权利要求1所述的氧化物TFT阵列基板的制造方法，其特征在于，所述步骤S308采用阻挡层掩模板进行二次图形化，使阻挡层(405)形成阻挡层图案。
4.如权利要求1所述的氧化物TFT阵列基板的制造方法，其特征在于，所述步骤S307中使用干法刻蚀或者湿法刻蚀对有源层(404)和阻挡层(405)进行图形化。
5.如权利要求1所述的氧化物TFT阵列基板的制造方法，其特征在于，所述步骤S308中使用干法刻蚀或者湿法刻蚀对阻挡层(405)进行图形化。
6.如权利要求1所述的氧化物TFT阵列基板的制造方法，其特征在于，所述步骤S305中使用磁控溅射沉积法或者溶液法在栅极绝缘层(403)上形成有源层氧化物半导体。
7.如权利要求1所述的氧化物TFT阵列基板的制造方法，其特征在于，所述氧化物半导体材料为IGZO、ITGO、IZO或ITO。
8.一种氧化物TFT阵列基板，包括栅电极、栅绝缘层、有源层、阻挡层、数据线和像素电极，其特征在于，所述有源层和阻挡层是通过同步连续刻蚀工艺实现图形化的。
9.如权利要求8所述的氧化物TFT阵列基板，其特征在于，所述有源层的材料为IGZO、ITGO、IZO或ITO。
10.一种电子器件，其特征在于，包括权利要求8或9所述的氧化物TFT阵列基板。
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110241809XA CN102629574A (zh) | 2011-08-22 | 2011-08-22 | 一种氧化物tft阵列基板及其制造方法和电子器件 |
| US13/702,393 US20130207100A1 (en) | 2011-08-22 | 2012-08-20 | Oxide tft array substrate, method for manufacturing the same, and electronic apparatus using the same |
| EP12794159.9A EP2743977A4 (en) | 2011-08-22 | 2012-08-20 | THIN FILM OXIDE TRANSISTOR NETWORK SUBSTRATE, METHOD FOR MANUFACTURING SAME, AND ELECTRONIC DEVICE |
| KR1020127031369A KR20130043634A (ko) | 2011-08-22 | 2012-08-20 | 산화물 박막 트랜지스터 어레이 기판, 그 제조방법 및 그것을 이용한 전자장치 |
| JP2014526372A JP2014524666A (ja) | 2011-08-22 | 2012-08-20 | 酸化物ｔｆｔアレイ基板及びその製造方法並びに電子デバイス |
| PCT/CN2012/080380 WO2013026382A1 (zh) | 2011-08-22 | 2012-08-20 | 氧化物tft阵列基板及其制造方法和电子器件 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110241809XA CN102629574A (zh) | 2011-08-22 | 2011-08-22 | 一种氧化物tft阵列基板及其制造方法和电子器件 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102629574A true CN102629574A (zh) | 2012-08-08 |
Family
ID=46587802
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201110241809XA Pending CN102629574A (zh) | 2011-08-22 | 2011-08-22 | 一种氧化物tft阵列基板及其制造方法和电子器件 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US20130207100A1 (zh) |
| EP (1) | EP2743977A4 (zh) |
| JP (1) | JP2014524666A (zh) |
| KR (1) | KR20130043634A (zh) |
| CN (1) | CN102629574A (zh) |
| WO (1) | WO2013026382A1 (zh) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2013026382A1 (zh) * | 2011-08-22 | 2013-02-28 | 京东方科技集团股份有限公司 | 氧化物tft阵列基板及其制造方法和电子器件 |
| CN102956714A (zh) * | 2012-10-19 | 2013-03-06 | 京东方科技集团股份有限公司 | 氧化物薄膜晶体管及其制造方法、阵列基板及显示装置 |
| WO2016019672A1 (zh) * | 2014-08-06 | 2016-02-11 | 京东方科技集团股份有限公司 | 金属氧化物薄膜晶体管、阵列基板及制作方法、显示装置 |
| WO2016078169A1 (zh) * | 2014-11-20 | 2016-05-26 | 深圳市华星光电技术有限公司 | 薄膜晶体管的制造方法 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040241919A1 (en) * | 2003-05-28 | 2004-12-02 | Chih-Chin Chang | Method of forming a CMOS thin film transistor device |
| CN101685835A (zh) * | 2008-07-31 | 2010-03-31 | 株式会社半导体能源研究所 | 半导体装置及其制造方法 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4108633B2 (ja) * | 2003-06-20 | 2008-06-25 | シャープ株式会社 | 薄膜トランジスタおよびその製造方法ならびに電子デバイス |
| JP2006100760A (ja) * | 2004-09-02 | 2006-04-13 | Casio Comput Co Ltd | 薄膜トランジスタおよびその製造方法 |
| CN101032027B (zh) * | 2004-09-02 | 2010-10-13 | 卡西欧计算机株式会社 | 薄膜晶体管及其制造方法 |
| JP4870404B2 (ja) * | 2005-09-02 | 2012-02-08 | 財団法人高知県産業振興センター | 薄膜トランジスタの製法 |
| US7576354B2 (en) * | 2005-12-20 | 2009-08-18 | Samsung Mobile Display Co., Ltd. | Organic light emitting diode display and method of fabricating the same |
| JP5244295B2 (ja) * | 2005-12-21 | 2013-07-24 | 出光興産株式会社 | Ｔｆｔ基板及びｔｆｔ基板の製造方法 |
| JP5177954B2 (ja) * | 2006-01-30 | 2013-04-10 | キヤノン株式会社 | 電界効果型トランジスタ |
| US20090278120A1 (en) * | 2008-05-09 | 2009-11-12 | Korea Institute Of Science And Technology | Thin Film Transistor |
| JP5627071B2 (ja) * | 2008-09-01 | 2014-11-19 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| KR101889287B1 (ko) * | 2008-09-19 | 2018-08-20 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체장치 |
| JP5123141B2 (ja) * | 2008-11-19 | 2013-01-16 | 株式会社東芝 | 表示装置 |
| US20110220895A1 (en) * | 2008-11-27 | 2011-09-15 | Konica Minolta Holdings, Inc. | Thin film transistor and method of manufacturing thin film transistor |
| CN101770121B (zh) * | 2008-12-26 | 2012-11-21 | 北京京东方光电科技有限公司 | Tft-lcd阵列基板及其制造方法 |
| CN101840936B (zh) * | 2009-02-13 | 2014-10-08 | 株式会社半导体能源研究所 | 包括晶体管的半导体装置及其制造方法 |
| WO2011048959A1 (en) * | 2009-10-21 | 2011-04-28 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
| CN102629574A (zh) * | 2011-08-22 | 2012-08-08 | 京东方科技集团股份有限公司 | 一种氧化物tft阵列基板及其制造方法和电子器件 |
-
2011
- 2011-08-22 CN CN201110241809XA patent/CN102629574A/zh active Pending
-
2012
- 2012-08-20 JP JP2014526372A patent/JP2014524666A/ja active Pending
- 2012-08-20 US US13/702,393 patent/US20130207100A1/en not_active Abandoned
- 2012-08-20 EP EP12794159.9A patent/EP2743977A4/en not_active Withdrawn
- 2012-08-20 KR KR1020127031369A patent/KR20130043634A/ko not_active Application Discontinuation
- 2012-08-20 WO PCT/CN2012/080380 patent/WO2013026382A1/zh active Application Filing
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040241919A1 (en) * | 2003-05-28 | 2004-12-02 | Chih-Chin Chang | Method of forming a CMOS thin film transistor device |
| CN101685835A (zh) * | 2008-07-31 | 2010-03-31 | 株式会社半导体能源研究所 | 半导体装置及其制造方法 |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2013026382A1 (zh) * | 2011-08-22 | 2013-02-28 | 京东方科技集团股份有限公司 | 氧化物tft阵列基板及其制造方法和电子器件 |
| CN102956714A (zh) * | 2012-10-19 | 2013-03-06 | 京东方科技集团股份有限公司 | 氧化物薄膜晶体管及其制造方法、阵列基板及显示装置 |
| WO2016019672A1 (zh) * | 2014-08-06 | 2016-02-11 | 京东方科技集团股份有限公司 | 金属氧化物薄膜晶体管、阵列基板及制作方法、显示装置 |
| US9627414B2 (en) | 2014-08-06 | 2017-04-18 | Boe Technology Group Co., Ltd. | Metallic oxide thin film transistor, array substrate and their manufacturing methods, display device |
| WO2016078169A1 (zh) * | 2014-11-20 | 2016-05-26 | 深圳市华星光电技术有限公司 | 薄膜晶体管的制造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20130207100A1 (en) | 2013-08-15 |
| WO2013026382A1 (zh) | 2013-02-28 |
| JP2014524666A (ja) | 2014-09-22 |
| KR20130043634A (ko) | 2013-04-30 |
| EP2743977A4 (en) | 2015-03-25 |
| EP2743977A1 (en) | 2014-06-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102651401B (zh) | 一种薄膜晶体管、阵列基板及其制造方法和显示器件 | |
| US9947757B2 (en) | Display device, array substrate, and thin film transistor | |
| US9748280B2 (en) | Thin film transistor and method of fabricating the same, array substrate and method of fabricating the same, and display device | |
| CN104078424B (zh) | 低温多晶硅tft阵列基板及其制备方法、显示装置 | |
| CN103745978B (zh) | 显示装置、阵列基板及其制作方法 | |
| CN105914183B (zh) | Tft基板的制造方法 | |
| CN103745955B (zh) | 显示装置、阵列基板及其制造方法 | |
| CN103208525B (zh) | 一种薄膜晶体管及其制造方法、阵列基板和显示器件 | |
| WO2014166176A1 (zh) | 薄膜晶体管及其制作方法、阵列基板和显示装置 | |
| CN104022077A (zh) | 阵列基板及其制作方法、显示装置 | |
| CN103887245B (zh) | 一种阵列基板的制造方法 | |
| CN105390443B (zh) | Tft基板的制作方法 | |
| CN104091810A (zh) | 阵列基板及其制作方法、显示装置 | |
| WO2013097554A1 (zh) | Tft阵列基板的制造方法 | |
| CN106847837B (zh) | 一种互补型薄膜晶体管及其制作方法和阵列基板 | |
| WO2015196633A1 (zh) | 一种阵列基板的制造方法、阵列基板及显示装置 | |
| CN105633170A (zh) | 金属氧化物薄膜晶体管及其制备方法以及阵列基板和显示装置 | |
| CN102945828A (zh) | 一种主动矩阵有机发光二极体驱动背板及其制备方法 | |
| CN106784014A (zh) | 薄膜晶体管及其制作方法、显示基板、显示装置 | |
| CN103745954B (zh) | 显示装置、阵列基板及其制造方法 | |
| CN104269413B (zh) | 阵列基板及其制作方法、液晶显示装置 | |
| CN102637648B (zh) | 薄膜晶体管液晶显示器、阵列基板及其制造方法 | |
| CN105047607A (zh) | 氧化物半导体tft基板的制作方法及其结构 | |
| CN102629574A (zh) | 一种氧化物tft阵列基板及其制造方法和电子器件 | |
| WO2016026176A1 (zh) | Tft基板的制作方法及其结构 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C12 | Rejection of a patent application after its publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20120808 |