CN102403286B - 配备有热耗散装置的半导体部件和器件 - Google Patents

配备有热耗散装置的半导体部件和器件 Download PDF

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CN102403286B
CN102403286B CN201110281389.8A CN201110281389A CN102403286B CN 102403286 B CN102403286 B CN 102403286B CN 201110281389 A CN201110281389 A CN 201110281389A CN 102403286 B CN102403286 B CN 102403286B
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electrical connection
integrated circuit
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circuit chip
chip
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CN102403286A (zh
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R·科菲
Y·吉尤
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STMicroelectronics Grenoble 2 SAS
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Abstract

本发明涉及配备有热耗散装置的半导体部件和器件。该半导体部件，包括：片(5)，该片包括至少一个集成电路芯片(6)和密封块(7)，该集成电路芯片具有前电连接面(8)和后面(6a)，使得该芯片和该密封块的前面和后面分别形成该片的前面和后面，经由延伸穿过所述密封块(7)的电连接通孔(16)链接的前电连接网络(20)和后电连接网络(24)；以及至少覆盖该芯片的后面的热传递层(23)。该半导体器件，包括：所述部件和第二部件(3)，该第二部件位于该第一部件之后并与第一部件有一定距离；在该第一部件和该第二部件之间插入的多个连接元件(4)，包括与该第一部件的该金属热传递层(23)接触的第一热连接元件(4a)和在该部件之间的第二电连接元件(4b)。

Description

配备有热耗散装置的半导体部件和器件
技术领域
本发明涉及半导体器件领域。
背景技术
在包括配备有集成电路芯片并且经由电连接球以一定距离叠置的部件的已知半导体器件中，散热是有困难的，特别是在该器件包括第一部件(其包括第一热产生芯片)和第二部件(其包括也可以产生热的第二芯片)并且在该第一部件安装在印刷电路晶片上时。产生的热实际上基本上经由在该晶片上的第一部件的电连接球而向印刷电路晶片疏散。
发明内容
存在第一提出的半导体部件，其包括片，该片包括至少一个集成电路芯片以及密封块，该集成电路芯片具有前电连接面和后面，在该密封块中外围地嵌入集成电路芯片，使得该芯片和该密封块的前面和后面分别形成该片的前面和后面，并且其包括经由延伸穿过所述密封块的电连接通孔链接的前电连接网络和后电连接网络。
提出了该部件包括至少覆盖该芯片的后面的热传递层，该热传递层旨在经由该部件的后部耗散热。
该部件可以包括后连接元件，其中的一些放置在热传递层上而其它的后连接元件链接于后电连接网络。
该部件可以包括前连接元件，其中的一些链接到前电连接网络而其它的后连接元件不链接到该网络，放置于芯片之前。
后电连接网络和热传递层可以在相同金属层级上延伸。
还存在建议的半导体器件，其包括第一部件和第二部件，该第二部件位于第一部件之后并与第一部件有一定距离。
第一部件可以包括片，该片包括至少一个集成电路芯片以及密封块，其中该集成电路芯片具有前电连接面和后面，在该密封块中外围地嵌入该集成电路芯片，使得该芯片和该密封块各自的前面和后面形成该片的前面和后面，并且第一部件包括至少部分地覆盖该芯片的后面的金属热传递层。
可以在第一部件和第二部件之间插入多个连接元件，包括与第一部件的金属热传递层接触的第一热连接元件和在部件之间的第二电连接元件。
第一部件可以包括由延伸穿过第一部件的密封块的连接通孔链接的前电连接网络和后电连接网络并且其中该第二部件包括经由所述第二连接元件链接到第一部件的后电连接网络的前电连接网络。
第二部件可以包括至少一个集成电路芯片以及在第一热连接元件和该芯片之间的热连接通孔。
第二部件可以包括至少一个集成电路芯片，其后面至少部分由金属后层覆盖。
第二部件可以装配有外部热块，其由至少部分地在所述金属后层上方延伸的导热泡沫形成。
外部热块可以在第二部件的后面上方延伸并且可以具有横向地延伸向该第二部件的部分。
外部热块的横向部分可以至少部分地覆盖第一部件的后面的外围部分。
所述外围部分可以包括前电连接网络的金属部分和/或第一部件的热传递层的横向延伸的部分。
还存在提出的电话，其包括上述类型的半导体部件或者上述类型的半导体器件，其中所述热传递层可以由导热泡沫制成的热块而热链接到该电话的壁。
附图说明
现在将以由附图示出的非限制性示例的方式来描述半导体器件，所述附图中：
-图1表示半导体器件的横截面；以及
-图2以横截面表示图1的半导体器件的变型实施例。
具体实施方式
参考图1，可见半导体器件1，其包括第一部件2和第二部件3，其中的一个放置于另一个之上，在其间以彼此间一定距离放置多个例如以金属球的形式的金属连接元件，第二部件3位于后面并且与第一部件2有一定距离。
第一部件2包括重构的片5，其包括集成电路芯片6和围绕芯片6延伸的电介质密封块7，并且其中芯片6被外围地嵌入，以使得芯片6的前面8配备有电键合焊盘9，并且密封块7的前面10形成片5的前面11并且芯片6的后面12和密封块7的后面13形成片5的后面14，芯片6的前面8和后面12因此没有被密封块7覆盖。
围绕该芯片6并且在距离该芯片6一定距离处，密封块7具有填充有金属材料的贯通孔15，该贯通孔15形成从一面到另一面的电连接通孔16。
在片5的前面11和后面14上，形成前电介质层17和后电介质层18。后层18具有大的开口19，其至少部分地暴露芯片6的后面12。
在前电介质层17上产生的金属后层级上，形成前电连接网络20，该网络的各部分通过前电介质层17选择性的链接到芯片6的电键合焊盘9并且链接到电连接通孔16。
前电介质层17和电连接网络19由电介质层21覆盖，例如球金属元件22穿过该电介质层21，以提供器件1与例如印刷电路晶片(未表示)的外部电连接。
在后电介质层18上产生的金属层级上形成覆盖芯片6的暴露的后部6a的金属热传递层23以及在该金属层23的外围与该金属层23一定距离处的后电连接网络24，其各部分通过后电介质层18链接到电连接通孔16。
由电介质层25覆盖后电介质层18、金属层23以及后电介质连接网络24，金属元件4穿过该电介质层25，该金属元件4包括放置于金属层23上的金属元件4a以及选择性地链接到后电连接网络24的金属元件4b。
第二部件3包括叠置的支撑晶片26、第一集成电路芯片28、第二集成电路芯片31，其中支撑晶片26具有前表面27，该前表面27面向第一部件2的层25的外面并与其有一定距离，第一集成电路芯片28经由胶层30固定于支撑晶片26的后面29，第二集成电路芯片31经由胶层32固定到第一芯片28。第一芯片28覆盖支撑晶片26的表面的中央部分而第二芯片31覆盖第一芯片28的表面的中央部分。胶层30和胶层32由适于传热的热材料制成。
在位于第一芯片28之下的其中央部分，支撑晶片26具有填充有金属材料的贯通孔33，以形成从一面到另一面的热通孔34，连接元件4a链接到适于传热的热通孔34的前面。
在其外围部分，支撑晶片26包括从一面到另一面的前电连接网络35，该网络35由在支撑晶片26的前面27上提供的焊盘选择性地链接到连接元件4b。
在第二芯片31的外围周围并且在距离其一定距离处在第一芯片28的后面上提供的焊盘、与在第一芯片28的外围周围并且在距离其一定距离处在支撑晶片26的后面上提供的电连接网络35的焊盘之间提供电连接接线36。
在第二芯片31的后面上提供的焊盘、与在第一芯片28的外围周围并且在距离其一定距离处在支撑晶片26的后面29上提供的电连接网络35的焊盘之间提供电连接接线37。
第二部件3还包括形成在支撑晶片26的后面29上的电介质密封块38，其中嵌入第一芯片28和第二芯片31以及电连接线36和37，该密封块38是平行六面体形的。
因此，第一芯片28和第二芯片31可以选择性地链接到第一部件2的芯片6和/或链接到外部电连接元件22。
第二部件3的密封块38具有开口39，开口39提供在第二芯片31的后面的中央部分40之上、在链接到电连接接线37的焊盘的区域内部。
第二部件3还包括例如金属的热层41，其覆盖第二芯片31的后面的中央部分40，密封块38的开口39的侧面以及至少部分地覆盖在开口39周围的，密封块的后面42。
第二部件3还包括外部热块43，其至少部分地覆盖密封块38的后面42和热层41，外部热块43例如由适于传热的热泡沫形成。
根据图1表示的示例，外部热块43完全覆盖密封块38的后面42和热层41，并且还向密封块38的横向侧的较上部分延伸。
根据示例性配置，第一部件2的芯片6可以是操作时产生热的，而第二部件3的芯片28和芯片31在它们操作时不产生热或者只产生很少热。然而，芯片28和芯片31之一或两者也可以是产生热的。
以上的结果是由第一部件2的芯片6产生的热可以一方面由前连接元件22疏散，另一方面经由第二部件3疏散，出于此目的部件2和部件3装备有上述特定装置。
除了连接元件22，在芯片6的区域中可以穿过第一部件2的前层21而添加不连接到连接网络20的连接元件22a，以增加可以疏散的热的量。
可以经由多个连接元件4并且更具体地通过在芯片6上方扩展的金属层23上放置的连接元件4a来将第一部件2的芯片6发出的热传送到第二部件。
在第二部件3中，具体地经由连接元件4而从第一部件2导出的热主要地通过支持支撑晶片26(具体地经由热通孔34和第一部件2的连接网络20)扩散在部件3中，然后扩散在芯片28和芯片31中，并且通过芯片31，然后由在第二芯片31上方扩展的金属层41扩散，从而经由后热块43耗散在环境空气中和/或传递到例如便携电话的外壳的封装体(未表示)的内部壁或外部壁，该封装体将与后热块43的外面接触。第二部件3的其它部分也可以对该热扩散做出贡献。
参考图2，可见第二部件3未覆盖第一部件2并且热块43具有侧43a，其相对密封块38的横向侧延伸并且延伸使得在第二部件3的外围处呈现与第一部件2接触的端面44。根据所表示的示例，层25具有一个或多个开口45，侧43a的端穿透所述一个或多个开口45以使得端面44与连接网络20的金属部分46上接触和/或与第一部件2的热传递层23的横向延伸上接触。
因此，热块43的侧43a对由芯片6产生的热的直接耗散做出了贡献。
本发明不限于上述示例。许多其它变型实施例是可能的，而不脱离由所附权利要求书限定的上下文。

Claims (16)

1.一种半导体部件，包括：
片，该片包括至少一个集成电路芯片和密封块，该集成电路芯片具有前电连接面和后面，在该密封块中外围地嵌入该集成电路芯片，使得该集成电路芯片和该密封块的前面形成该片的前面，并且该集成电路芯片和该密封块的后面形成该片的后面，
由延伸穿过所述密封块的电连接通孔连接的前电连接网络和后电连接网络；
至少部分地覆盖该集成电路芯片的后面的热传递层。
2.根据权利要求1的半导体部件，包括后连接元件，其中的一些后连接元件放置在热传递层上而其它的后连接元件连接到后电连接网络。
3.根据权利要求1或2的半导体部件，包括前连接元件，其中的一些前连接元件连接到前电连接网络，而不连接到该前电连接网络的其它一些前连接元件放置于该集成电路芯片之前。
4.根据权利要求1或2的半导体部件，其中后电连接网络和热传递层在相同金属层级中延伸。
5.一种半导体器件，包括：
第一部件，该第一部件包括片，该片包括至少一个集成电路芯片以及密封块，其中该集成电路芯片具有前电连接面和后面，在该密封块中外围地嵌入该集成电路芯片，使得该集成电路芯片和该密封块的前面形成该片的前面，并且该集成电路芯片和该密封块的后面形成该片的后面，第一部件包括至少部分地覆盖该集成电路芯片的后面的金属热传递层；
第二部件，该第二部件位于该第一部件之后并与第一部件有一定距离，
在该第一部件和该第二部件之间插入的多个连接元件，包括与该第一部件的该金属热传递层接触的第一热连接元件和在所述第一部件和所述第二部件之间的第二电连接元件。
6.根据权利要求5的半导体器件，其中该第一部件包括由延伸穿过该第一部件的密封块的连接通孔连接的前电连接网络和后电连接网络，并且其中该第二部件包括经由所述第二电连接元件连接到该第一部件的后电连接网络的前电连接网络。
7.根据权利要求5或6的半导体器件，其中该第二部件包括至少一个集成电路芯片以及在所述第一热连接元件和该集成电路芯片之间的热连接通孔。
8.根据权利要求6的半导体器件，其中该第二部件包括至少一个集成电路芯片，该集成电路芯片的后面至少部分地由金属后层覆盖。
9.根据权利要求8的半导体器件，其中该第二部件装配有外部热块，其为至少部分地在所述金属后层上方延伸的导热泡沫。
10.根据权利要求9的半导体器件，其中该外部热块在该第二部件的后面上方延伸并且具有横向地延伸向该第二部件的部分。
11.根据权利要求10的半导体器件，其中该外部热块的横向部分至少部分地覆盖该第一部件的后面的外围部分。
12.根据权利要求11的半导体器件，其中所述外围部分包括该后电连接网络的金属部分和/或该第一部件的热传递层的横向延伸部分。
13.一种电话，包括根据权利要求1-4中任一项的半导体部件。
14.根据权利要求13的电话，其中所述热传递层由导热泡沫制成的热块热连接到该电话的壁。
15.一种电话，包括根据权利要求5-12中任一项的半导体器件。
16.根据权利要求15的电话，其中所述金属热传递层由导热泡沫制成的热块热连接到该电话的壁。
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FR2964790A1 (fr) * 2010-09-13 2012-03-16 St Microelectronics Grenoble 2 Composant et dispositif semi-conducteur munis de moyens de dissipation de chaleur
US9209156B2 (en) * 2012-09-28 2015-12-08 Taiwan Semiconductor Manufacturing Co., Ltd. Three dimensional integrated circuits stacking approach
US20140133105A1 (en) * 2012-11-09 2014-05-15 Nvidia Corporation Method of embedding cpu/gpu/logic chip into a substrate of a package-on-package structure
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101236943A (zh) * 2007-02-01 2008-08-06 日月光半导体制造股份有限公司 内埋芯片的散热型无芯板薄型基板及其制造方法
CN101789380A (zh) * 2009-01-23 2010-07-28 日月光半导体制造股份有限公司 内埋芯片封装的结构及工艺
CN202423263U (zh) * 2010-09-13 2012-09-05 意法半导体(格勒诺布尔2)公司 配备有热耗散装置的半导体部件、器件和电话

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6532152B1 (en) * 1998-11-16 2003-03-11 Intermec Ip Corp. Ruggedized hand held computer
US6710433B2 (en) * 2000-11-15 2004-03-23 Skyworks Solutions, Inc. Leadless chip carrier with embedded inductor
JP4016039B2 (ja) * 2005-06-02 2007-12-05 新光電気工業株式会社 配線基板および配線基板の製造方法
US20080157300A1 (en) * 2006-12-27 2008-07-03 Shih-Fang Chuang Thermally Enhanced IC Package and Method
US20090170241A1 (en) * 2007-12-26 2009-07-02 Stats Chippac, Ltd. Semiconductor Device and Method of Forming the Device Using Sacrificial Carrier
US8125072B2 (en) * 2009-08-13 2012-02-28 Infineon Technologies Ag Device including a ring-shaped metal structure and method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101236943A (zh) * 2007-02-01 2008-08-06 日月光半导体制造股份有限公司 内埋芯片的散热型无芯板薄型基板及其制造方法
CN101789380A (zh) * 2009-01-23 2010-07-28 日月光半导体制造股份有限公司 内埋芯片封装的结构及工艺
CN202423263U (zh) * 2010-09-13 2012-09-05 意法半导体(格勒诺布尔2)公司 配备有热耗散装置的半导体部件、器件和电话

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