CN102208388B - 半导体装置以及半导体装置的制造方法 - Google Patents

半导体装置以及半导体装置的制造方法 Download PDF

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Publication number
CN102208388B
CN102208388B CN201110081344.6A CN201110081344A CN102208388B CN 102208388 B CN102208388 B CN 102208388B CN 201110081344 A CN201110081344 A CN 201110081344A CN 102208388 B CN102208388 B CN 102208388B
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electrode
semiconductor particles
solder
electronic devices
components
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CN102208388A (zh
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樱井大辅
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
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    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
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    • H10W72/01221Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using local deposition
    • H10W72/01225Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using local deposition in solid form, e.g. by using a powder or by stud bumping
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    • H10W72/01235Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating by plating, e.g. electroless plating or electroplating
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    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

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US (1) US8367539B2 (https=)
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JP2013183094A (ja) * 2012-03-02 2013-09-12 Nec Corp 電子部品の実装方法及び半導体装置
JP2013214557A (ja) * 2012-03-30 2013-10-17 Olympus Corp 電極形成体、配線基板、および半導体装置
JP5923725B2 (ja) * 2012-05-15 2016-05-25 パナソニックIpマネジメント株式会社 電子部品の実装構造体
EP2747132B1 (en) * 2012-12-18 2018-11-21 IMEC vzw A method for transferring a graphene sheet to metal contact bumps of a substrate for use in semiconductor device package
JP6089732B2 (ja) * 2013-01-30 2017-03-08 日立金属株式会社 導電性部材の接続構造、導電性部材の接続方法、及び光モジュール
US8969191B2 (en) * 2013-07-16 2015-03-03 Taiwan Semiconductor Manufacturing Co., Ltd. Mechanisms for forming package structure
US9583470B2 (en) * 2013-12-19 2017-02-28 Intel Corporation Electronic device with solder pads including projections
US20150318259A1 (en) * 2014-05-02 2015-11-05 KyungOe Kim Integrated circuit packaging system with no-reflow connection and method of manufacture thereof
JP6430843B2 (ja) * 2015-01-30 2018-11-28 株式会社ジェイデバイス 半導体装置
US11024608B2 (en) 2017-03-28 2021-06-01 X Display Company Technology Limited Structures and methods for electrical connection of micro-devices and substrates
FR3070550B1 (fr) * 2017-08-24 2020-07-03 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede d'assemblage de connecteurs electriques
JP2019176056A (ja) * 2018-03-29 2019-10-10 富士通株式会社 電子装置
JP7189672B2 (ja) * 2018-04-18 2022-12-14 新光電気工業株式会社 半導体装置及びその製造方法
US11101417B2 (en) * 2019-08-06 2021-08-24 X Display Company Technology Limited Structures and methods for electrically connecting printed components
US11502056B2 (en) * 2020-07-08 2022-11-15 Taiwan Semiconductor Manufacturing Company, Ltd. Joint structure in semiconductor package and manufacturing method thereof
US11348901B1 (en) * 2020-11-30 2022-05-31 Sandisk Technologies Llc Interfacial tilt-resistant bonded assembly and methods for forming the same

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