CN102171794A - 用于应变半导体器件的渐变高锗化合物膜 - Google Patents

用于应变半导体器件的渐变高锗化合物膜 Download PDF

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CN102171794A
CN102171794A CN2009801398329A CN200980139832A CN102171794A CN 102171794 A CN102171794 A CN 102171794A CN 2009801398329 A CN2009801398329 A CN 2009801398329A CN 200980139832 A CN200980139832 A CN 200980139832A CN 102171794 A CN102171794 A CN 102171794A
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D·西蒙耐利
A·莫西
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Abstract

本文总体披露了提供渐变的高锗化合物区的装置和方法的实施例。描述和要求保护其它的实施例。

Description

用于应变半导体器件的渐变高锗化合物膜
技术领域
本发明领域总的涉及半导体集成电路制造领域，更具体地但非排它地涉及包含具有渐变锗含量的化合物层的平面和三维互补金属氧化物半导体(CMOS)器件。
背景技术
在传统金属氧化物半导体(MOS)场效应晶体管中，源极、沟道和漏极结构彼此毗邻地构造在同一平面内。典型地，栅极介电层形成在沟道区上并且栅极电极沉积在栅极介电层上。通过将电压施加于栅极电极来控制晶体管，由此使电流流过源极和漏极之间的沟道。
采用构造平面MOS晶体管的方法的一种替代方法以减轻某些物理势垒来减小平面设计的规模。该替代方法涉及以例如双栅极场效应晶体管(FinFET)或三栅极场效应晶体管的多栅极晶体管的形式构建三维MOS晶体管以取代传统的平面MOS晶体管。
例如FinFET和三栅极场效应晶体管的三维晶体管设计允许通过对栅极使用垂直或成角度的表面来将同样数量的晶体管更紧密地封装在半导体芯片上。三栅极场效应晶体管包括在本体的三个露出表面上就位的三个基本相等长度的栅极，而FinFET包括沿狭窄本体或鳍片各边就位的两个相等长度的栅极。
附图说明
本发明前述各个方面和许多伴生的优势将变得更为易懂，因为结合附图参照下面的详细说明，这些内容变得更易于理解，其中相同的标记在各附图中表示相同的部分，除非另有说明：
图1是示出衬底上的栅极电极的平面MOS器件的横截面图。
图2是图1的器件在栅极电极的边上形成有间隔结构的示图。
图3是图2的器件在蚀刻掉一部分衬底以形成源极/漏极和源极/漏极延伸部凹腔后的示图。
图4是图3的器件在湿蚀刻源极/漏极和源极/漏极延伸部凹腔后的示图。
图5是图4的器件在形成源极/漏极和源极/漏极延伸区后的示图。
图6是在多栅极本体上具有介电层的多栅极器件的示图。
图7是图6的器件在介电层上沉积功函数金属层之后的示图。
图8是图7的器件在功函数金属层上形成保护掩模后的示图。
图9是图8的器件在各向异性地蚀刻功函数金属层以形成栅极电极之后的示图。
图10是图9的器件在栅极电极上形成栅极隔离间隔结构后的示图。
图11是图10的器件在除去部分本体以提供沟道区后的示图。
图12是图11的器件在形成外延源极/漏极区后的示图。
图13示出具有含渐变的高锗化合物膜的中央处理单元的系统。
图14是衬底上的渐变高锗含量硅-锗区的示图。
图15是表述用来形成具有渐变高锗含量的硅-锗区的应变半导体器件的制造工艺的一个实施例的流程图。
具体实施方式
在各实施例中，解说和描述了在衬底上形成具有渐变锗含量的化合物层的装置和方法的各实施例。
然而，相关领域内技术人员将理解，可不借助一个或多个特定细节或者采用其它替代和/或附加的方法、材料或组分来实现各个实施例。在其它情形下，未详细示出或描述公知的结构、材料或操作以避免使本发明各实施例的各个方面晦涩。同样，为便于解释，给出具体的数目、材料和结构以提供对本发明的透彻理解。然而，本发明没有这些具体细节也可实施。此外要理解，附图中示出的各个实施例是解说性表达并且不一定按比例绘制。
该说明书中通篇对“一个实施例”或“一实施例”的引用表示结合该实施例描述的具体特征、结构、材料或特性包含在本发明的至少一个实施例中，但不代表它们出现在每个实施例中。因此，本说明书中多处出现的短语“在一个实施例中”或“在一实施例中”不一定指本发明的同一实施例。此外，在一个或多个实施例中，可以任何适宜方式组合多个具体特征、结构、材料或特性。在其它实施例中可加入各个附加层和/或结构和/或省去所描述的特征。
各个操作可以最有助于本发明理解的方式表述为轮流的多个独立操作。然而，表述顺序不应当解释成意指这些操作一定要按照某种顺序。具体地说，这些操作不需要按所表示的顺序进行。所描述的操作可以与前述实施例不同的顺序执行。在其它实施例中可执行各个附加操作和/或省去所描述的操作。
平面和多栅极MOS晶体管的性能可通过采用渐变高锗含量化合物得以改善，例如晶体管的源极区和漏极区中的硅-锗合金。提供以合需的膜生长速率选择性地形成具有要求晶体结构的硅-锗材料的渐变高锗含量区的方法将会是半导体器件制造领域中的一个创举。选择性地形成在层厚度的晶片均匀性和锗浓度方面有改善的渐变高锗含量硅-锗区则是业内的另一创举。此外，使渐变的高锗浓度硅-锗区以在制造环境中节约成本的生长速率生长是业内的一个创举。例如，在pMOS器件的源极/漏极(S/D)区中使用包括渐变过渡层的应变高锗化合物膜能提供源自应变结构的接触电阻减小和迁移性提高的组合效果。更具体地，提供在锗浓度的理论极限或其附近具有完全应变的渐变过渡层将是业内的一个创举。这些优点可从下面描述的装置和方法中得出。
现在参见附图，图1是示出衬底110上的栅极叠层150的平面MOS器件100的横截面图。衬底110可包括可选择地具有绝缘体上硅子结构的块硅。替代地，衬底110可包括其它材料——这些材料可与硅结合或不与硅结合——例如：锗、锑化铟、碲化铅、砷化铟、磷化铟、砷化镓或锑化镓。尽管在此描述了可构成衬底110的材料的一些示例，但可充当在其上构建半导体器件的基底的任何材料都落在本发明的范围内。
在本文描述的实现中，栅极叠层150可包括栅极介电层120和牺牲栅极电极130。在其它实现中，栅极叠层150可包括二氧化硅栅极介电层和多晶硅栅极电极。栅极介电层120可由例如二氧化硅或高k介电材料的材料形成。可采用的高k栅极介电材料的示例包括但不局限于，氧化铪、氧化铪硅、氧化镧、氧化镧铝、氧化锆、氧化锆硅、氧化钽、氧化钛、氧化钡锶钛、氧化钡钛、氧化锶钛、氧化钇、氧化铝、氧化铅钪钽以及铌酸铅锌。在一些实施例中，栅极介电层120的厚度可在约5埃
Figure BPA00001346931500041
至约50埃之间。在其它实施例中，可对栅极介电层120作附加处理，例如退火处理以提高高k材料的质量。
栅极叠层150也可包括栅极硬掩模层140，该栅极硬掩模层140提供加工过程中的某些益处或用途，例如保护栅极电极130免受之后离子注入工艺的影响。在本发明的实现中，该硬掩模层140可使用传统用作硬掩模的材料——例如传统介电材料——来形成。在形成栅极叠层后，执行离子注入工艺以形成衬底110在栅极叠层150附近的掺杂部分210，如图2所示。
图2是图1的器件在衬底110中形成掺杂部分210并在栅极电极150的边上形成间隔结构220之后的示图。当暴露于适当的蚀刻剂时，掺杂部分210以高于周围衬底材料的蚀刻速率的速率蚀刻。对于正在成形的MOS晶体管来说，其中一个掺杂部分210将充当源极区的一部分，包括自对准外延源极延伸部。对于MOS晶体管来说，另一掺杂部分210将充当漏极区的一部分，包括自对准外延漏极延伸部。在所示实现中，掺杂部分的各个区域位于栅极介电层120之下。在本发明的各种实现中，掺杂部分210的尺寸——包括其深度——可基于正在成形的MOS晶体管的需求而改变。
间隔结构220可使用传统材料形成，包括但不局限于氧化硅或氮化硅。可基于正在成形的MOS晶体管的设计需求来选择间隔结构220的宽度。根据本发明的各种实现，间隔结构220的宽度不受外延源极和漏极延伸部的成形所强加的设计约束的影响。
在间隔结构220形成在衬底110之后，可执行干蚀刻工艺以蚀刻掺杂部分210并蚀刻衬底的各个部分以形成凹腔，在所述凹腔中可形成源极/漏极区和源极/漏极延伸部。经蚀刻的凹腔位于栅极叠层150附近。经蚀刻的凹腔可形成在50nm和1500nm之间的深度，该深度比掺杂区更深。因此蚀刻工艺将去除掺杂部分210下面的最少量衬底材料。
干蚀刻工艺采用对用于离子注入工艺的掺杂剂作出互补的蚀刻剂处方以增大掺杂区的蚀刻速度。这允许蚀刻工艺以比衬底其它部分更快的速度去除掺杂区。因而，通过适当增加蚀刻速度，蚀刻工艺能在凹腔蚀刻完成前从掺杂部分210去除几乎全部材料。这包括对间隔结构和栅极介电层作底切的掺杂区部分，由此限定晶体管的自对准延伸部结构。增大掺杂部分210的蚀刻速度允许经蚀刻的源极和漏极延伸部凹腔对间隔结构和栅极介电层形成底切。
根据本发明的一种实现，干蚀刻工艺可采用发生在等离子体反应器中的氯化药剂。在一种实现中，蚀刻剂处方可由NF3和Cl2的组合物构成，氩或氦作为缓冲气体或载体气体。活化蚀刻剂物质的流量可在50-200标准立方厘米/分钟(SCCM)之间变动，而载体气体的流量可在150-400SCCM之间变动。可在具有小于100W的低RF偏置的700W-1100W范围的功率下采用高能等离子体。反应器压力可在从1帕斯卡(Pa)左右至2帕斯卡左右的范围内变动。
在另一实现中，蚀刻药剂可由HBr和Cl2的组合构成。蚀刻剂物质的流量可在40SCCM-100SCCM之间变动。可在具有小于100W的低RF偏移的600W左右-1000W左右范围的功率下采用高能等离子体。反应器压力可从0.3帕斯卡左右至0.8帕斯卡左右的范围内变动。在另一种实现中，蚀刻剂化学物质可由SF6和Cl2的组合物构成。SF6流量可在3SCCM和10SCCM之间变动并且Cl2流量可在20SCCM和60SCCM之间变动。可在无RF偏置或具有小于50W的RF偏置的400W左右-900W左右范围的功率下采用高能等离子体。在这种实现中，SF6流量和反应器压力可保持低以降低去除速率并最大化控制。例如，反应器压力可从0.1帕斯卡左右至0.5帕斯卡左右的范围内变动。在又一实现中，蚀刻剂化学物质可由Ar和Cl2的组合物构成。这里，蚀刻剂物质的流量可在40SCCM和80SCCM之间变动。可在具有约100W和200W之间的高RF偏置的400W左右-800W左右范围的功率下采用中等能量等离子体。反应器压力可在从1帕斯卡左右至2帕斯卡左右的范围内。
图3是图2的器件在蚀刻掉一部分衬底110以形成源极/漏极和源极/漏极延伸部凹腔后的示图。如图所示，形成源极区凹腔310和漏极区凹腔320。此外，已通过蚀刻掺杂部分210形成源极延伸物凹腔330和漏极延伸物凹腔340。由于采用增加掺杂部分210的蚀刻速率的掺杂剂和蚀刻剂处方，间隔结构220的厚度对源极延伸部凹腔330和漏极延伸部凹腔340的蚀刻具有的影响最小。
在干蚀刻工艺完成后，可施加湿蚀刻工艺以清洗并进一步蚀刻源极区凹腔310、源极延伸部凹腔330、漏极区凹腔320以及漏极延伸部凹腔340。可采用用于清洗硅和氧化物材料的业内已知传统湿蚀刻化学物质。例如，可采用能沿其晶面去除硅的湿蚀刻化学物质。
湿蚀刻为了至少两个目的。首先，湿蚀刻去除例如碳、氟、含氯氟烃和诸如氧化硅的氧化物的杂质以提供可在其上进行后续处理的干净表面。其次，湿蚀沿<111>和<001>晶面去除很薄部分的衬底以提供在其上可发生高质量外延沉积的光滑表面。蚀刻掉的衬底薄层可高达5nm厚并也可去除残留杂质。如图4所示，湿蚀刻使源极区凹腔310、源极延伸物凹腔330、漏极区凹腔320和漏极延伸物凹腔340的各边缘遵循<111>和<001>晶面。还要注意，源极和漏极延伸部330、340不具有传统加工中出现的子弹状外形。
在蚀刻工艺后，包括源极和漏极延伸部的源极和漏极区凹腔可采用选择性外延沉积工艺以例如硅锗合金的化合物薄膜填充。外延沉积工艺用来在一道工艺中形成源极和漏极区以及源极和漏极延伸部。在一些实现中，硅合金可以是在原处掺杂的硅锗，藉此在原处掺杂的硅锗可用硼和/或磷中的一种或多种来掺杂。
在实践中，沉积在源极和漏极区凹腔内的硅锗合金材料的晶格间距不同于用来形成衬底110的一种或多种材料的晶格间距。晶格间距的差异导致MOS晶体管的沟道区内的张应力或压应力，这个问题由于将高锗化合物合金沉积在源极延伸物凹腔330和漏极延伸物凹腔340中而变得更为突出。
根据本发明的一些实现，对于PMOS晶体管，源极区凹腔310和漏极区凹腔320可以渐变的锗硅合金填充，例如根据如下面图15中描述的实施例的方法之一得到的渐变高锗含量的硅锗区。渐变锗硅合金可以范围从10％原子-50原子％的渐变锗浓度外延地沉积。在其它实现中，渐变的锗硅合金可进一步在原处以硼掺杂。硼浓度可在从2×1019/cm3-7×1020/cm3的范围内变动。在该实施例中，渐变的锗硅合金的厚度可在40埃至1500埃的范围内变动。
图5是图4器件的示图，其中源极区凹腔310已填充有在图14中进一步描述的渐变的高锗含量的硅锗叠层1400以形成源极区510，并且漏极区凹腔320已填充有同样在图14中进一步描述的渐变的高锗含量的硅锗叠层1400以形成漏极区520。延伸部已填充有渐变的高锗含量的硅锗叠层1400以形成外延源极延伸部530和外延漏极延伸部540。
如图5所示，与通过注入和扩散技术形成并在末端(tip)区和沟道区之间不具有明显边界的传统源极和漏极末端区不同，本发明的自对准、外延源极和漏极延伸物具有突变的边界。因此，外延源极/漏极延伸部和沟道区之间的界面是清楚和良好界定的。界面的一侧是外延沉积的掺杂硅材料而界面的另一侧是构成沟道区的衬底材料。外延源极/漏极延伸部中的掺杂物大致或完全地保留在延伸部内并且不容易扩散入沟道区，由此允许外延源极和漏极延伸部将重掺杂的硅材料带入到相对传统技术非常接近沟道区的位置。如本领域内技术人员理解的那样，这进而允许减小栅极长度而无需缩短沟道区。
将外延源极和漏极延伸部形成在相对接近沟道区的位置也给予沟道更大的流体静应力。该应力增加了沟道中的应变，由此提高了沟道中的迁移率并增大驱动电流。该应力通过增大外延源极和漏极延伸部的掺杂而被进一步放大，所述外延源极和漏极延伸部的掺杂在渐变锗硅合金的外延沉积过程中容易得到控制。
如本领域内技术人员所知，平面MOS器件100可能经历进一步MOS处理，例如置换栅极氧化物工艺、置换金属栅极工艺、退火或硅化(salicidation)工艺，这些工艺可进一步改良器件和/或提供必要的电气互连。例如，在源极/漏极区和源极/漏极延伸部的外延沉积后，层间介电层(ILD)可在器件上沉积和平坦化。可使用已知适用于集成电路结构的介电层的材料形成ILD，例如低k介电材料。这些介电材料包括但不局限于，例如二氧化硅(SiO2)的氧化物和掺杂碳的氧化物(CDO)、氮化硅、例如过氟化环丁烷或聚四氟乙烯的有机聚合物、氟硅酸盐玻璃(FSG)以及例如硅倍半氧烷、硅氧烷的有机硅酸盐或有机硅酸盐玻璃。介电层可包括孔或其它空隙以进一步减小其介电常数。图5示出已沉积在平面MOS器件100上的ILD层550。
本发明不仅限于包含渐变的高锗含量的硅锗区的平面MOS器件的形成。例如，具有三维结构的器件——例如三栅极器件——可从前述工艺中获益。图6-12提供表示根据本发明一个实施例的非平面器件内的应变感应源极/漏极区的成形的解说图。
图6是多栅极器件600在多栅极本体620上沉积多栅极介电层610之后的示图。图6中的多栅极晶体管是具有三个基本等长度栅极的三栅极晶体管。在另一实施例(未示出)中，多栅极晶体管是具有两个栅极的双栅极场效应晶体管(FinFET)。多栅极介电层610可包括氧化硅或高K材料中的至少一种。高K材料包括氧化镧、氧化钽、氧化钛、氧化铪、氧化锆、钛酸锆酸铅、钛酸钡锶或氧化铝。多栅极介电层610使用本领域内技术人员公知的方法作为顺应层沉积在多栅极本体620上，这些方法例如等离子体增强化学气相沉积(PECVD)、高密度化学气相沉积(HDCVD)、分子有机化学气相沉积(MOCVD)、原子层沉积(ALD)或溅射。多栅极本体620可包括硅、锗或Ⅲ-Ⅴ半导体，例如砷化镓(GaAs)和锑化铟(InSb)。多栅极本体620可由外延层、单晶衬底形成，或由绝缘体上硅(SOI)层形成。
图7中的示图描述图6中的多栅极器件600在将顺应功函数金属层710以要求厚度沉积在多栅极介电层610上之后的情形。功函数金属是具有已知功函数的金属，该功函数是以电子伏(eV)为单位表达的金属的固有特征。在一个实施例中，功函数金属层710包括氮化钛、氮化钽或其它过渡性金属氮化物中的至少一个。功函数金属层厚度是多栅极器件的目标阈值电压(Vt)的函数。
在一个实施例中，功函数金属层是使用方向敏感物理汽相沉积(PVD)工艺形成的。使用PVD工艺的功函数金属层710沉积的特征在于，包含在表面成核并垂直于表面生长的柱状晶粒的微观结构。在另一实施例中，可使用包括分子束外延(MBE)、化学气相沉积(CVD)、电镀或蒸镀的分层技术来形成具有柱状晶粒的功函数金属层710。
图8示出图7的多栅极器件600在将包含例如多晶硅的多栅极电极810和硬掩模820的保护掩模形成在功函数金属层710的一部分上后的情形。保护掩模通过本领域内技术人员熟知的一连串沉积、光刻和蚀刻工艺形成。多栅极电极810可以是掺杂的或未掺杂的并且硬掩模820可包括氮化硅或氧氮化硅。
图9示出图8的多栅极器件600在各向异性地蚀刻功函数金属层710的露出区之后的情形。功函数金属层710的露出区是使用湿蚀刻工艺蚀刻的，所述湿蚀刻工艺利用包含碱和氧化物的湿蚀刻剂。选择性地设计合适的湿蚀刻工艺以蚀刻功函数金属层710而不会显著侵蚀多晶硅810或硬掩模820。碱可包括氢氧化铵(NH4OH)、氢氧化四甲铵(TMAH)或氢氧化钾(KOH)中的至少一个。氧化物可包括过氧化氢(H2O2)或臭氧(O3)中的至少一个。各向异性地蚀刻功函数金属层710意味着沿垂直于表面方向的蚀刻速率远高于平行于该表面的方向。由于功函数金属层710沿垂直于栅极表面的方向的蚀刻速率远高于功函数金属层710沿平行于栅极表面的方向的蚀刻速率，功函数金属层710各向异性地被蚀刻。这允许功函数金属层710的受保护区基本保持原样同时功函数金属层710的露出区被湿蚀刻剂蚀刻掉。
图10是图9的器件在多栅极电极810附近形成栅极绝缘间隔结构1010后的示图。栅极隔离间隔结构1010在后续处理中保护多栅极电极810、功函数金属层710以及多栅极介电层610。
图11是图10的器件在去除多栅极本体620的一部分以提供多栅极沟道区1110之后的示图。图12是图11的器件在外延地形成源极和漏极区1210之后的示图。外延形成的源极/漏极区1210是使用渐变的高锗含量的硅锗膜叠层形成的。外延形成的源极/漏极区1210可使用根据例如下面在图15中描述的实施例中的一个或多个方法制成的如图14进一步描述的渐变的高锗含量的硅锗膜叠层1400形成。
图13示出一通信系统1300，该通信系统1300具有用于处理数据的中央处理单元(CPU)1310，该中央处理单元1310由具有根据一个实施例的渐变的高锗含量的硅锗区的晶体管构成。通信系统1300可包括具有CPU 1310的母板1320以及耦合于总线1340的联网接口1330。更具体地，CPU 1310可包括渐变的高锗含量的硅锗区和/或其制造方法。根据场合，通信系统1300可另行包括其它组件，包括但不局限于易失和非易失存储器、图形处理器、数字信号处理器、密码处理器、芯片集、海量存储器(例如硬盘、压缩盘(CD)、数字多功能盘(DVD)等)及其它。这些组件中的一个或多个还可包括之前描述的渐变的高锗含量的硅锗区和/或其制造方法。在各实施例中，通信系统1300可以是个人数字助理(PDA)、移动设备、平板计算设备、膝上计算设备、桌面计算设备、机顶盒、娱乐控制单元、数字相机、数字录像机、CD播放机、DVD播放机或其它类似的数字设备。
图15是描述用来形成具有图14所示晶体结构的渐变的高锗含量的硅锗叠层1400的应变半导体器件的制造工艺的一个实施例的流程图。在一个实施例中，渐变的高锗含量硅锗叠层1400包括使用在10-40标准升/分钟(slm)之间变动的流量的例如氢气(H2)的载体气体在10-150托(T)之间变动的压力下通过外延沉积工艺使用例如Applied Materials Centura
Figure BPA00001346931500101
或ASM Epsilon
Figure BPA00001346931500102
工具的沉积工具在衬底110上生长的叠层。
在步骤1500，优选将底层选择性地形成在衬底110的露出区上。在一个实施例中，底层是具有在20-25原子重量％之间变动的相对低的锗含量并沉积长达10-30秒的时间以提供在
Figure BPA00001346931500103
之间变动的最终厚度范围的硅锗籽晶层1410。硅锗籽晶层1410可选择地掺杂硼至5.0×1019原子/cm3-1.5×1020原子/cm3范围的浓度。硅锗籽晶层1410可在700-800摄氏度(℃)或更佳地在745-765℃之间的温度范围内沉积。此外，硅锗籽晶层1410可使用包含氯化氢(HCl)、二氯硅烷(DCS)、锗烷(GeH4)以及乙硼烷(B2H6)的工艺气体混合物形成，其中HCl流量在20-200标准立方厘米/分钟(sccm)，DCS流量在10-100sccm之间，使用1％锗烷和氢平衡的锗烷流量在20-200sccm之间，而乙硼烷流量在10-75sccm之间。
在步骤1510，将过渡层1420选择性地形成在硅锗籽晶层1410上以在例如硅锗籽晶层1410的基底晶核层至高锗含量层1430之间提供非常缓和的过渡。在一个实施例中，过渡层1420毗邻和/或靠近硅锗籽晶层1410的下部可在硅锗籽晶层1410/过渡层1420界面处具有大致等于硅锗籽晶层1410的锗含量，即20-25原子重量％。此外，过渡层1420毗邻和/或靠近高锗含量层1430的上部可在过渡层1420/高锗含量层1430界面处具有大致等于高锗含量层1430的锗含量，即大致在40-55原子重量％之间。过渡层420的厚度可在
Figure BPA00001346931500104
和
Figure BPA00001346931500105
之间变动。
过渡层1420可通过将处理温度从起始温度开始递减的动态方式的外延生长工艺形成，该起始温度基本等于硅锗籽晶层1410的成形温度，在700-800℃之间变动或更佳地在745-765℃之间变动。成形温度以基本线性方式从起始温度递减至终止温度。终止温度或第二温度在一个实施例中比起始温度或第一温度低大致25-100℃之间，或更佳地比起始温度或第一温度低大约45-55℃。在一个实施例中，过渡层1420沉积长达20-60秒之间变动的时间段。
通过在过渡层1420成形期间将DCS、HCl和GeH4的气体混合物流量从较高流量递减至降低流量而使过渡层1420进一步外延地形成。如果掺杂过渡层1420，则在形成过渡层1420的同时增大乙硼烷流量以提供基本等于或大于过渡层1420/高锗含量层1430界面处或附近的2.0×1020原子/cm3的硼浓度。在该实施例中，过渡层1420的成形提供以等于或小于2％膜松弛和健康膜形态的将近
Figure BPA00001346931500111
/分钟的生长速率选择性形成的渐变硅锗膜。
在步骤1520将高锗含量层1430选择性地形成在过渡层1420上以提供应变的晶体管结构。在一个实施例中，形成高锗含量层1430，同时在过渡层1420最终部分成形后仍然保持工艺处方参数恒定。该实施例中，高锗含量层1430以
Figure BPA00001346931500112
之间的厚度形成而锗含量在40-55原子重量％之间变动。高锗含量层1430可选择性地掺杂硼至2.0×1020原子/cm3-3.0×1020原子/cm3之间的浓度。
为了解说和阐述，已给出前面对本发明实施例的说明。它不旨在为穷举的或将本发明限定在所披露的精确形式。说明书和后面的权利要求书包括术语，例如左、右、顶、底、上方、下方、上、下、第一、第二等，它们仅为描述目的且不解释为限定。例如，指示相对垂直位置的术语指衬底或集成电路的器件侧(或有效表面)处于该衬底“顶”面的情形；衬底实际上可处于任何方位以在基准的标准地面坐标系中使衬底“顶”侧低于“底”侧并且仍然落在术语“顶”的涵义中。本文中(包括权利要求书中)使用的术语“在……上”不表示在第二层“上”的第一层直接在第二层上或与第二层直接接触，除非这是专门说明的；在第一层和第一层上的第二层之间可以有第三层或其它结构。本文描述的器件或物品的实施例可在多个位置和方位上制造、使用或运输。
本领域内技术人员能理解，许多修正和变化鉴于前面的教义是可能的。本领域内技术人员能发现附图所示各组件的许多等效组合和替代。因此本发明的范围不受该详细说明限制，而是受所附权利要求书限制。

Claims (20)

1.一种形成晶体化合物膜的方法，包括：
选择性地形成低锗含量籽晶层；
在所述低锗含量籽晶层上选择性地形成过渡层，所述过渡层是在将处理温度从第一温度递减至第二温度的同时形成的；以及
在所述过渡层上选择性地形成高锗含量层。
2.如权利要求1所述的方法，其特征在于，所述过渡层是在将二氯硅烷、氯化氢、锗烷流量从较高流量递减至较低流量的同时形成的。
3.如权利要求2所述的方法，其特征在于，所述过渡层是在将乙硼烷流量从较低流量增大至较高流量的同时形成的。
4.如权利要求3所述的方法，其特征在于，所述第一温度是从700℃和800℃之间的范围内选择的。
5.如权利要求4所述的方法，其特征在于，所述第二温度比所述第一温度低25-100℃之间。
6.如权利要求5所述的方法，其特征在于，所述低锗含量籽晶层掺杂硼至5.0×1019原子/cm3-1.5×1020原子/cm3之间范围的浓度。
7.如权利要求6所述的方法，其特征在于，所述高锗含量层掺杂硼至2.0×1020原子/cm3-3.0×1020原子/cm3之间范围的浓度。
8.一种方法，包括：
在多栅极本体上形成栅极叠层和一对间隔结构，其中所述间隔结构形成在所述栅极叠层的横向相对两侧上；
在毗邻所述间隔结构的区域蚀刻所述多栅极本体；以及
选择性地沉积渐变的高锗含量的硅锗叠层以形成直接毗邻于所述多栅极本体的源极区和漏极区。
9.如权利要求8所述的方法，其特征在于，所述渐变的高锗含量硅锗叠层由硅锗籽晶层、过渡层和高锗含量层构成。
10.如权利要求9所述的方法，其特征在于，所述过渡层是在将二氯硅烷、氯化氢、锗烷流量从较高流量递减至较低流量的同时形成的。
11.如权利要求10所述的方法，其特征在于，所述过渡层是在将乙硼烷流量从较低流量增大至较高流量的同时形成的。
12.如权利要求12所述的方法，其特征在于，形成所述过渡层开始于从700℃和800℃之间的范围内选择的第一温度。
13.如权利要求12所述的方法，其特征在于，形成所述过渡层结束于从比所述第一温度低25-100℃之间的范围内选择的第二温度。
14.一种晶体管，包括：
形成在衬底上的栅极叠层；
形成在所述栅极叠层的横向相对两侧上的间隔结构；以及
形成在毗邻于所述间隔结构且在所述间隔结构下方的衬底上的源极区和漏极区，所述源极区和所述漏极区包括硅锗籽晶层、过渡层以及高锗含量层。
15.如权利要求14所述的晶体管，其特征在于，所述过渡层的下部具有在20-25原子重量％之间的范围内的锗含量并且所述过渡层的上部具有在40-55原子重量％之间的范围内的锗含量。
16.如权利要求14所述的晶体管，其特征在于，所述硅锗籽晶层掺杂硼至5.0×1019原子/cm3-1.5×1020原子/cm3之间范围的浓度。
17.如权利要求15所述的晶体管，其特征在于，所述高锗含量层掺杂硼至2.0×1020原子/cm3-3.0×1020原子/cm3之间范围的浓度。
18.如权利要求15所述的晶体管，其特征在于，所述过渡层的厚度是从
Figure FPA00001346931400021
和
Figure FPA00001346931400022
之间的范围内选择的。
19.如权利要求18所述的晶体管，其特征在于，所述硅锗籽晶层的厚度是从
Figure FPA00001346931400023
之间的范围内选择的。
20.如权利要求19所述的晶体管，其特征在于，所述高锗含量层的厚度是从
Figure FPA00001346931400024
之间的范围内选择的。
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Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103377897A (zh) * 2012-04-23 2013-10-30 中芯国际集成电路制造(上海)有限公司 一种硅锗源/漏结构的形成方法
CN103715258A (zh) * 2012-09-28 2014-04-09 台湾积体电路制造股份有限公司 用于半导体器件的源极/漏极堆叠件压力源
WO2014071661A1 (zh) * 2012-11-09 2014-05-15 中国科学院微电子研究所 半导体器件及其制造方法
CN103839810A (zh) * 2012-11-21 2014-06-04 中芯国际集成电路制造(上海)有限公司 鳍式场效应晶体管芯片及其制造方法
CN104299996A (zh) * 2013-07-18 2015-01-21 国际商业机器公司 非对称替代金属栅场效应晶体管及其制造方法
CN105280496A (zh) * 2014-06-05 2016-01-27 联华电子股份有限公司 具有鳍状结构的半导体元件及其制作方法
CN106057672A (zh) * 2015-04-15 2016-10-26 台湾积体电路制造股份有限公司 半导体器件及其制造方法
CN106684148A (zh) * 2010-12-21 2017-05-17 英特尔公司 具有高浓度硼掺杂锗的晶体管
CN106847755A (zh) * 2015-12-07 2017-06-13 中芯国际集成电路制造(上海)有限公司 改善sram性能的方法
US9716172B2 (en) 2014-04-21 2017-07-25 Taiwan Semiconductor Manufacturing Company Limited Semiconductor device having multiple active area layers and its formation thereof
CN110571259A (zh) * 2018-06-05 2019-12-13 中芯国际集成电路制造(上海)有限公司 Finfet器件及其制备方法
US11476344B2 (en) 2011-09-30 2022-10-18 Daedalus Prime Llc Contact resistance reduction employing germanium overlayer pre-contact metalization

Families Citing this family (301)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8994104B2 (en) 1999-09-28 2015-03-31 Intel Corporation Contact resistance reduction employing germanium overlayer pre-contact metalization
US7422946B2 (en) * 2004-09-29 2008-09-09 Intel Corporation Independently accessed double-gate and tri-gate transistors in same process flow
JP2009099702A (ja) * 2007-10-16 2009-05-07 Toshiba Corp 半導体装置及びその製造方法
US7867891B2 (en) 2008-12-10 2011-01-11 Intel Corporation Dual metal interconnects for improved gap-fill, reliability, and reduced capacitance
US7902009B2 (en) 2008-12-11 2011-03-08 Intel Corporation Graded high germanium compound films for strained semiconductor devices
US9394608B2 (en) 2009-04-06 2016-07-19 Asm America, Inc. Semiconductor processing reactor and components thereof
US8802201B2 (en) 2009-08-14 2014-08-12 Asm America, Inc. Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species
US8202768B2 (en) * 2009-10-07 2012-06-19 Taiwan Semiconductor Manufacturing Company, Ltd. Method of fabricating a semiconductor device
US8436404B2 (en) 2009-12-30 2013-05-07 Intel Corporation Self-aligned contacts
US9263339B2 (en) 2010-05-20 2016-02-16 Taiwan Semiconductor Manufacturing Company, Ltd. Selective etching in the formation of epitaxy regions in MOS devices
US9064688B2 (en) 2010-05-20 2015-06-23 Taiwan Semiconductor Manufacturing Company, Ltd. Performing enhanced cleaning in the formation of MOS devices
US8828850B2 (en) 2010-05-20 2014-09-09 Taiwan Semiconductor Manufacturing Company, Ltd. Reducing variation by using combination epitaxy growth
CN102465336B (zh) * 2010-11-05 2014-07-09 上海华虹宏力半导体制造有限公司 一种高锗浓度的锗硅外延方法
US20120161105A1 (en) * 2010-12-22 2012-06-28 Willy Rachmady Uniaxially strained quantum well device and method of making same
US8957454B2 (en) * 2011-03-03 2015-02-17 International Rectifier Corporation III-Nitride semiconductor structures with strain absorbing interlayer transition modules
US8236634B1 (en) 2011-03-17 2012-08-07 International Business Machines Corporation Integration of fin-based devices and ETSOI devices
US9312155B2 (en) 2011-06-06 2016-04-12 Asm Japan K.K. High-throughput semiconductor-processing apparatus equipped with multiple dual-chamber modules
US10854498B2 (en) 2011-07-15 2020-12-01 Asm Ip Holding B.V. Wafer-supporting device and method for producing same
US20130023129A1 (en) 2011-07-20 2013-01-24 Asm America, Inc. Pressure transmitter for a semiconductor processing environment
US8685825B2 (en) * 2011-07-27 2014-04-01 Advanced Ion Beam Technology, Inc. Replacement source/drain finFET fabrication
US8871584B2 (en) 2011-07-27 2014-10-28 Advanced Ion Beam Technology, Inc. Replacement source/drain finFET fabrication
CN102931058B (zh) * 2011-08-08 2015-06-03 中芯国际集成电路制造(上海)有限公司 半导体结构的形成方法,pmos晶体管的形成方法
US9017481B1 (en) 2011-10-28 2015-04-28 Asm America, Inc. Process feed management for semiconductor substrate processing
US8658505B2 (en) 2011-12-14 2014-02-25 International Business Machines Corporation Embedded stressors for multigate transistor devices
US10658361B2 (en) 2011-12-28 2020-05-19 Intel Corporation Methods of integrating multiple gate dielectric transistors on a tri-gate (FINFET) process
US9224604B2 (en) 2012-04-05 2015-12-29 Globalfoundries Inc. Device and method for forming sharp extension region with controllable junction depth and lateral overlap
US8884370B2 (en) * 2012-04-27 2014-11-11 International Business Machines Corporation Narrow body field-effect transistor structures with free-standing extension regions
US8901615B2 (en) 2012-06-13 2014-12-02 Synopsys, Inc. N-channel and P-channel end-to-end finfet cell architecture
KR101909204B1 (ko) 2012-06-25 2018-10-17 삼성전자 주식회사 내장된 스트레인-유도 패턴을 갖는 반도체 소자 및 그 형성 방법
US10535735B2 (en) * 2012-06-29 2020-01-14 Intel Corporation Contact resistance reduced P-MOS transistors employing Ge-rich contact layer
US9136383B2 (en) 2012-08-09 2015-09-15 Taiwan Semiconductor Manufacturing Company, Ltd. Contact structure of semiconductor device
US10714315B2 (en) 2012-10-12 2020-07-14 Asm Ip Holdings B.V. Semiconductor reaction chamber showerhead
US20140167163A1 (en) * 2012-12-17 2014-06-19 International Business Machines Corporation Multi-Fin FinFETs with Epitaxially-Grown Merged Source/Drains
US20160376700A1 (en) 2013-02-01 2016-12-29 Asm Ip Holding B.V. System for treatment of deposition reactor
US9978650B2 (en) 2013-03-13 2018-05-22 Taiwan Semiconductor Manufacturing Company, Ltd. Transistor channel
US20140264493A1 (en) * 2013-03-13 2014-09-18 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor Device and Fabricating the Same
US8927373B2 (en) 2013-03-13 2015-01-06 Samsung Electronics Co, Ltd. Methods of fabricating non-planar transistors including current enhancing structures
US9070710B2 (en) * 2013-06-07 2015-06-30 United Microelectronics Corp. Semiconductor process
KR102104062B1 (ko) * 2013-10-31 2020-04-23 삼성전자 주식회사 기판 구조체, 이를 포함한 ｃｍｏｓ 소자 및 ｃｍｏｓ 소자 제조 방법
US9153669B2 (en) 2014-01-29 2015-10-06 International Business Machines Corporation Low capacitance finFET gate structure
US9379214B2 (en) * 2014-02-14 2016-06-28 Semi Solutions Llc Reduced variation MOSFET using a drain-extension-last process
US10683571B2 (en) 2014-02-25 2020-06-16 Asm Ip Holding B.V. Gas supply manifold and method of supplying gases to chamber using same
US9082698B1 (en) * 2014-03-07 2015-07-14 Globalfoundries Inc. Methods to improve FinFet semiconductor device behavior using co-implantation under the channel region
US10167557B2 (en) 2014-03-18 2019-01-01 Asm Ip Holding B.V. Gas distribution system, reactor including the system, and methods of using the same
US11015245B2 (en) 2014-03-19 2021-05-25 Asm Ip Holding B.V. Gas-phase reactor and system having exhaust plenum and components thereof
US9159812B1 (en) 2014-03-26 2015-10-13 Taiwan Semiconductor Manufacturing Co., Ltd. Fin sidewall removal to enlarge epitaxial source/drain volume
US9570554B2 (en) 2014-04-04 2017-02-14 International Business Machines Corporation Robust gate spacer for semiconductor devices
US10858737B2 (en) 2014-07-28 2020-12-08 Asm Ip Holding B.V. Showerhead assembly and components thereof
US9890456B2 (en) 2014-08-21 2018-02-13 Asm Ip Holding B.V. Method and system for in situ formation of gas-phase compounds
US20160056261A1 (en) * 2014-08-22 2016-02-25 Globalfoundries Inc. Embedded sigma-shaped semiconductor alloys formed in transistors
US9812323B2 (en) 2014-09-08 2017-11-07 Internaitonal Business Machines Corporation Low external resistance channels in III-V semiconductor devices
US10941490B2 (en) 2014-10-07 2021-03-09 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
US9397162B1 (en) * 2014-12-29 2016-07-19 Globalfoundries Inc. FinFET conformal junction and abrupt junction with reduced damage method and device
US9406752B2 (en) 2014-12-29 2016-08-02 Globalfoundries Inc. FinFET conformal junction and high EPI surface dopant concentration method and device
US10276355B2 (en) 2015-03-12 2019-04-30 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
US10458018B2 (en) 2015-06-26 2019-10-29 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
US10600673B2 (en) 2015-07-07 2020-03-24 Asm Ip Holding B.V. Magnetic susceptor to baseplate seal
US9806194B2 (en) * 2015-07-15 2017-10-31 Samsung Electronics Co., Ltd. FinFET with fin having different Ge doped region
US10211308B2 (en) 2015-10-21 2019-02-19 Asm Ip Holding B.V. NbMC layers
US9425196B1 (en) 2015-12-08 2016-08-23 International Business Machines Corporation Multiple threshold voltage FinFETs
US9502420B1 (en) 2015-12-19 2016-11-22 International Business Machines Corporation Structure and method for highly strained germanium channel fins for high mobility pFINFETs
US11139308B2 (en) 2015-12-29 2021-10-05 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
US10529554B2 (en) 2016-02-19 2020-01-07 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US11018254B2 (en) * 2016-03-31 2021-05-25 International Business Machines Corporation Fabrication of vertical fin transistor with multiple threshold voltages
US10865475B2 (en) 2016-04-21 2020-12-15 Asm Ip Holding B.V. Deposition of metal borides and silicides
US10190213B2 (en) 2016-04-21 2019-01-29 Asm Ip Holding B.V. Deposition of metal borides
US10367080B2 (en) 2016-05-02 2019-07-30 Asm Ip Holding B.V. Method of forming a germanium oxynitride film
US10032628B2 (en) 2016-05-02 2018-07-24 Asm Ip Holding B.V. Source/drain performance through conformal solid state doping
US11453943B2 (en) 2016-05-25 2022-09-27 Asm Ip Holding B.V. Method for forming carbon-containing silicon/metal oxide or nitride film by ALD using silicon precursor and hydrocarbon precursor
US10612137B2 (en) 2016-07-08 2020-04-07 Asm Ip Holdings B.V. Organic reactants for atomic layer deposition
US9859151B1 (en) 2016-07-08 2018-01-02 Asm Ip Holding B.V. Selective film deposition method to form air gaps
US10714385B2 (en) 2016-07-19 2020-07-14 Asm Ip Holding B.V. Selective deposition of tungsten
US9887082B1 (en) 2016-07-28 2018-02-06 Asm Ip Holding B.V. Method and apparatus for filling a gap
US9812320B1 (en) 2016-07-28 2017-11-07 Asm Ip Holding B.V. Method and apparatus for filling a gap
KR102532607B1 (ko) 2016-07-28 2023-05-15 에이에스엠 아이피 홀딩 비.브이. 기판 가공 장치 및 그 동작 방법
US10643826B2 (en) 2016-10-26 2020-05-05 Asm Ip Holdings B.V. Methods for thermally calibrating reaction chambers
US11532757B2 (en) 2016-10-27 2022-12-20 Asm Ip Holding B.V. Deposition of charge trapping layers
US10714350B2 (en) 2016-11-01 2020-07-14 ASM IP Holdings, B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10643904B2 (en) 2016-11-01 2020-05-05 Asm Ip Holdings B.V. Methods for forming a semiconductor device and related semiconductor device structures
US10229833B2 (en) 2016-11-01 2019-03-12 Asm Ip Holding B.V. Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures
KR102546317B1 (ko) 2016-11-15 2023-06-21 에이에스엠 아이피 홀딩 비.브이. 기체 공급 유닛 및 이를 포함하는 기판 처리 장치
KR20180068582A (ko) 2016-12-14 2018-06-22 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US11581186B2 (en) 2016-12-15 2023-02-14 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus
US11447861B2 (en) 2016-12-15 2022-09-20 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
KR20180070971A (ko) 2016-12-19 2018-06-27 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US10269558B2 (en) 2016-12-22 2019-04-23 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10867788B2 (en) 2016-12-28 2020-12-15 Asm Ip Holding B.V. Method of forming a structure on a substrate
US11390950B2 (en) 2017-01-10 2022-07-19 Asm Ip Holding B.V. Reactor system and method to reduce residue buildup during a film deposition process
US10655221B2 (en) 2017-02-09 2020-05-19 Asm Ip Holding B.V. Method for depositing oxide film by thermal ALD and PEALD
US10468261B2 (en) 2017-02-15 2019-11-05 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
US10529563B2 (en) 2017-03-29 2020-01-07 Asm Ip Holdings B.V. Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures
KR102457289B1 (ko) 2017-04-25 2022-10-21 에이에스엠 아이피 홀딩 비.브이. 박막 증착 방법 및 반도체 장치의 제조 방법
US10892156B2 (en) 2017-05-08 2021-01-12 Asm Ip Holding B.V. Methods for forming a silicon nitride film on a substrate and related semiconductor device structures
US10770286B2 (en) 2017-05-08 2020-09-08 Asm Ip Holdings B.V. Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
US11306395B2 (en) 2017-06-28 2022-04-19 Asm Ip Holding B.V. Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus
US10685834B2 (en) 2017-07-05 2020-06-16 Asm Ip Holdings B.V. Methods for forming a silicon germanium tin layer and related semiconductor device structures
KR20190009245A (ko) 2017-07-18 2019-01-28 에이에스엠 아이피 홀딩 비.브이. 반도체 소자 구조물 형성 방법 및 관련된 반도체 소자 구조물
US11374112B2 (en) 2017-07-19 2022-06-28 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US11018002B2 (en) 2017-07-19 2021-05-25 Asm Ip Holding B.V. Method for selectively depositing a Group IV semiconductor and related semiconductor device structures
US10541333B2 (en) 2017-07-19 2020-01-21 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US10590535B2 (en) 2017-07-26 2020-03-17 Asm Ip Holdings B.V. Chemical treatment, deposition and/or infiltration apparatus and method for using the same
US10141430B1 (en) * 2017-07-27 2018-11-27 Taiwan Semiconductor Manufacturing Co., Ltd. Fin structures with uniform threshold voltage distribution and method of making the same
US10692741B2 (en) 2017-08-08 2020-06-23 Asm Ip Holdings B.V. Radiation shield
US10770336B2 (en) 2017-08-08 2020-09-08 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US10249524B2 (en) 2017-08-09 2019-04-02 Asm Ip Holding B.V. Cassette holder assembly for a substrate cassette and holding member for use in such assembly
US11769682B2 (en) 2017-08-09 2023-09-26 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US11139191B2 (en) 2017-08-09 2021-10-05 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
USD900036S1 (en) 2017-08-24 2020-10-27 Asm Ip Holding B.V. Heater electrical connector and adapter
US11830730B2 (en) 2017-08-29 2023-11-28 Asm Ip Holding B.V. Layer forming method and apparatus
US11056344B2 (en) 2017-08-30 2021-07-06 Asm Ip Holding B.V. Layer forming method
US11295980B2 (en) 2017-08-30 2022-04-05 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
KR102491945B1 (ko) 2017-08-30 2023-01-26 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
KR102630301B1 (ko) 2017-09-21 2024-01-29 에이에스엠 아이피 홀딩 비.브이. 침투성 재료의 순차 침투 합성 방법 처리 및 이를 이용하여 형성된 구조물 및 장치
US10844484B2 (en) 2017-09-22 2020-11-24 Asm Ip Holding B.V. Apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US10658205B2 (en) 2017-09-28 2020-05-19 Asm Ip Holdings B.V. Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber
US10403504B2 (en) 2017-10-05 2019-09-03 Asm Ip Holding B.V. Method for selectively depositing a metallic film on a substrate
US10319588B2 (en) 2017-10-10 2019-06-11 Asm Ip Holding B.V. Method for depositing a metal chalcogenide on a substrate by cyclical deposition
US10923344B2 (en) 2017-10-30 2021-02-16 Asm Ip Holding B.V. Methods for forming a semiconductor structure and related semiconductor structures
US10910262B2 (en) 2017-11-16 2021-02-02 Asm Ip Holding B.V. Method of selectively depositing a capping layer structure on a semiconductor device structure
KR102443047B1 (ko) 2017-11-16 2022-09-14 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치 방법 및 그에 의해 제조된 장치
KR102481476B1 (ko) 2017-11-17 2022-12-26 삼성전자 주식회사 반도체 소자
US11022879B2 (en) 2017-11-24 2021-06-01 Asm Ip Holding B.V. Method of forming an enhanced unexposed photoresist layer
JP7214724B2 (ja) 2017-11-27 2023-01-30 エーエスエム アイピー ホールディング ビー．ブイ． バッチ炉で利用されるウェハカセットを収納するための収納装置
US11639811B2 (en) 2017-11-27 2023-05-02 Asm Ip Holding B.V. Apparatus including a clean mini environment
US10312350B1 (en) 2017-11-28 2019-06-04 International Business Machines Corporation Nanosheet with changing SiGe percentage for SiGe lateral recess
US20190221483A1 (en) * 2018-01-12 2019-07-18 Globalfoundries Inc. Single work function enablement for silicon nanowire device
US10872771B2 (en) 2018-01-16 2020-12-22 Asm Ip Holding B. V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
US11482412B2 (en) 2018-01-19 2022-10-25 Asm Ip Holding B.V. Method for depositing a gap-fill layer by plasma-assisted deposition
TW202325889A (zh) 2018-01-19 2023-07-01 荷蘭商Ａｓｍ 智慧財產控股公司 沈積方法
USD903477S1 (en) 2018-01-24 2020-12-01 Asm Ip Holdings B.V. Metal clamp
US11018047B2 (en) 2018-01-25 2021-05-25 Asm Ip Holding B.V. Hybrid lift pin
US10535516B2 (en) * 2018-02-01 2020-01-14 Asm Ip Holdings B.V. Method for depositing a semiconductor structure on a surface of a substrate and related semiconductor structures
USD880437S1 (en) 2018-02-01 2020-04-07 Asm Ip Holding B.V. Gas supply plate for semiconductor manufacturing apparatus
US11081345B2 (en) 2018-02-06 2021-08-03 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
US10896820B2 (en) 2018-02-14 2021-01-19 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
CN111699278B (zh) 2018-02-14 2023-05-16 Asm Ip私人控股有限公司 通过循环沉积工艺在衬底上沉积含钌膜的方法
US10731249B2 (en) 2018-02-15 2020-08-04 Asm Ip Holding B.V. Method of forming a transition metal containing film on a substrate by a cyclical deposition process, a method for supplying a transition metal halide compound to a reaction chamber, and related vapor deposition apparatus
US10658181B2 (en) 2018-02-20 2020-05-19 Asm Ip Holding B.V. Method of spacer-defined direct patterning in semiconductor fabrication
KR102636427B1 (ko) 2018-02-20 2024-02-13 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법 및 장치
US10975470B2 (en) 2018-02-23 2021-04-13 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11473195B2 (en) 2018-03-01 2022-10-18 Asm Ip Holding B.V. Semiconductor processing apparatus and a method for processing a substrate
US11629406B2 (en) 2018-03-09 2023-04-18 Asm Ip Holding B.V. Semiconductor processing apparatus comprising one or more pyrometers for measuring a temperature of a substrate during transfer of the substrate
US11114283B2 (en) 2018-03-16 2021-09-07 Asm Ip Holding B.V. Reactor, system including the reactor, and methods of manufacturing and using same
KR102646467B1 (ko) 2018-03-27 2024-03-11 에이에스엠 아이피 홀딩 비.브이. 기판 상에 전극을 형성하는 방법 및 전극을 포함하는 반도체 소자 구조
US11088002B2 (en) 2018-03-29 2021-08-10 Asm Ip Holding B.V. Substrate rack and a substrate processing system and method
US11230766B2 (en) 2018-03-29 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
KR102501472B1 (ko) 2018-03-30 2023-02-20 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법
TW202344708A (zh) 2018-05-08 2023-11-16 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 藉由循環沉積製程於基板上沉積氧化物膜之方法及相關裝置結構
TW202349473A (zh) 2018-05-11 2023-12-16 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 用於基板上形成摻雜金屬碳化物薄膜之方法及相關半導體元件結構
KR102596988B1 (ko) 2018-05-28 2023-10-31 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법 및 그에 의해 제조된 장치
US11270899B2 (en) 2018-06-04 2022-03-08 Asm Ip Holding B.V. Wafer handling chamber with moisture reduction
US11718913B2 (en) 2018-06-04 2023-08-08 Asm Ip Holding B.V. Gas distribution system and reactor system including same
US11286562B2 (en) 2018-06-08 2022-03-29 Asm Ip Holding B.V. Gas-phase chemical reactor and method of using same
US10741641B2 (en) 2018-06-20 2020-08-11 International Business Machines Corporation Dielectric isolation and SiGe channel formation for integration in CMOS nanosheet channel devices
KR102568797B1 (ko) 2018-06-21 2023-08-21 에이에스엠 아이피 홀딩 비.브이. 기판 처리 시스템
US10797133B2 (en) 2018-06-21 2020-10-06 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
KR20210027265A (ko) 2018-06-27 2021-03-10 에이에스엠 아이피 홀딩 비.브이. 금속 함유 재료를 형성하기 위한 주기적 증착 방법 및 금속 함유 재료를 포함하는 막 및 구조체
CN112292478A (zh) 2018-06-27 2021-01-29 Asm Ip私人控股有限公司 用于形成含金属的材料的循环沉积方法及包含含金属的材料的膜和结构
KR20200002519A (ko) 2018-06-29 2020-01-08 에이에스엠 아이피 홀딩 비.브이. 박막 증착 방법 및 반도체 장치의 제조 방법
US10612136B2 (en) 2018-06-29 2020-04-07 ASM IP Holding, B.V. Temperature-controlled flange and reactor system including same
US10388513B1 (en) 2018-07-03 2019-08-20 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10755922B2 (en) 2018-07-03 2020-08-25 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10767789B2 (en) 2018-07-16 2020-09-08 Asm Ip Holding B.V. Diaphragm valves, valve components, and methods for forming valve components
US11053591B2 (en) 2018-08-06 2021-07-06 Asm Ip Holding B.V. Multi-port gas injection system and reactor system including same
US10883175B2 (en) 2018-08-09 2021-01-05 Asm Ip Holding B.V. Vertical furnace for processing substrates and a liner for use therein
US10829852B2 (en) 2018-08-16 2020-11-10 Asm Ip Holding B.V. Gas distribution device for a wafer processing apparatus
US11430674B2 (en) 2018-08-22 2022-08-30 Asm Ip Holding B.V. Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
KR20200030162A (ko) 2018-09-11 2020-03-20 에이에스엠 아이피 홀딩 비.브이. 박막 증착 방법
US11024523B2 (en) 2018-09-11 2021-06-01 Asm Ip Holding B.V. Substrate processing apparatus and method
US11049751B2 (en) 2018-09-14 2021-06-29 Asm Ip Holding B.V. Cassette supply system to store and handle cassettes and processing apparatus equipped therewith
CN110970344A (zh) 2018-10-01 2020-04-07 Asm Ip控股有限公司 衬底保持设备、包含所述设备的系统及其使用方法
US11232963B2 (en) 2018-10-03 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
KR102592699B1 (ko) 2018-10-08 2023-10-23 에이에스엠 아이피 홀딩 비.브이. 기판 지지 유닛 및 이를 포함하는 박막 증착 장치와 기판 처리 장치
US10847365B2 (en) 2018-10-11 2020-11-24 Asm Ip Holding B.V. Method of forming conformal silicon carbide film by cyclic CVD
US10811256B2 (en) 2018-10-16 2020-10-20 Asm Ip Holding B.V. Method for etching a carbon-containing feature
KR102605121B1 (ko) 2018-10-19 2023-11-23 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치 및 기판 처리 방법
KR102546322B1 (ko) 2018-10-19 2023-06-21 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치 및 기판 처리 방법
USD948463S1 (en) 2018-10-24 2022-04-12 Asm Ip Holding B.V. Susceptor for semiconductor substrate supporting apparatus
US11087997B2 (en) 2018-10-31 2021-08-10 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
KR20200051105A (ko) 2018-11-02 2020-05-13 에이에스엠 아이피 홀딩 비.브이. 기판 지지 유닛 및 이를 포함하는 기판 처리 장치
US11572620B2 (en) 2018-11-06 2023-02-07 Asm Ip Holding B.V. Methods for selectively depositing an amorphous silicon film on a substrate
US11031242B2 (en) 2018-11-07 2021-06-08 Asm Ip Holding B.V. Methods for depositing a boron doped silicon germanium film
US10847366B2 (en) 2018-11-16 2020-11-24 Asm Ip Holding B.V. Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process
US10818758B2 (en) 2018-11-16 2020-10-27 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US11217444B2 (en) 2018-11-30 2022-01-04 Asm Ip Holding B.V. Method for forming an ultraviolet radiation responsive metal oxide-containing film
KR102636428B1 (ko) 2018-12-04 2024-02-13 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치를 세정하는 방법
US11158513B2 (en) 2018-12-13 2021-10-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
TW202037745A (zh) 2018-12-14 2020-10-16 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 形成裝置結構之方法、其所形成之結構及施行其之系統
TWI819180B (zh) 2019-01-17 2023-10-21 荷蘭商Ａｓｍ 智慧財產控股公司 藉由循環沈積製程於基板上形成含過渡金屬膜之方法
KR20200091543A (ko) 2019-01-22 2020-07-31 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
CN111524788B (zh) 2019-02-01 2023-11-24 Asm Ip私人控股有限公司 氧化硅的拓扑选择性膜形成的方法
US11482533B2 (en) 2019-02-20 2022-10-25 Asm Ip Holding B.V. Apparatus and methods for plug fill deposition in 3-D NAND applications
KR102638425B1 (ko) 2019-02-20 2024-02-21 에이에스엠 아이피 홀딩 비.브이. 기판 표면 내에 형성된 오목부를 충진하기 위한 방법 및 장치
TW202104632A (zh) 2019-02-20 2021-02-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 用來填充形成於基材表面內之凹部的循環沉積方法及設備
KR102626263B1 (ko) 2019-02-20 2024-01-16 에이에스엠 아이피 홀딩 비.브이. 처리 단계를 포함하는 주기적 증착 방법 및 이를 위한 장치
TW202100794A (zh) 2019-02-22 2021-01-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 基材處理設備及處理基材之方法
KR20200108243A (ko) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. SiOC 층을 포함한 구조체 및 이의 형성 방법
KR20200108242A (ko) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. 실리콘 질화물 층을 선택적으로 증착하는 방법, 및 선택적으로 증착된 실리콘 질화물 층을 포함하는 구조체
KR20200108248A (ko) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. SiOCN 층을 포함한 구조체 및 이의 형성 방법
JP2020167398A (ja) 2019-03-28 2020-10-08 エーエスエム・アイピー・ホールディング・ベー・フェー ドアオープナーおよびドアオープナーが提供される基材処理装置
KR20200116855A (ko) 2019-04-01 2020-10-13 에이에스엠 아이피 홀딩 비.브이. 반도체 소자를 제조하는 방법
KR20200123380A (ko) 2019-04-19 2020-10-29 에이에스엠 아이피 홀딩 비.브이. 층 형성 방법 및 장치
KR20200125453A (ko) 2019-04-24 2020-11-04 에이에스엠 아이피 홀딩 비.브이. 기상 반응기 시스템 및 이를 사용하는 방법
KR20200130118A (ko) 2019-05-07 2020-11-18 에이에스엠 아이피 홀딩 비.브이. 비정질 탄소 중합체 막을 개질하는 방법
KR20200130121A (ko) 2019-05-07 2020-11-18 에이에스엠 아이피 홀딩 비.브이. 딥 튜브가 있는 화학물질 공급원 용기
KR20200130652A (ko) 2019-05-10 2020-11-19 에이에스엠 아이피 홀딩 비.브이. 표면 상에 재료를 증착하는 방법 및 본 방법에 따라 형성된 구조
JP2020188255A (ja) 2019-05-16 2020-11-19 エーエスエム アイピー ホールディング ビー．ブイ． ウェハボートハンドリング装置、縦型バッチ炉および方法
USD975665S1 (en) 2019-05-17 2023-01-17 Asm Ip Holding B.V. Susceptor shaft
USD947913S1 (en) 2019-05-17 2022-04-05 Asm Ip Holding B.V. Susceptor shaft
USD935572S1 (en) 2019-05-24 2021-11-09 Asm Ip Holding B.V. Gas channel plate
USD922229S1 (en) 2019-06-05 2021-06-15 Asm Ip Holding B.V. Device for controlling a temperature of a gas supply unit
KR20200141002A (ko) 2019-06-06 2020-12-17 에이에스엠 아이피 홀딩 비.브이. 배기 가스 분석을 포함한 기상 반응기 시스템을 사용하는 방법
KR20200143254A (ko) 2019-06-11 2020-12-23 에이에스엠 아이피 홀딩 비.브이. 개질 가스를 사용하여 전자 구조를 형성하는 방법, 상기 방법을 수행하기 위한 시스템, 및 상기 방법을 사용하여 형성되는 구조
USD944946S1 (en) 2019-06-14 2022-03-01 Asm Ip Holding B.V. Shower plate
USD931978S1 (en) 2019-06-27 2021-09-28 Asm Ip Holding B.V. Showerhead vacuum transport
KR20210005515A (ko) 2019-07-03 2021-01-14 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치용 온도 제어 조립체 및 이를 사용하는 방법
JP2021015791A (ja) 2019-07-09 2021-02-12 エーエスエム アイピー ホールディング ビー．ブイ． 同軸導波管を用いたプラズマ装置、基板処理方法
CN112216646A (zh) 2019-07-10 2021-01-12 Asm Ip私人控股有限公司 基板支撑组件及包括其的基板处理装置
KR20210010307A (ko) 2019-07-16 2021-01-27 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
KR20210010816A (ko) 2019-07-17 2021-01-28 에이에스엠 아이피 홀딩 비.브이. 라디칼 보조 점화 플라즈마 시스템 및 방법
KR20210010820A (ko) * 2019-07-17 2021-01-28 에이에스엠 아이피 홀딩 비.브이. 실리콘 게르마늄 구조를 형성하는 방법
US11643724B2 (en) 2019-07-18 2023-05-09 Asm Ip Holding B.V. Method of forming structures using a neutral beam
CN112242296A (zh) 2019-07-19 2021-01-19 Asm Ip私人控股有限公司 形成拓扑受控的无定形碳聚合物膜的方法
TW202113936A (zh) 2019-07-29 2021-04-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 用於利用n型摻雜物及/或替代摻雜物選擇性沉積以達成高摻雜物併入之方法
CN112309900A (zh) 2019-07-30 2021-02-02 Asm Ip私人控股有限公司 基板处理设备
CN112309899A (zh) 2019-07-30 2021-02-02 Asm Ip私人控股有限公司 基板处理设备
US11587814B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11227782B2 (en) 2019-07-31 2022-01-18 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587815B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
KR20210018759A (ko) 2019-08-05 2021-02-18 에이에스엠 아이피 홀딩 비.브이. 화학물질 공급원 용기를 위한 액체 레벨 센서
USD965044S1 (en) 2019-08-19 2022-09-27 Asm Ip Holding B.V. Susceptor shaft
USD965524S1 (en) 2019-08-19 2022-10-04 Asm Ip Holding B.V. Susceptor support
JP2021031769A (ja) 2019-08-21 2021-03-01 エーエスエム アイピー ホールディング ビー．ブイ． 成膜原料混合ガス生成装置及び成膜装置
USD940837S1 (en) 2019-08-22 2022-01-11 Asm Ip Holding B.V. Electrode
USD979506S1 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Insulator
USD930782S1 (en) 2019-08-22 2021-09-14 Asm Ip Holding B.V. Gas distributor
USD949319S1 (en) 2019-08-22 2022-04-19 Asm Ip Holding B.V. Exhaust duct
KR20210024423A (ko) 2019-08-22 2021-03-05 에이에스엠 아이피 홀딩 비.브이. 홀을 구비한 구조체를 형성하기 위한 방법
KR20210024420A (ko) 2019-08-23 2021-03-05 에이에스엠 아이피 홀딩 비.브이. 비스(디에틸아미노)실란을 사용하여 peald에 의해 개선된 품질을 갖는 실리콘 산화물 막을 증착하기 위한 방법
US11286558B2 (en) 2019-08-23 2022-03-29 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
KR20210029090A (ko) 2019-09-04 2021-03-15 에이에스엠 아이피 홀딩 비.브이. 희생 캡핑 층을 이용한 선택적 증착 방법
KR20210029663A (ko) 2019-09-05 2021-03-16 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US11562901B2 (en) 2019-09-25 2023-01-24 Asm Ip Holding B.V. Substrate processing method
CN112593212B (zh) 2019-10-02 2023-12-22 Asm Ip私人控股有限公司 通过循环等离子体增强沉积工艺形成拓扑选择性氧化硅膜的方法
TW202129060A (zh) 2019-10-08 2021-08-01 荷蘭商Ａｓｍ Ｉｐ控股公司 基板處理裝置、及基板處理方法
TW202115273A (zh) 2019-10-10 2021-04-16 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 形成光阻底層之方法及包括光阻底層之結構
KR20210045930A (ko) 2019-10-16 2021-04-27 에이에스엠 아이피 홀딩 비.브이. 실리콘 산화물의 토폴로지-선택적 막의 형성 방법
US11637014B2 (en) 2019-10-17 2023-04-25 Asm Ip Holding B.V. Methods for selective deposition of doped semiconductor material
KR20210047808A (ko) 2019-10-21 2021-04-30 에이에스엠 아이피 홀딩 비.브이. 막을 선택적으로 에칭하기 위한 장치 및 방법
US11646205B2 (en) 2019-10-29 2023-05-09 Asm Ip Holding B.V. Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same
KR20210054983A (ko) 2019-11-05 2021-05-14 에이에스엠 아이피 홀딩 비.브이. 도핑된 반도체 층을 갖는 구조체 및 이를 형성하기 위한 방법 및 시스템
US11501968B2 (en) 2019-11-15 2022-11-15 Asm Ip Holding B.V. Method for providing a semiconductor device with silicon filled gaps
KR20210062561A (ko) 2019-11-20 2021-05-31 에이에스엠 아이피 홀딩 비.브이. 기판의 표면 상에 탄소 함유 물질을 증착하는 방법, 상기 방법을 사용하여 형성된 구조물, 및 상기 구조물을 형성하기 위한 시스템
CN112951697A (zh) 2019-11-26 2021-06-11 Asm Ip私人控股有限公司 基板处理设备
US11450529B2 (en) 2019-11-26 2022-09-20 Asm Ip Holding B.V. Methods for selectively forming a target film on a substrate comprising a first dielectric surface and a second metallic surface
CN112885693A (zh) 2019-11-29 2021-06-01 Asm Ip私人控股有限公司 基板处理设备
CN112885692A (zh) 2019-11-29 2021-06-01 Asm Ip私人控股有限公司 基板处理设备
JP2021090042A (ja) 2019-12-02 2021-06-10 エーエスエム アイピー ホールディング ビー．ブイ． 基板処理装置、基板処理方法
KR20210070898A (ko) 2019-12-04 2021-06-15 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
CN112992667A (zh) 2019-12-17 2021-06-18 Asm Ip私人控股有限公司 形成氮化钒层的方法和包括氮化钒层的结构
US11527403B2 (en) 2019-12-19 2022-12-13 Asm Ip Holding B.V. Methods for filling a gap feature on a substrate surface and related semiconductor structures
KR20210095050A (ko) 2020-01-20 2021-07-30 에이에스엠 아이피 홀딩 비.브이. 박막 형성 방법 및 박막 표면 개질 방법
TW202130846A (zh) 2020-02-03 2021-08-16 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 形成包括釩或銦層的結構之方法
KR20210100010A (ko) 2020-02-04 2021-08-13 에이에스엠 아이피 홀딩 비.브이. 대형 물품의 투과율 측정을 위한 방법 및 장치
US11776846B2 (en) 2020-02-07 2023-10-03 Asm Ip Holding B.V. Methods for depositing gap filling fluids and related systems and devices
TW202146715A (zh) 2020-02-17 2021-12-16 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 用於生長磷摻雜矽層之方法及其系統
US11316030B2 (en) * 2020-02-19 2022-04-26 Taiwan Semiconductor Manufacturing Co., Ltd. Fin field-effect transistor device and method
KR20210116240A (ko) 2020-03-11 2021-09-27 에이에스엠 아이피 홀딩 비.브이. 조절성 접합부를 갖는 기판 핸들링 장치
KR20210116249A (ko) 2020-03-11 2021-09-27 에이에스엠 아이피 홀딩 비.브이. 록아웃 태그아웃 어셈블리 및 시스템 그리고 이의 사용 방법
CN113394086A (zh) 2020-03-12 2021-09-14 Asm Ip私人控股有限公司 用于制造具有目标拓扑轮廓的层结构的方法
KR20210124042A (ko) 2020-04-02 2021-10-14 에이에스엠 아이피 홀딩 비.브이. 박막 형성 방법
TW202146689A (zh) 2020-04-03 2021-12-16 荷蘭商Ａｓｍ Ｉｐ控股公司 阻障層形成方法及半導體裝置的製造方法
TW202145344A (zh) 2020-04-08 2021-12-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 用於選擇性蝕刻氧化矽膜之設備及方法
US11821078B2 (en) 2020-04-15 2023-11-21 Asm Ip Holding B.V. Method for forming precoat film and method for forming silicon-containing film
TW202146831A (zh) 2020-04-24 2021-12-16 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 垂直批式熔爐總成、及用於冷卻垂直批式熔爐之方法
KR20210132576A (ko) 2020-04-24 2021-11-04 에이에스엠 아이피 홀딩 비.브이. 바나듐 나이트라이드 함유 층을 형성하는 방법 및 이를 포함하는 구조
KR20210132600A (ko) 2020-04-24 2021-11-04 에이에스엠 아이피 홀딩 비.브이. 바나듐, 질소 및 추가 원소를 포함한 층을 증착하기 위한 방법 및 시스템
KR20210134226A (ko) 2020-04-29 2021-11-09 에이에스엠 아이피 홀딩 비.브이. 고체 소스 전구체 용기
KR20210134869A (ko) 2020-05-01 2021-11-11 에이에스엠 아이피 홀딩 비.브이. Foup 핸들러를 이용한 foup의 빠른 교환
KR20210141379A (ko) 2020-05-13 2021-11-23 에이에스엠 아이피 홀딩 비.브이. 반응기 시스템용 레이저 정렬 고정구
KR20210143653A (ko) 2020-05-19 2021-11-29 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
KR20210145078A (ko) 2020-05-21 2021-12-01 에이에스엠 아이피 홀딩 비.브이. 다수의 탄소 층을 포함한 구조체 및 이를 형성하고 사용하는 방법
TW202201602A (zh) 2020-05-29 2022-01-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 基板處理方法
TW202218133A (zh) 2020-06-24 2022-05-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 形成含矽層之方法
TW202217953A (zh) 2020-06-30 2022-05-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 基板處理方法
KR20220010438A (ko) 2020-07-17 2022-01-25 에이에스엠 아이피 홀딩 비.브이. 포토리소그래피에 사용하기 위한 구조체 및 방법
TW202204662A (zh) 2020-07-20 2022-02-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 用於沉積鉬層之方法及系統
US11725280B2 (en) 2020-08-26 2023-08-15 Asm Ip Holding B.V. Method for forming metal silicon oxide and metal silicon oxynitride layers
USD990534S1 (en) 2020-09-11 2023-06-27 Asm Ip Holding B.V. Weighted lift pin
USD1012873S1 (en) 2020-09-24 2024-01-30 Asm Ip Holding B.V. Electrode for semiconductor processing apparatus
TW202229613A (zh) 2020-10-14 2022-08-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 於階梯式結構上沉積材料的方法
TW202217037A (zh) 2020-10-22 2022-05-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 沉積釩金屬的方法、結構、裝置及沉積總成
TW202223136A (zh) 2020-10-28 2022-06-16 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 用於在基板上形成層之方法、及半導體處理系統
TW202235675A (zh) 2020-11-30 2022-09-16 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 注入器、及基板處理設備
US11946137B2 (en) 2020-12-16 2024-04-02 Asm Ip Holding B.V. Runout and wobble measurement fixtures
TW202231903A (zh) 2020-12-22 2022-08-16 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 過渡金屬沉積方法、過渡金屬層、用於沉積過渡金屬於基板上的沉積總成
USD1023959S1 (en) 2021-05-11 2024-04-23 Asm Ip Holding B.V. Electrode for substrate processing apparatus
USD980813S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas flow control plate for substrate processing apparatus
USD980814S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas distributor for substrate processing apparatus
USD981973S1 (en) 2021-05-11 2023-03-28 Asm Ip Holding B.V. Reactor wall for substrate processing apparatus
USD990441S1 (en) 2021-09-07 2023-06-27 Asm Ip Holding B.V. Gas flow control plate

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060113542A1 (en) * 2004-11-30 2006-06-01 Massachusetts Institute Of Technology Method for forming low defect density alloy graded layers and structure containing such layers
US20070235802A1 (en) * 2006-04-05 2007-10-11 Chartered Semiconductor Manufacturing Ltd Method to control source/drain stressor profiles for stress engineering

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6770134B2 (en) * 2001-05-24 2004-08-03 Applied Materials, Inc. Method for fabricating waveguides
KR100406537B1 (ko) * 2001-12-03 2003-11-20 주식회사 하이닉스반도체 반도체장치의 제조 방법
GB0212616D0 (en) * 2002-05-31 2002-07-10 Univ Warwick Formation of lattice-tuning semiconductor substrates
AU2003274922A1 (en) * 2002-08-23 2004-03-11 Amberwave Systems Corporation Semiconductor heterostructures having reduced dislocation pile-ups and related methods
US7105894B2 (en) * 2003-02-27 2006-09-12 Taiwan Semiconductor Manufacturing Co., Ltd. Contacts to semiconductor fin devices
US7105390B2 (en) * 2003-12-30 2006-09-12 Intel Corporation Nonplanar transistors with metal gate electrodes
US7335959B2 (en) * 2005-01-06 2008-02-26 Intel Corporation Device with stepped source/drain region profile
US7348232B2 (en) * 2005-03-01 2008-03-25 Texas Instruments Incorporated Highly activated carbon selective epitaxial process for CMOS
JP2006324466A (ja) * 2005-05-19 2006-11-30 Sumco Corp 半導体ウェーハの製造方法
WO2007100589A1 (en) * 2006-02-28 2007-09-07 Advanced Micro Devices, Inc. Transistor device having an increased threshold stability without drive current degradation
JP4345774B2 (ja) * 2006-04-26 2009-10-14 ソニー株式会社 半導体装置の製造方法
US7785995B2 (en) * 2006-05-09 2010-08-31 Asm America, Inc. Semiconductor buffer structures
JP4271210B2 (ja) * 2006-06-30 2009-06-03 株式会社東芝 電界効果トランジスタ、集積回路素子、及びそれらの製造方法
JP5076388B2 (ja) * 2006-07-28 2012-11-21 富士通セミコンダクター株式会社 半導体装置及びその製造方法
US7700470B2 (en) 2006-09-22 2010-04-20 Intel Corporation Selective anisotropic wet etching of workfunction metal for semiconductor devices
US7544997B2 (en) * 2007-02-16 2009-06-09 Freescale Semiconductor, Inc. Multi-layer source/drain stressor
US7732285B2 (en) 2007-03-28 2010-06-08 Intel Corporation Semiconductor device having self-aligned epitaxial source and drain extensions
US7759199B2 (en) * 2007-09-19 2010-07-20 Asm America, Inc. Stressor for engineered strain on channel
US7902009B2 (en) 2008-12-11 2011-03-08 Intel Corporation Graded high germanium compound films for strained semiconductor devices

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060113542A1 (en) * 2004-11-30 2006-06-01 Massachusetts Institute Of Technology Method for forming low defect density alloy graded layers and structure containing such layers
US20070235802A1 (en) * 2006-04-05 2007-10-11 Chartered Semiconductor Manufacturing Ltd Method to control source/drain stressor profiles for stress engineering

Cited By (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11508813B2 (en) 2010-12-21 2022-11-22 Daedalus Prime Llc Column IV transistors for PMOS integration
US11251281B2 (en) 2010-12-21 2022-02-15 Intel Corporation Contact resistance reduction employing germanium overlayer pre-contact metalization
US11387320B2 (en) 2010-12-21 2022-07-12 Intel Corporation Transistors with high concentration of germanium
CN106684148A (zh) * 2010-12-21 2017-05-17 英特尔公司 具有高浓度硼掺杂锗的晶体管
US11476344B2 (en) 2011-09-30 2022-10-18 Daedalus Prime Llc Contact resistance reduction employing germanium overlayer pre-contact metalization
CN103377897A (zh) * 2012-04-23 2013-10-30 中芯国际集成电路制造(上海)有限公司 一种硅锗源/漏结构的形成方法
CN103377897B (zh) * 2012-04-23 2016-03-02 中芯国际集成电路制造(上海)有限公司 一种硅锗源/漏结构的形成方法
CN103715258B (zh) * 2012-09-28 2016-08-17 台湾积体电路制造股份有限公司 用于半导体器件的源极/漏极堆叠件压力源
CN103715258A (zh) * 2012-09-28 2014-04-09 台湾积体电路制造股份有限公司 用于半导体器件的源极/漏极堆叠件压力源
US10008602B2 (en) 2012-11-09 2018-06-26 Institute of Microelectronics, Chinese Academy of Sciences Semiconductor devices and methods for manufacturing the same
CN103811340A (zh) * 2012-11-09 2014-05-21 中国科学院微电子研究所 半导体器件及其制造方法
WO2014071661A1 (zh) * 2012-11-09 2014-05-15 中国科学院微电子研究所 半导体器件及其制造方法
CN103839810A (zh) * 2012-11-21 2014-06-04 中芯国际集成电路制造(上海)有限公司 鳍式场效应晶体管芯片及其制造方法
CN104299996A (zh) * 2013-07-18 2015-01-21 国际商业机器公司 非对称替代金属栅场效应晶体管及其制造方法
CN104299996B (zh) * 2013-07-18 2017-09-01 国际商业机器公司 非对称替代金属栅场效应晶体管及其制造方法
US9716172B2 (en) 2014-04-21 2017-07-25 Taiwan Semiconductor Manufacturing Company Limited Semiconductor device having multiple active area layers and its formation thereof
CN105280496B (zh) * 2014-06-05 2019-06-11 联华电子股份有限公司 具有鳍状结构的半导体元件及其制作方法
CN105280496A (zh) * 2014-06-05 2016-01-27 联华电子股份有限公司 具有鳍状结构的半导体元件及其制作方法
CN106057672B (zh) * 2015-04-15 2019-04-26 台湾积体电路制造股份有限公司 半导体器件及其制造方法
CN106057672A (zh) * 2015-04-15 2016-10-26 台湾积体电路制造股份有限公司 半导体器件及其制造方法
CN106847755A (zh) * 2015-12-07 2017-06-13 中芯国际集成电路制造(上海)有限公司 改善sram性能的方法
CN110571259A (zh) * 2018-06-05 2019-12-13 中芯国际集成电路制造(上海)有限公司 Finfet器件及其制备方法
CN110571259B (zh) * 2018-06-05 2023-04-07 中芯国际集成电路制造(上海)有限公司 Finfet器件及其制备方法

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WO2010068530A2 (en) 2010-06-17
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EP2356670A4 (en) 2015-06-03
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