CN102044527A - 一种互叠的封装结构及其制造方法 - Google Patents

一种互叠的封装结构及其制造方法 Download PDF

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CN102044527A
CN102044527A CN200910179212XA CN200910179212A CN102044527A CN 102044527 A CN102044527 A CN 102044527A CN 200910179212X A CN200910179212X A CN 200910179212XA CN 200910179212 A CN200910179212 A CN 200910179212A CN 102044527 A CN102044527 A CN 102044527A
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packaging
packaging part
encapsulating structure
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manufacture method
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汪民
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Samsung Semiconductor China R&D Co Ltd
Samsung Electronics Co Ltd
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Samsung Semiconductor China R&D Co Ltd
Samsung Electronics Co Ltd
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Abstract

本发明公开了一种互叠的封装结构及其制造方法。该互叠的封装结构包括多个封装件，每个封装件包括芯片、引线框架、引线和包封料，其中，除顶部封装件之外，其他封装件的侧面上设置有导线层并且上表面上设置有连接凸起，各封装件通过其下方封装件的连接凸起和导线层彼此电连接。根据本发明，可以容易地实现两个或两个以上的封装件的互叠，从而实现封装结构的多功能化，同时确保互叠后的封装结构具有较薄的厚度、优异的电性能、优良的散热性和优异的可靠度等。

Description

一种互叠的封装结构及其制造方法
技术领域
本发明涉及电子元器件封装中的封装结构及制造方法。更具体地讲，本发明涉及一种QFN(方形扁平无引脚)互叠的封装结构及其制造方法。
背景技术
方形扁平无引脚(QFN，Quad Flat Non-lead)封装作为一种常用的封装形式，具有尺寸小、厚度薄、散热性能好等优点，因此，目前在低引脚封装形式中占有极其重要的地位。
图1示出了根据传统技术的QFN封装件的结构示意图。如图1所示，根据传统技术的QFN封装件1包括引线框架10、芯片15、引线16和包封料17。具体地讲，引线框架10包括：外部引脚11，用来实现与诸如PCB基板的外部互连；内部引脚12，用来实现与芯片焊盘之间的内部互连；芯片座13，用来放置芯片15，同时能提供更好的散热作用。在芯片15与芯片座13之间还可以设置有粘附层14，用来使芯片15粘附于芯片座13上。粘附层14通常由环氧树脂等材料制成。引线16用来使芯片焊盘与引线框架互连，一般由金(Au)等具有优良导电性的金属或合金制成。包封料17用来保护整个封装件。
通常，QFN封装件的制造方法包括以下步骤：在引线框架10的芯片座13上涂敷环氧树脂形成粘附层14；接着，使粘附层14固化，在粘附层14上放置芯片15，使芯片15粘附在引线框架10上；然后，通过引线焊接工艺，在芯片15的焊盘18上进行球焊，并在引线框架10的内部引脚12上进行锲焊，从而实现芯片15与引线框架10之间的互连；最后，用包封料17包封整个封装件，并进行切割，最终得到如图1所示的QFN封装件1。
对于QFN封装而言，其封装件的厚度比较小，一般在0.5mm～0.6mm之间。目前封装发展的一个趋势为越来越多的多功能封装结构，包括堆叠的BGA(球栅阵列封装)、MCP(多芯片封装)等。然而，对于QFN封装来说，由于整个封装件的厚度很薄，因此，要实现封装内部的叠置芯片形式的封装比较困难。
由美国专利局于2005年5月19日公开的US2005/0104194A1号美国专利申请公开了一种叠置QFN封装件的方法。图2示出了使用该方法得到的堆叠式QFN封装结构的示意图。如图2所示，堆叠式QFN封装结构2包括第一QFN封装件1a和第二QFN封装件1b。第一QFN封装件1a包括第一引线框架10a、置于引线框架的芯片座上的第一芯片15a、使芯片15a与第一引线框架10a互连的第一引线16a、包封该QFN封装件的第一包封料17a和第一散热片(未标出)。与第一QFN封装件1a的结构相似，第二QFN封装件1b包括第二引线框架10b、第二芯片15b、第二引线16b、第二包封料17b和第二散热片(未标出)。第一QFN封装件1a的第一引线框架10a与第二QFN封装件1b的第二引线框架10b通过第二QFN封装件1b的导电连接柱20b电连接。在该堆叠式QFN封装结构中，散热器附于封装体外部，两个QFN封装件通过引线和散热片而堆叠在一起。
由图2可以看出，在现有技术中，在完成芯片的堆叠之后，需要附着散热器。因此，根据图2的堆叠式QFN封装结构存在一些不足之处，例如引线框架的制备工艺比较复杂，因封装件互叠后存在接触不良而导致电性能不好，接触点可靠性比较薄弱等缺点。
因此，到目前为止，还没有一种有效的堆叠QFN封装件的方法。本发明致力于提供一种制备工艺简单且能够确保优良导电性能的堆叠的QFN封装结构及制造方法。
发明内容
本发明的目的在于提供一种有效的堆叠封装件的方法，从而简化制造工艺，并且能够确保堆叠后的封装结构具有较薄的厚度、优异的导电性能、优良的散热性和优异的可靠度等。
本发明提供了一种互叠的封装结构，所述互叠的封装结构包括多个封装件，每个封装件包括芯片、引线框架、引线和包封料，其中，除顶部封装件之外，其他封装件的侧面上设置有导线层并且上表面上设置有连接凸起，各封装件通过其下方封装件的连接凸起和导线层彼此电连接。
本发明还提供了一种制造上述互叠的封装结构的方法，包括如下步骤：提供封装单元，其中，在所述封装单元的与外部引脚对应的位置预留有孔；通过注入或印刷方法将导电材料填充到所述孔中，以形成导电柱；将所述封装单元划分成多个第一封装件，以将导电柱的一半分别保留在相邻封装件的侧面，从而在多个第一封装件的侧面形成导线层；通过电镀或化学沉积方法，在所述多个第一封装件的上表面的与导线层对应的位置上设置连接凸起；将所述多个第一封装件通过连接凸起与导线层与第二封装件进行互连，同时在堆叠的各封装件之间的间隙中填充缓冲材料，从而得到互叠的封装结构。
根据本发明，所述提供封装单元的步骤包括：在利用塑封模具对所述封装单元进行塑封时，在塑封模具的与引线框架的外部引脚对应的位置设置柱状凸起；去除塑封模具，从而在塑封后的封装单元的与外部引脚对应的位置预留出孔。
根据本发明，多个第一封装件与第二封装件的互连是通过热压焊或回流焊实现的。
在本发明中，导线层由钨或焊料形成，连接凸起由金或焊膏形成，缓冲材料为非导电胶。
在本发明中，互叠的封装结构为互叠的方形扁平无引脚封装件的结构。
根据本发明的互叠的封装结构及其制造方法，可以通过封装件侧面的导线层和上表面的连接凸起容易地实现两个或多个封装件的互叠，从而实现QFN封装的多功能化，同时确保互叠后的封装结构保持较薄的厚度、优异的电性能、优良的散热性、优异的可靠度等。
附图说明
通过下面结合附图进行的描述，本发明的上述和其他目的和特点将会变得更加清楚，其中：
图1示出了根据传统技术的QFN封装件的结构示意图；
图2示出了根据现有技术的堆叠式QFN封装结构的示意图；
图3示出了根据本发明实施例的互叠的QFN封装结构的示意图；
图4A至图4H示出了制造图3示出的互叠的QFN封装结构的方法的示意图。
图5示出了根据本发明另一实施例的互叠的BGA封装结构的示意图。
具体实施方式
现在，将参照附图详细描述本发明的示例性实施例。在附图中，相同的标号始终表示相同的元件。在附图中，为了清晰起见，会夸大层和区域的尺寸和相对尺寸。
应该理解的是，尽管在这里使用术语第一、第二等来描述不同的元件、组件、区域、层和/或部分，但是这些元件、组件、区域、层和/或部分并不受这些术语的限制。这些术语仅是用来将一个元件、组件、区域、层和/或部分与另一个元件、组件、区域、层和/或部分区分开来。因此，在不脱离本发明的教导的情况下，下面讨论的第一元件、组件、区域、层或部分可被命名为第二元件、组件、区域、层或部分。
本发明提供了一种互叠的QFN封装结构及其制造方法。
图3示出了根据本发明一个实施例的互叠的QFN封装结构的示意图。参照图3，互叠的QFN封装结构包括第一QFN封装件(亦可称作底部QFN封装件)100和第二QFN封装件(亦可称作顶部QFN封装件)200。除了第一QFN封装件100的侧面包括导线层111之外，第一QFN封装件100和第二QFN封装件200的具体结构与根据传统技术的单个QFN封装件(见图1)的结构基本相同。
具体地讲，根据本发明的互叠的QFN封装结构的第一QFN封装件100包括：第一引线框架110，包括用来实现与诸如PCB基板的外部组件互连的第一外部引脚、用来实现与芯片焊盘之间的内部互连的第一内部引脚和提供良好散热效果的第一芯片座；第一芯片105，通过附于第一芯片座上的第一粘附层设置在第一芯片座上；第二引线，用来使芯片焊盘与引线框架互连，一般由金(Au)等具有优良导电性的金属或合金制成；第一包封料，用来保护整个封装件。与第一QFN封装件100的结构相似，第二QFN封装件200包括第二引线框架201、第二芯片205、第二引线和第二包封料。
在根据本发明的互叠的QFN封装结构中，第一QFN封装件100的位于引线框架110上的侧面还设置有用于使各封装件互连的导线层111，也就是说，在包封料107的外侧设置有导线层111。导线层111可以由钨(W)、焊料等易于填入的导电金属或导电胶等形成。此外，在第一QFN封装件100的上表面的与导线层111对应的位置处还设置有连接凸起112。连接凸起112可以由金或本领域常用的焊膏等材料形成。因此，第二QFN封装件200的引线框架210可以通过位于第一QFN封装件100的侧面上的导线层111和上表面上的连接凸起112与第二QFN封装件200的引线框架210彼此电连接，从而可以确保互叠后的封装单元之间具有更可靠的互连作用和最小的接触电阻，从而保证了互叠后封装体更好的电性能。
此外，根据本发明，在互相叠置的第一QFN封装件100和第二QFN封装件200之间的间隙中填充有缓冲材料，以形成填充层113。具体地讲，填充层113位于第一QFN封装件100的上表面100c的除设置有连接凸起112之外的部分上，用来提高两个QFN封装件的连接可靠度。
应该理解的是，虽然在图3中仅仅示出了堆叠在一起的两个QFN封装件，但是根据本发明的互叠的QFN封装结构可以包括顺序堆叠的两个以上的QFN封装件。具体地讲，根据本发明的互叠的QFN封装结构可以包括三个或更多的QFN封装件，即，还可以在如图3所示的两个QFN封装件之间设置结构与第一QFN封装件的结构相同的一个以上的QFN封装件。在这种情况下，多个QFN封装件通过设置在下封装件的侧面上的导线层和上表面上的连接凸起逐个与顶部QFN封装件互连。
因此，根据本发明的互叠的QFN封装结构可以比较容易地实现两个或更多个QFN封装件的叠置，从而实现QFN封装件的多功能化，同时确保互叠后的封装较薄的厚度、优异的电性能、优异的可靠度。由于互叠后的封装体保留了外部引脚的外露，同时在封装体侧面提供了导线层，从而确保了互叠封装体优良的散热性能。
下面，将参照图4A至图4H来描述根据本发明一个实施例的制造图3所示的互叠的QFN封装结构的方法的示意图。
首先，准备包括多个封装件的封装单元，例如，准备包括多个第一QFN封装件100的封装单元，如图4A所示。在这里，需要指出的是，将要堆叠的多个QFN封装件的制造方法可以按照传统技术的方法来制备。封装单元中的每个封装件，例如第一封装件100，包括引线框架110、芯片105和引线106。接着，用包封料107包封封装单元，利用塑封模具对封装单元中的各封装件进行塑封，同时在塑封模具的与外部引脚(未示出)对应的位置设置柱状突起120′，如图4B所示。然后，去除塑封模具，从而在塑封后的封装件的与外部引脚110对应的位置预留出孔120，如图4C所示。
接着，参照图4D，在塑封完成后，在孔120内填充导电材料形成导电柱121。在本发明中，可以通过注入、印刷等方法将导电材料填充在孔120内。导电材料包括钨(W)、焊料等易于填入的导电金属或导电胶等。
然后，将封装单元划分成多个单个的封装件，如图4E所示。当对封装单元进行分割以执行划分工艺时，导电柱会被进行划分，并在相邻的封装件侧面保留一半以形成导线层，从而得到侧面具有导线层111的多个封装件，如图4F中所示的第一封装件100。
接下来，参照图4G，在第一QFN封装件100的上表面的与导线层111对应的位置上设置连接凸起112。通过电镀或化学沉积工艺由金或本领域常用的焊膏等材料形成连接凸起112，用于实现上下封装件之间的接触互连。
然后，如图4H所示，通过回流焊、热压焊等方式使第一QFN封装件100和第二QFN封装件200通过侧面的导线层111和连接凸起112实现互连。
最后，在互叠的两个封装件100和200之间的间隙113′中填充缓冲材料，以确保更好的连接可靠度，从而完成QFN封装件的互叠，得到互叠的QFN封装件，如图3所示。可以采用非导电胶、非导电膜等作为缓冲材料(如Hitachi UF-536非导电胶体)。
然而，本领域技术人员可以理解的是，参照上面描述的步骤，可以实现3层或更多的QFN封装件互连。
本实施例的效果在于通过QFN封装体侧面的连接导线以及上表面的接触凸起，可以较容易的实现两层或更多层的QFN封装件互叠，从而实现QFN封装的多功能化，同时确保互叠后的封装结构保持较薄的厚度、优异的电性能、优良的散热性、优异的可靠度等。
应该理解的是，虽然在本发明中描述的是互叠的QFN封装件，但是本发明的构思可以应用于其它封装件的互叠，例如球栅阵列(BGA)封装件、倒装芯片(FC)封装件等封装件。
图5示出了根据本发明另一实施例的互叠的BGA封装结构的示意图。参照图5，互叠的BGA封装结构包括第一BGA封装件(亦可称作底部BGA封装件)300和第二BGA封装件(亦可称作顶部BGA封装件)400。该实施例中的两个BGA封装件的互叠结构与前面所描述的QFN封装件的互叠结构(参照图3)相似。具体地讲，除了第一BGA封装件300的侧面包括导线层311之外，第一BGA封装件300和第二BGA封装件400的具体结构与根据传统技术的单个BGA封装件的结构基本相同。
具体地讲，根据本发明的互叠的BGA封装结构的第一BGA封装件300包括：基底310；第一引线框架，包括外部引脚301和内部引脚(未示出)，外部引脚301通过连接焊盘302与基底310电连接，用来实现与诸如PCB基板的外部组件的互连，内部引脚用来实现与芯片焊盘之间的互连；第一芯片305，通过附于基底310上的第一粘附层(未标出)置于基底上；引线306，使芯片305与连接焊盘(未示出)相连；第一包封料307，用来保护整个封装件。与第一BGA封装件300的结构相似，第二BGA封装件400包括基底410、第二引线框架、第二芯片405、引线和第二包封料。
在根据本发明的互叠的BGA封装结构中，第一BGA封装件300的位于包括引线框架的基底310上的侧面还设置有用于使各封装件互连的导线层311，也就是说，在第一包封料307的外侧设置有导线层311。导线层311可以由钨(W)、焊料等易于填入的导电金属或导电胶等形成。此外，在第一BGA封装件300的上表面的与导线层311对应的位置处还设置有连接凸起312。连接凸起312可以由金或本领域常用的焊膏等材料形成。因此，第二BGA封装件400的引线框架(未示出)可以通过位于第一BGA封装件300的侧面上的导线层311和上表面上的连接凸起312与第二BGA封装件400的引线框架410彼此电连接，从而可以确保互叠后的封装单元之间具有更可靠的互连作用和最小的接触电阻，从而保证了互叠后封装体更好的电性能。
此外，根据本发明的当前实施例，在互相叠置的第一BGA封装件300和第二BGA封装件400之间的间隙中填充有缓冲材料，以形成填充层313。具体地讲，填充层313位于第一BGA封装件的上表面的除设置有连接凸起312之外的部分上，用来提高两个BGA封装件的连接可靠度。
应该理解的是，虽然在图5中仅仅示出了堆叠在一起的两个BGA封装件，但是根据本发明的互叠的BGA封装结构可以包括顺序堆叠的两个以上的BGA封装件。具体地讲，根据本发明的互叠的BGA封装结构可以包括三个或更多的BGA封装件，即，还可以在如图5所示的两个BGA封装件之间设置结构与第一BGA封装件的结构相同的一个以上的BGA封装件。在这种情况下，多个BGA封装件通过设置在下封装件的侧面上的导线层和上表面上的连接凸起逐个与顶部BGA封装件互连。
本实施例的互叠的BGA封装结构的制造方法与上文描述的互叠的BGA封装结构的制造方法相似，因此，在此不再进行赘述。
因此，本发明的效果在于通过单个封装体(如、QFN封装件、BGA封装件等)侧面的连接导线以及上表面的接触凸起，可以较容易的实现两层或更多层的封装件互叠，从而实现各封装结构互叠的多功能化，同时确保互叠后的封装结构保持较薄的厚度、优异的电性能、优良的散热性、优异的可靠度等。
然而，本发明不限于上述实施例，在不脱离本发明范围的情况下，可以对本发明进行各种变形和修改。

Claims (16)

1.一种互叠的封装结构，所述互叠的封装结构包括多个封装件，其中，每个封装件包括芯片、引线框架、引线和包封料，其特征在于：除顶部封装件之外，其他封装件的侧面上设置有导线层并且上表面上设置有连接凸起，各封装件通过其下方封装件的连接凸起和导线层彼此电连接。
2.如权利要求1所述的互叠的封装结构，其特征在于所述连接凸起与所述导线层的位置相对应。
3.如权利要求1所述的互叠的封装结构，其特征在于所述导线层由钨或焊料形成。
4.如权利要求1所述的互叠的封装结构，其特征在于所述连接凸起由金或焊膏形成。
5.如权利要求1所述的互叠的封装结构，其特征在于所述多个封装件中的相邻封装件的间隙之间填充有缓冲材料。
6.如权利要求5所述的互叠的封装结构，其特征在于所述缓冲材料为非导电胶。
7.如权利要求1所述的互叠的封装结构，其特征在于所述多个封装件中的每个为方形扁平无引脚封装件或球栅阵列封装件。
8.一种互叠的封装结构的制造方法，包括如下步骤：
提供封装单元，其中，在所述封装单元的与外部引脚对应的位置预留有孔；
将导电材料填充到所述孔中，以形成导电柱；
将所述封装单元划分成多个第一封装件，以将导电柱的一半分别保留在相邻封装件的侧面，从而在多个第一封装件的侧面形成导线层；
在所述多个第一封装件的上表面的与导线层对应的位置上设置连接凸起；
将所述多个第一封装件通过连接凸起与导线层与第二封装件进行互连，同时在堆叠的各封装件之间的间隙中填充缓冲材料，从而得到互叠的封装结构。
9.如权利要求8所述的制造方法，其特征在于所述提供封装单元的步骤包括：
在利用塑封模具对所述封装单元进行塑封时，在塑封模具的与引线框架的外部引脚对应的位置设置柱状突起；
去除塑封模具，从而在塑封后的封装单元的与外部引脚对应的位置预留出孔。
10.如权利要求8所述的制造方法，其特征在于所述将导电材料填充到所述孔中的步骤是通过注入或印刷方法实现的。
11.如权利要求8所述的制造方法，其特征在于所述设置连接凸起的步骤是通过电镀或化学沉积方法实现的。
12.如权利要求8所述的制造方法，其特征在于所述导电材料为钨或焊料。
13.如权利要求8所述的制造方法，其特征在于所述连接凸起由金或焊膏形成。
14.如权利要求8所述的制造方法，其特征在于多个第一封装件与第二封装件的互连是通过热压焊或回流焊实现的。
15.如权利要求8所述的制造方法，其特征在于所述缓冲材料为非导电胶。
16.如权利要求8所述的制造方法，其特征在于所述多个第一封装件均为方形扁平无引脚封装件或球栅阵列封装件。
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Cited By (6)

* Cited by examiner, † Cited by third party
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CN102263078A (zh) * 2011-06-13 2011-11-30 西安天胜电子有限公司 一种wlcsp封装件
CN103367278A (zh) * 2012-03-26 2013-10-23 武汉飞恩微电子有限公司 带固定装置双面水冷的半导体器件三维堆叠封装结构
CN103426869A (zh) * 2013-07-30 2013-12-04 三星半导体(中国)研究开发有限公司 层叠封装件及其制造方法
CN104952857A (zh) * 2015-06-30 2015-09-30 南通富士通微电子股份有限公司 一种无载体的半导体叠层封装结构
CN105140205A (zh) * 2015-06-30 2015-12-09 南通富士通微电子股份有限公司 一种双面散热的半导体叠层封装结构
CN113140469A (zh) * 2020-01-19 2021-07-20 江苏长电科技股份有限公司 封装结构及其成型方法

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102263078A (zh) * 2011-06-13 2011-11-30 西安天胜电子有限公司 一种wlcsp封装件
CN103367278A (zh) * 2012-03-26 2013-10-23 武汉飞恩微电子有限公司 带固定装置双面水冷的半导体器件三维堆叠封装结构
CN103367278B (zh) * 2012-03-26 2016-12-14 南京皓赛米电力科技有限公司 带固定装置双面水冷的半导体器件三维堆叠封装结构
CN103426869A (zh) * 2013-07-30 2013-12-04 三星半导体(中国)研究开发有限公司 层叠封装件及其制造方法
CN103426869B (zh) * 2013-07-30 2016-03-30 三星半导体(中国)研究开发有限公司 层叠封装件及其制造方法
CN104952857A (zh) * 2015-06-30 2015-09-30 南通富士通微电子股份有限公司 一种无载体的半导体叠层封装结构
CN105140205A (zh) * 2015-06-30 2015-12-09 南通富士通微电子股份有限公司 一种双面散热的半导体叠层封装结构
CN104952857B (zh) * 2015-06-30 2017-12-26 通富微电子股份有限公司 一种无载体的半导体叠层封装结构
CN113140469A (zh) * 2020-01-19 2021-07-20 江苏长电科技股份有限公司 封装结构及其成型方法

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