CN101937880B - 薄晶片处理结构及薄晶片接合及剥离的方法 - Google Patents

薄晶片处理结构及薄晶片接合及剥离的方法 Download PDF

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CN101937880B
CN101937880B CN 201010218125 CN201010218125A CN101937880B CN 101937880 B CN101937880 B CN 101937880B CN 201010218125 CN201010218125 CN 201010218125 CN 201010218125 A CN201010218125 A CN 201010218125A CN 101937880 B CN101937880 B CN 101937880B
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余振华
许国经
陈承先
萧景文
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Abstract

本发明提供一种薄晶片处理结构及薄晶片接合及剥离的方法，该薄晶片处理结构包含一半导体晶片；一剥离层，其可由施予能量予以剥离；一粘着层，其可由一溶剂予以移除，其中此剥离层由涂布或压合方式施加在载材上，此粘着层以涂布或压合方式施加在此半导体晶片上；以及此剥离层及此粘着层位于此半导体晶片及此载材之间并将其相互接合。此方法包含施加一剥离层至一载材上；施加一粘着层至一半导体晶片上；接合此载材及此半导体晶片；对此剥离层施予UV或激光的能量以剥离此剥离层；以及以溶剂清洁此半导体晶片表面以移除所有的粘着层残余物。本发明的晶片在剥离后的清洁表面，及在后结合工艺中具有良好的化学抵抗性。

Description

薄晶片处理结构及薄晶片接合及剥离的方法
技术领域
本发明涉及晶片处理，尤其涉及一种薄晶片处理结构及便于接合及剥离的方法。
背景技术
在半导体晶片处理工艺中，薄晶片背侧工艺需要暂时接合及剥离技术。晶片借由粘着层接合在刚硬的载材(carrier)上。经过研磨及/或其他后接合工艺(post-bonding processes)后，自此刚硬的载材上将晶片剥离。
传统剥离方法之一为在一光热转换层(light-to heat conversion layer)上使用激光以剥离载材，并接着剥除(peel off)粘着层。粘着材料为紫外光(UV)固化材料，例如不能由化学物剥除(stripped)，但可以物理方式剥落(peel off)的热固性聚合物。此方法于晶片剥离后会留有化学残余物。因此，此激光剥离层在背侧工艺时的化学抵抗性极低。
另一种传统方法为使用化学剥离(chemical release)。此方法是以化学方式溶解粘着层以剥离载材。此方法需要多孔的玻璃且容易导致交叉污染(crosscontamination)。此方法的处理速度，例如每小时晶片产出率(wafers per hour，WPH)，相较于其他方法也较缓慢。
另一种传统方法为热滑动(thermal sliding)。此方法以热处理晶片及载材，接着使其滑动分开。此方法需要较高的剥离温度，且对内连线配置(interconnection scheme)造成不利的影响。
因此，业界需要的是新颖的结构及方法，来稳固晶片接合以确保剥离后的表面清洁，且在后工艺中有良好的化学抵抗性。
发明内容
为解决上述问题，本发明提供一种薄晶片处理结构，包括：一半导体晶片；一剥离层(release layer)，其可由施加能量予以剥离；一粘着层，其可由一溶剂予以移除；以及一载材；其中该剥离层以涂布或压合方式至少其一施加至该载材，该粘着层以涂布或压合方式至少其一施加至该半导体晶片，该半导体晶片及该载材相互接合，且该剥离层及该粘着层位于该半导体晶片及该载材之间。
本发明也提供一种方法，包括：以涂布或压合至少其一施加一剥离层于一载材上；以涂布或压合至少其一施加一粘着层至一半导体晶片上；接合该载材及该半导体晶片，且该剥离层及该粘着层位于该载材及该半导体晶片之间；施予能量至该剥离层，以剥离该载材；以及以一溶剂清洁该半导体晶片的一表面，以移除该粘着层的所有残余物。
本发明所揭示的优点包含晶片在剥离后的清洁表面，及在后结合工艺中具有良好的化学抵抗性。
为让本发明的上述和其他目的、特征、和优点能更明显易懂，下文特举出优选实施例，并配合所附附图，作详细说明如下：
附图说明
图1显示为依照本发明一实施例的薄晶片处理结构，用以便于接合及剥离。
图2为显示依照发明一实施例的便于薄晶片接合及剥离的方法。
其中，附图标记说明如下：
102～晶片104～粘着层
106～剥离层108～载材
具体实施方式
以下将详细讨论本发明各种实施例的制造及使用方法。然而值得注意的是，本发明所提供的许多可行的发明概念可实施在各种特定范围中。这些特定实施例仅用于举例说明本发明的制造及使用方法，但非用于限定本发明的范围。
本发明提供一种薄晶片处理结构及方法，以便于晶片工艺中的接合及剥离。在本发明所揭示的各种图示及实施例中，相似的标记用于表示相似的元件。
图1显示为依照本发明一实施例的薄晶片处理结构，用以便于接合及剥离。晶片102借由使用在其与载材108之间的两膜层(也即剥离层106及粘着层104)接合在载材108上。以涂布或压合工艺施加剥离层106至载材108上，接着以晶片边缘残余物移除法(edge bead removal，EBR)去除该剥离层相对于载材的外缘的0.1mm至3mm。
晶片边缘残余物移除法(EBR)去除于晶片边缘处堆积材料。在无任何其他处理下，过量的材料可堆积在晶片边缘处，且达膜层名义上厚度(nominalthickness)的数倍厚。这种情况会造成设备污染的风险。于化学晶片边缘残余物移除(chemical EBR)中，涂布后立即旋转晶片，溶剂会分散至晶片边缘。
以涂布或压合工艺施加粘着层104至晶片102上，且此粘着层104可由溶剂移除。例如在一优选实施例中，可使用热塑性聚合物(thermal plasticpolymer)作为粘着层。载材108及晶片102为借由UV光或热能相互接合。
图2为显示依照发明一实施例的便于薄晶片接合及剥离的方法。于步骤202，以涂布或压合方式施加剥离层106至载材108上。在一实施例中，可使用旋转涂布。于步骤204，以涂布或压合方式施加粘着层104至晶片102上。于步骤206，晶片102及载材108相互接合，且剥离层106及粘着层104位于其间，并以热能或UV光固化。粘着剂可在接合之前先作预烘烤。于步骤208，晶片进行后接合工艺，例如研磨、晶片背侧工艺等。晶片背侧工艺可包含离子注入、退火、蚀刻、溅镀、蒸镀及/或金属化。
在进行后晶片工艺之后，对晶片进行剥离工艺，其包含剥离载材及后清洁(post cleaning)。于步骤210，施予能量(例如UV光或激光光)于剥离层106上以剥离载材108。在载材108剥离之前，薄晶片102可挂载于切割框上，以压合切割胶带(dicing tape lamination)。接着，以浸泡在溶剂中的化学品清洁晶片102表面，以移除粘着层104的所有残余物。例如，使用热塑性聚合物的粘着层可被溶剂以化学方式清洁。本领域普通技术人员可知本发明还具有许多其他变化实施例。
本发明所揭示的优点包含晶片在剥离后的清洁表面，及在后结合工艺中具有良好的化学抵抗性。
虽然本发明已以数个优选实施例揭示如上，然其并非用以限定本发明，任何本领域普通技术人员，在不脱离本发明的精神和范围内，当可作任意的更动与润饰。此外，本发明的范围不限定于现有或未来所发展的特定程序、机器、制造、物质的组合、功能、方法或步骤，其实质上进行与依照本发明所述的实施例相同的功能或达成相同的结果。因此，本发明的保护范围当视所附的权利要求所界定的范围为准。此外，每个权利要求建构成一独立的实施例，且各种权利要求及实施例的组合均介于本发明的范围内。

Claims (4)

1.一种薄晶片接合及剥离的方法，包括：
以涂布或压合至少其一施加一剥离层于一载材上；
以涂布或压合至少其一施加一粘着层至一半导体晶片上；
接合该载材及该半导体晶片，且该剥离层及该粘着层位于该载材及该半导体晶片之间；
施予能量至该剥离层，以剥离该载材；以及
以一溶剂清洁该半导体晶片的一表面，以移除该粘着层的所有残余物，
其中该剥离层在以涂布或压合至少其一施加该剥离层至该载材上之后，对该剥离层进行晶片边缘残除物移除。
2.如权利要求1所述的薄晶片接合及剥离的方法，其中该剥离层由施予UV光或激光而剥离。
3.如权利要求1所述的薄晶片接合及剥离的方法，其中粘着层为可由溶剂作化学清洁的热塑性聚合物。
4.如权利要求1所述的薄晶片接合及剥离的方法，该晶片边缘残除物移除工艺移除该剥离层相对于该载材的外缘的0.1mm至3mm。
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Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8178419B2 (en) 2008-02-05 2012-05-15 Twin Creeks Technologies, Inc. Method to texture a lamina surface within a photovoltaic cell
US9305769B2 (en) 2009-06-30 2016-04-05 Taiwan Semiconductor Manufacturing Company, Ltd. Thin wafer handling method
US8871609B2 (en) 2009-06-30 2014-10-28 Taiwan Semiconductor Manufacturing Company, Ltd. Thin wafer handling structure and method
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JP2013008915A (ja) * 2011-06-27 2013-01-10 Toshiba Corp 基板加工方法及び基板加工装置
WO2013058222A1 (ja) * 2011-10-18 2013-04-25 富士電機株式会社 固相接合ウエハの支持基板の剥離方法および半導体装置の製造方法
US9390949B2 (en) 2011-11-29 2016-07-12 Taiwan Semiconductor Manufacturing Company, Ltd. Wafer debonding and cleaning apparatus and method of use
US11264262B2 (en) 2011-11-29 2022-03-01 Taiwan Semiconductor Manufacturing Company, Ltd. Wafer debonding and cleaning apparatus
US10381254B2 (en) 2011-11-29 2019-08-13 Taiwan Semiconductor Manufacturing Co., Ltd. Wafer debonding and cleaning apparatus and method
US8841161B2 (en) 2012-02-05 2014-09-23 GTAT.Corporation Method for forming flexible solar cells
US8916954B2 (en) 2012-02-05 2014-12-23 Gtat Corporation Multi-layer metal support
JP5591859B2 (ja) * 2012-03-23 2014-09-17 株式会社東芝 基板の分離方法及び分離装置
US9105516B2 (en) * 2012-07-03 2015-08-11 Ebara Corporation Polishing apparatus and polishing method
JP6006569B2 (ja) * 2012-07-23 2016-10-12 東京応化工業株式会社 積層体及び積層体の製造方法
US8785294B2 (en) 2012-07-26 2014-07-22 Gtat Corporation Silicon carbide lamina
WO2014028349A1 (en) * 2012-08-15 2014-02-20 Gtat Corporation Bonding of thin lamina
CN104584214B (zh) * 2012-09-05 2018-08-03 亮锐控股有限公司 载体晶片从器件晶片的激光去键合
US9586291B2 (en) 2012-11-28 2017-03-07 Globalfoundries Inc Adhesives for bonding handler wafers to device wafers and enabling mid-wavelength infrared laser ablation release
US20140144593A1 (en) 2012-11-28 2014-05-29 International Business Machiness Corporation Wafer debonding using long-wavelength infrared radiation ablation
JP6088230B2 (ja) * 2012-12-05 2017-03-01 東京応化工業株式会社 積層体の形成方法
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KR102077248B1 (ko) 2013-01-25 2020-02-13 삼성전자주식회사 기판 가공 방법
JP6214182B2 (ja) * 2013-03-25 2017-10-18 東京応化工業株式会社 基板の処理方法
EP3007212B1 (en) * 2013-05-29 2022-04-13 Mitsui Chemicals Tohcello, Inc. Semiconductor wafer protection film and production method for semiconductor device
TWI610374B (zh) * 2013-08-01 2018-01-01 格芯公司 用於將搬運器晶圓接合至元件晶圓以及能以中段波長紅外光雷射燒蝕釋出之接著劑
GB2519088B (en) * 2013-10-08 2015-09-16 M Solv Ltd Laser scanning system for laser release
KR102259959B1 (ko) 2013-12-05 2021-06-04 삼성전자주식회사 캐리어 및 이를 이용하는 반도체 장치의 제조 방법
US9761474B2 (en) * 2013-12-19 2017-09-12 Micron Technology, Inc. Methods for processing semiconductor devices
TW201530610A (zh) * 2014-01-27 2015-08-01 Dow Corning 暫時性接合晶圓系統及其製造方法
US9355881B2 (en) 2014-02-18 2016-05-31 Infineon Technologies Ag Semiconductor device including a dielectric material
US9475272B2 (en) 2014-10-09 2016-10-25 Taiwan Semiconductor Manufacturing Company, Ltd. De-bonding and cleaning process and system
JP6437805B2 (ja) * 2014-12-03 2018-12-12 東京応化工業株式会社 積層体の製造方法、封止基板積層体の製造方法及び積層体
US9324566B1 (en) 2014-12-31 2016-04-26 International Business Machines Corporation Controlled spalling using a reactive material stack
US9835940B2 (en) 2015-09-18 2017-12-05 Taiwan Semiconductor Manufacturing Company, Ltd. Method to fabricate mask-pellicle system
TWI610392B (zh) * 2016-09-05 2018-01-01 Daxin Mat Corp 光電元件的製備方法
CN108231646A (zh) * 2016-12-13 2018-06-29 中芯国际集成电路制造(上海)有限公司 一种半导体器件的制造方法
KR102499039B1 (ko) * 2018-11-08 2023-02-13 삼성전자주식회사 캐리어 기판 및 상기 캐리어 기판을 이용한 반도체 패키지의 제조방법

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1638030A (zh) * 2003-10-28 2005-07-13 株式会社半导体能源研究所 半导体器件的制造方法

Family Cites Families (47)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05211239A (ja) * 1991-09-12 1993-08-20 Texas Instr Inc <Ti> 集積回路相互接続構造とそれを形成する方法
DE4314907C1 (de) * 1993-05-05 1994-08-25 Siemens Ag Verfahren zur Herstellung von vertikal miteinander elektrisch leitend kontaktierten Halbleiterbauelementen
US5391917A (en) * 1993-05-10 1995-02-21 International Business Machines Corporation Multiprocessor module packaging
EP2270845A3 (en) * 1996-10-29 2013-04-03 Invensas Corporation Integrated circuits and methods for their fabrication
US6882030B2 (en) * 1996-10-29 2005-04-19 Tru-Si Technologies, Inc. Integrated circuit structures with a conductor formed in a through hole in a semiconductor substrate and protruding from a surface of the substrate
US6037822A (en) * 1997-09-30 2000-03-14 Intel Corporation Method and apparatus for distributing a clock on the silicon backside of an integrated circuit
US5998292A (en) * 1997-11-12 1999-12-07 International Business Machines Corporation Method for making three dimensional circuit integration
JP3809733B2 (ja) * 1998-02-25 2006-08-16 セイコーエプソン株式会社 薄膜トランジスタの剥離方法
JP3532788B2 (ja) * 1999-04-13 2004-05-31 唯知 須賀 半導体装置及びその製造方法
JP2001035817A (ja) 1999-07-22 2001-02-09 Toshiba Corp ウェーハの分割方法及び半導体装置の製造方法
US6206441B1 (en) * 1999-08-03 2001-03-27 Taiwan Semiconductor Manufacturing Company, Ltd. Apparatus and method for transferring wafers by robot
US6214733B1 (en) * 1999-11-17 2001-04-10 Elo Technologies, Inc. Process for lift off and handling of thin film materials
US6322903B1 (en) * 1999-12-06 2001-11-27 Tru-Si Technologies, Inc. Package of integrated circuits and vertical integration
US6444576B1 (en) * 2000-06-16 2002-09-03 Chartered Semiconductor Manufacturing, Ltd. Three dimensional IC package module
US6543988B2 (en) * 2001-07-18 2003-04-08 Taiwan Semiconductor Manufacturing Co., Ltd Apparatus for clamping and transporting a semiconductor wafer
US6599778B2 (en) * 2001-12-19 2003-07-29 International Business Machines Corporation Chip and wafer integration process using vertical connections
EP1472730A4 (en) * 2002-01-16 2010-04-14 Mann Alfred E Found Scient Res HOUSING FOR ELECTRONIC CIRCUITS WITH REDUCED SIZE
US6762076B2 (en) * 2002-02-20 2004-07-13 Intel Corporation Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices
TW544739B (en) 2002-04-18 2003-08-01 Siliconware Precision Industries Co Ltd Method of thinning wafer
JP4565804B2 (ja) 2002-06-03 2010-10-20 スリーエム イノベイティブ プロパティズ カンパニー 被研削基材を含む積層体、その製造方法並びに積層体を用いた極薄基材の製造方法及びそのための装置
US6800930B2 (en) * 2002-07-31 2004-10-05 Micron Technology, Inc. Semiconductor dice having back side redistribution layer accessed using through-silicon vias, and assemblies
WO2004040648A1 (ja) * 2002-10-30 2004-05-13 Semiconductor Energy Laboratory Co., Ltd. 半導体装置および半導体装置の作製方法
US7030481B2 (en) * 2002-12-09 2006-04-18 Internation Business Machines Corporation High density chip carrier with integrated passive devices
US6841883B1 (en) * 2003-03-31 2005-01-11 Micron Technology, Inc. Multi-dice chip scale semiconductor components and wafer level methods of fabrication
US6924551B2 (en) * 2003-05-28 2005-08-02 Intel Corporation Through silicon via, folded flex microelectronic package
US7111149B2 (en) * 2003-07-07 2006-09-19 Intel Corporation Method and apparatus for generating a device ID for stacked devices
TWI251313B (en) * 2003-09-26 2006-03-11 Seiko Epson Corp Intermediate chip module, semiconductor device, circuit board, and electronic device
US7335972B2 (en) * 2003-11-13 2008-02-26 Sandia Corporation Heterogeneously integrated microsystem-on-a-chip
US7084045B2 (en) * 2003-12-12 2006-08-01 Seminconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
US7060601B2 (en) * 2003-12-17 2006-06-13 Tru-Si Technologies, Inc. Packaging substrates for integrated circuits and soldering methods
US7049170B2 (en) * 2003-12-17 2006-05-23 Tru-Si Technologies, Inc. Integrated circuits and packaging substrates with cavities, and attachment methods including insertion of protruding contact pads into cavities
JP4467318B2 (ja) * 2004-01-28 2010-05-26 Ｎｅｃエレクトロニクス株式会社 半導体装置、マルチチップ半導体装置用チップのアライメント方法およびマルチチップ半導体装置用チップの製造方法
US7262495B2 (en) * 2004-10-07 2007-08-28 Hewlett-Packard Development Company, L.P. 3D interconnect with protruding contacts
US7297574B2 (en) * 2005-06-17 2007-11-20 Infineon Technologies Ag Multi-chip device and method for producing a multi-chip device
US7462551B2 (en) * 2005-09-30 2008-12-09 Intel Corporation Adhesive system for supporting thin silicon wafer
US7348216B2 (en) * 2005-10-04 2008-03-25 International Business Machines Corporation Rework process for removing residual UV adhesive from C4 wafer surfaces
JP2008004900A (ja) 2006-06-26 2008-01-10 Sumco Corp 貼り合わせウェーハの製造方法
TW200842174A (en) 2006-12-27 2008-11-01 Cheil Ind Inc Composition for pressure sensitive adhesive film, pressure sensitive adhesive film, and dicing die bonding film including the same
US20080182363A1 (en) * 2007-01-31 2008-07-31 Freescale Semiconductor, Inc. Method for forming a microelectronic assembly including encapsulating a die using a sacrificial layer
KR101273871B1 (ko) 2007-04-19 2013-06-11 세키스이가가쿠 고교가부시키가이샤 다이싱ㆍ다이본딩 테이프 및 반도체칩의 제조 방법
US8258624B2 (en) * 2007-08-10 2012-09-04 Intel Mobile Communications GmbH Method for fabricating a semiconductor and semiconductor package
US7824846B2 (en) * 2007-09-19 2010-11-02 International Business Machines Corporation Tapered edge bead removal process for immersion lithography
US9111981B2 (en) * 2008-01-24 2015-08-18 Brewer Science Inc. Method for reversibly mounting a device wafer to a carrier substrate
US7566632B1 (en) * 2008-02-06 2009-07-28 International Business Machines Corporation Lock and key structure for three-dimensional chip connection and process thereof
US8137995B2 (en) * 2008-12-11 2012-03-20 Stats Chippac, Ltd. Double-sided semiconductor device and method of forming top-side and bottom-side interconnect structures
KR20120027237A (ko) * 2009-04-16 2012-03-21 수스 마이크로텍 리소그라피 게엠바하 웨이퍼 가접합 및 분리를 위한 개선된 장치
US8871609B2 (en) 2009-06-30 2014-10-28 Taiwan Semiconductor Manufacturing Company, Ltd. Thin wafer handling structure and method

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1638030A (zh) * 2003-10-28 2005-07-13 株式会社半导体能源研究所 半导体器件的制造方法

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