CN101821833A - 带粘接膜半导体芯片的制造方法及用于该制造方法的半导体用粘接膜、以及半导体装置的制造方法 - Google Patents

带粘接膜半导体芯片的制造方法及用于该制造方法的半导体用粘接膜、以及半导体装置的制造方法 Download PDF

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Publication number
CN101821833A
CN101821833A CN200880110812A CN200880110812A CN101821833A CN 101821833 A CN101821833 A CN 101821833A CN 200880110812 A CN200880110812 A CN 200880110812A CN 200880110812 A CN200880110812 A CN 200880110812A CN 101821833 A CN101821833 A CN 101821833A
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semiconductor
adhesive film
film
chip
semiconductor chip
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CN101821833B (zh
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畠山惠一
中村祐树
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Lishennoco Co ltd
Resonac Holdings Corp
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Hitachi Chemical Co Ltd
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Abstract

本发明提供一种带粘接膜半导体芯片的制造方法，其具备以下工序：准备层叠体的工序，其将半导体晶片、半导体用粘接膜及切割带以所述顺序层叠，其中，半导体用粘接膜具有1～15μm范围的厚度、具有小于5％的拉伸断裂伸长率、且该拉伸断裂伸长率小于最大负荷时的伸长率的110％，所述半导体晶片具有由激光照射而形成的用于将所述半导体晶片分割为多个半导体芯片的改性部；将切割带沿多个半导体芯片相互分离的方向拉伸，从而不分割所述半导体用粘接膜地将所述半导体晶片分割为所述多个半导体芯片的工序；以及将多个半导体芯片分别沿层叠体的层叠方向拾起，从而分割半导体用粘接膜，得到带粘接膜半导体芯片的工序。

Description

带粘接膜半导体芯片的制造方法及用于该制造方法的半导体用粘接膜、以及半导体装置的制造方法
技术领域
本发明涉及带粘接膜半导体芯片的制造方法及用于该制造方法的半导体用粘接膜、以及半导体装置的制造方法。
背景技术
目前，半导体芯片与半导体芯片搭载用支撑部件的接合主要使用银糊剂。然而，伴随着半导体芯片的小型化、高性能化以及所使用的支撑部件的小型化、精密化，在使用银糊剂的方法中，凸显出由于糊剂的溢出或半导体芯片的偏斜而引起的焊线时产生不便、粘接剂层的膜厚难以控制及粘接剂层产生空隙等问题。另外，在小型化、高密度化要求高的便携设备等领域，正在开发、批量生产内部层叠有多个半导体芯片的半导体装置，但制造这样的半导体装置时，尤其容易凸显出上述问题。因此，近年来已开始使用膜状的粘接剂(以下称为半导体用粘接膜)代替银糊剂。
作为使用半导体用粘接膜制造半导体装置的方法，有：(1)单片粘贴方式，在带配线基材等半导体芯片搭载用支撑部件或半导体芯片上粘贴裁成任意的尺寸的半导体用粘接膜，在其上热压接半导体芯片；及(2)晶片背面粘贴方式，在半导体晶片的背面上粘贴半导体用粘接膜厚后，用旋转刀将其单片化，得到带粘接膜的半导体芯片，将带粘接膜的半导体芯片热压接在半导体芯片搭载用支撑部件或半导体芯片上。近年来，为了谋求半导体装置制造工序的简化，上述(2)的晶片背面粘贴方式成为主流。
如上所述，在晶片背面粘贴方式中，一般是用旋转刀将粘贴有半导体用粘接膜的半导体晶片切断。但是，当利用使用旋转刀的一般的切割方法同时切断半导体晶片和粘接膜时，存在在切断后的半导体芯片侧面产生裂纹(芯片裂纹)或在切断面上粘接膜起毛而产生许多毛刺这样的问题。如果存在这种芯片裂纹或毛刺，则在拾起半导体芯片时，半导体芯片容易破裂。尤其是难以无破裂地从薄型化的半导体晶片中拾起单片化的半导体芯片。
因此，近年来，作为切割半导体晶片的方法，提出了通过对半导体晶片照射激光而在半导体晶片内部选择性地形成改性部，并沿改性部切断半导体晶片的称为隐形切割(Stealth Dicing)的方法(例如，参照专利文献1、2)。在该方法中，例如，将形成有改性部的半导体晶片粘贴在切割带上，通过拉伸切割带对半导体晶片施加应力，从而沿着改性部将半导体晶片分割为多个半导体芯片。
专利文献1：日本特开2002-192370号公报
专利文献2：日本特开2003-338467号公报
然而，仅用芯片接合机(Die Bonder)装置的扩展结构难以将半导体用粘接膜完全分割，要分割半导体用粘接膜还需要另外的扩展装置。因此，即使是隐形切割方式，为了兼顾半导体装置的制造中的组装性和可靠性，在粘接膜的分割性方面也需要进一步的改善。
发明内容
本发明是鉴于上述情况而完成的，其目的在于提供带粘接膜半导体芯片的制造方法及优选用于该带粘接膜半导体芯片的制造方法的半导体用粘接膜、以及可兼顾组装性和可靠性的半导体装置的制造方法，其中，所述带粘接膜半导体芯片的制造方法在由半导体晶片高成品率地得到半导体芯片的同时，可以得到粘贴有毛刺非常少、与半导体芯片大致为同一形状的粘接膜的带粘接膜半导体芯片。
为解决上述课题，本发明的带粘接膜半导体芯片的制造方法具备以下工序：准备层叠体的工序，其将半导体晶片、半导体用粘接膜及切割带以所述顺序层叠，其中，半导体用粘接膜具有1～15μm范围的厚度、具有小于5％的拉伸断裂伸长率、且该拉伸断裂伸长率小于最大负荷时的伸长率的110％，半导体晶片具有由激光照射而形成的用于将所述半导体晶片分割为多个半导体芯片的改性部；将切割带沿多个半导体芯片相互分离的方向拉伸，从而不分割所述半导体用粘接膜地将所述半导体晶片分割为所述多个半导体芯片的工序；以及将多个半导体芯片分别沿层叠体的层叠方向拾起，从而分割半导体用粘接膜，得到带粘接膜半导体芯片的工序。
根据本发明的带粘接膜半导体芯片的制造方法，通过将隐形切割方式和上述特定的半导体用粘接膜进行组合，利用由拾起导体芯片而得到的剪切力对半导体用粘接膜实施分割，由此，在由半导体晶片高成品率地得到半导体芯片的同时，可以得到粘贴有毛刺非常少、与半导体芯片大致为同一形状的粘接膜的带粘接膜半导体芯片。
当半导体用粘接膜的厚度为小于为1μm时，就难以制作粘接膜，当超过15μm时，就难以利用半导体芯片的拾起分割半导体用粘接膜。另外，当半导体用粘接膜的拉伸断裂伸长率为5％以上时，需要将切割带的拉伸量增大至通常以上，当拉伸断裂伸长率相对于最大负荷时的伸长率的比例为110％以上时，由于难以在抑制毛刺产生的同时将半导体用粘接膜完全分割，因此难以得到与半导体芯片的形状相吻合的粘接膜。
另外，本发明的半导体装置的制造方法具备将利用本发明的带粘接膜半导体芯片的制造方法所得到的带粘接膜半导体芯片粘接于其它的半导体芯片或半导体搭载用支撑部件上的工序。
根据本发明的制造方法，通过使用利用本发明的带粘接膜半导体芯片的制造方法所得到的带粘接膜半导体芯片，可以兼顾组装性和可靠性。
本发明还提供一种本发明的带粘接膜半导体芯片的制造方法中使用的半导体用粘接膜，其具有1～15μm范围的厚度，具有小于5％的拉伸断裂伸长率，且该拉伸断裂伸长率小于最大负荷时的伸长率的110％。
根据本发明，可以提供带粘接膜半导体芯片的制造方法及优选用于该带粘接膜半导体芯片的制造方法的半导体用粘接膜、以及可兼顾组装性和可靠性的半导体装置的制造方法，其中，所述带粘接膜半导体芯片的制造方法在可由半导体晶片高成品率地得到半导体芯片的同时，可以得到粘贴有毛刺非常少、与半导体芯片大致为同一形状的粘接膜的带粘接膜半导体芯片。
附图说明
图1是用于说明实施方式的带粘接膜半导体芯片的制造方法的剖面示意图。
图2是用于说明实施方式的带粘接膜半导体芯片的制造方法的剖面示意图。
图3是用于说明实施方式的带粘接膜半导体芯片的制造方法的剖面示意图。
图4是用于说明实施方式的带粘接膜半导体芯片的制造方法的剖面示意图。
图5是表示半导体装置的一实施方式的剖面图。
具体实施方式
下面，对本发明的优选的实施方式进行详细说明。
图1、2、3、及4是用于说明本发明的带粘接膜半导体芯片的制造方法的优选的一实施方式的剖面示意图。本实施方式的带粘接膜半导体芯片的制造方法具备以下工序：准备层叠体20的工序(图2)，其将半导体晶片1、本发明的半导体用粘接膜5及切割带6以所述顺序层叠；通过将分割带6沿多个半导体芯片8相互分离的方向拉伸，不分割半导体用粘接膜5地将半导体晶片1分割为多个半导体芯片8的工序(图3)；以及通过将多个半导体芯片8分别沿层叠体的层叠方向拾起，由此分割半导体用粘接膜5，从而得到带粘接膜半导体芯片30的工序(图4)。经过这些工序所得的带粘接膜半导体芯片30具有毛刺非常少、与半导体芯片8大致为同一形状的粘接膜5a。
图2所示的半导体晶片1具有通过激光的照射而形成的用于将半导体晶片分割为多个半导体芯片的改性部3。对于该改性部3而言，例如可以通过对半导体晶片1与背面研磨带2的层叠体从半导体晶片1的电路面的相反侧照射激光4从而选择性地形成(图1)。该利用激光的照射的加工可利用在作为所谓隐形切割而已知的方法中通常采用的条件来实施。
作为半导体晶片1，除了单晶硅以外，可使用由多晶硅、各种陶瓷、砷化镓等化合物半导体等构成的晶片。作为背面研磨带2，使用聚对苯二甲酸乙二醇酯系带等。
层叠体20可通过以下方法进行准备：在形成有改性部3的半导体晶片1的背面(与背面研磨带2侧相反的面)依次粘贴半导体用粘接膜5及切割带6的方法；或将层叠有半导体用粘接膜5及切割带6的复合片按照半导体用粘接膜5位于半导体晶片1侧的朝向粘贴在半导体晶片1的背面的方法。得到层叠体20的工序并不限于本实施方式这样的顺序。例如，也可以在将半导体用粘接膜粘贴在半导体晶片上后，利用激光加工形成改性部。
切割带6只要是对固定用环具有可固定的程度的粘合性、且可沿着改性部3拉伸而分割半导体晶片的切割带，就可以没有限定地使用。例如可以将氯乙烯系带作为切割带使用。作为商业上可得到的切割带，可举出“AF-80H”、“T-80MW”(以上为日本电气化学工业社制，商品名)等。
图2中表示了在半导体晶片1上层叠有背面研磨带2的状态，但背面研磨带2在下一个工序之前被剥离。另外，图2所示的层叠体20的切割带6上具备作为固定用环的晶片环7。
在将半导体晶片1分割为多个半导体芯片8的工序中，剥离背面研磨带后，通过将扩展环9从切割带6的下侧推到上方(图3的箭头A的方向)，切割带6沿多个半导体芯片8相互分离的方向(图3的箭头B的方向)被拉伸。于是，半导体晶片1以改性部3为起点被分割为多个半导体芯片8。根据该方法，由于不必利用切割刀来切断半导体晶片1，因此，可以提高半导体晶片的单片化的速度。切割带6的扩展可以用芯片接合装置实施。
半导体用粘接膜5在上述扩展工序中不被分割，而在下一个拾起工序中被分割。因而，切割带6的扩展量只要是可以分割半导体晶片1的范围的扩展量即可。在初始的分割带6的最大宽度为200～300mm范围的情况下，对扩展量而言，以拉伸后的切割带6的宽度(最大宽度)与初始的切割带6的宽度(最大宽度)之差计，优选为1～20mm、更优选为2～15mm、进一步优选为3～10mm。
本实施方式的切割带6的扩展量可以比目前的通过扩展切断半导体用粘接膜的扩展量少。因此没有必要另外准备现有的隐形切割方式中使用的扩展装置。
另外，本实施方式中，拉伸切割带6的速度(扩展速度)优选为1～50mm/秒、更优选为2～30mm/秒、进一步优选为3～20mm/秒。当扩展速度小于1mm/秒时，有难以完全分割半导体晶片1的趋势。
在拾起多个半导体芯片的工序中，用吸附罩11真空吸附经扩展的切割带的下侧，用顶出针(Ejector pin)10顶出具有将要拾起的半导体芯片的部位，通过拾起夹12将半导体芯片8沿层叠体的层叠方向(图4的箭头符号C的方向)。此时，对半导体用粘接膜5沿其厚度方向施加剪切力，以半导体芯片8的形状将其分割。由此，可得到粘贴有毛刺非常少、与半导体芯片大致为同一形状的粘接膜5a的带粘接膜半导体芯片30。
作为上述工序中使用的拾起方式，优选瑞萨东日本半导体公司的多芯顶出方式、三段顶出方式等作为薄层芯片用而开发的方式。
在使用多芯顶出方式或通常的针顶出方式的情况下，作为针的配置，优选在芯片四角附近及其之间等间隔地配置针。特别是在多芯顶出方式的情况下，由于过多配置针时会减弱来自切割带下侧的吸附效果，因此，若为10mm×10mm左右的尺寸，则优选配置9根左右。
另外，拾起半导体芯片的拾起夹12优选制成与芯片尺寸大致相同的尺寸。作为顶出针时的条件，顶出高度优选最大值为2000μm以下、更优选为700μm以下、进一步优选为600μm以下、特别优选为500μm以下。当顶出高度超过2000μm时，芯片可能破裂，因此不优选。
顶出针的速度优选20～200mm/s、更优选30～150mm/s、进一步优选50～100mm/s。当速度小于20mm/s时，顶出时有难以分割芯片接合膜的趋势，当超过200mm/s时，因冲击导致半导体芯片破损的可能性升高，因此不优选。
在本实施方式中，也可以将顶出分为2个以上的阶段进行。例如，可以在顶出高度250～1000μm、顶出速度50～100mm/s的条件下进行第1阶段；在顶出高度1000～2000μm、顶出速度1～30mm/s的条件下进行第2阶段的针的顶出。
在本实施方式中，通过应用本发明的特定的半导体用粘接膜，在上述拾起工序中可从半导体用粘接膜分割出毛刺非常少、与半导体芯片大致为同一形状的粘接膜5a。
下面，对本发明的半导体用粘接膜进行说明。
本发明的半导体用粘接膜具有1～15μm范围的厚度，具有小于5％的拉伸断裂伸长率，且该拉伸断裂伸长率小于最大负荷时的伸长率的110％。这样的半导体用粘接膜含有热固性树脂及/或热塑性树脂而构成。
当半导体用粘接膜的厚度小于1μm时，粘接膜的制作变难，当超过15μm时，难以通过半导体芯片的拾起分割半导体用粘接膜。另外，当半导体用粘接膜的拉伸断裂伸长率为5％以上时，需要将切割带的拉伸量增大至通常以上。另外，拉伸断裂伸长率相对于最大负荷时的伸长率的比例为110％以上的情况表示屈服状态长或容易引起缩颈(necking)，这种情况下，由于难以在抑制毛刺产生的同时将半导体用粘接膜完全分割，因此，难以得到与半导体芯片的形状相吻合的粘接膜。
从与上述相同的观点考虑，拉伸断裂伸长率优选小于4％、更优选小于3.5％。同样，拉伸断裂伸长率相对于最大负荷时的伸长率的比率优选小于108％、更优选小于105％。需要说明的是，拉伸断裂伸长率与最大负荷时的伸长率一致时，该比率为最低值的100％。
最大应力、最大负荷伸长率及拉伸断裂伸长率使用由B阶段状态的半导体用粘接膜裁成的具有宽度5mm、长度50mm及厚度25μm的尺寸的长条状试验片，在25℃的环境下、在以下的条件下进行拉伸试验而求出。
拉伸试验机：SIMADZU制100N autograph“AGS-100NH”
夹盘间距离(试验开始时)：30mm
拉伸速度：5mm/分钟
从由拉伸试验所得到的应力-变形曲线读取最大负荷、最大负荷时的夹盘间长度及断裂时的夹盘间的长度，使用这些值和试样断面积的实测值，利用下述式计算出最大应力、最大负荷伸长率及拉伸断裂伸长率。
最大应力(Pa)＝最大负荷(N)/试样的断面积(m2)
最大负荷时的伸长率(％)＝{(最大负荷时的夹盘间长度(mm)-30)/30}×100
拉伸断裂伸长率(％)＝{(断裂时的夹盘间长度(mm)-30)/30}×100
通常，对多个试验片进行测定，将其平均值记录为该半导体用粘接膜的拉伸特性。从重现性的观点考虑，拉伸试验优选在上述条件下进行，但也可以变更为实质上给予相同的试验结果的其它条件。
另外，从与被粘物的密合性及膜的分割性的观点考虑，半导体用粘接膜的厚度优选3～15μm、更优选5～15μm。
半导体用粘接膜5优选含有高分子量成分、热固性成分及填充剂。通过由这些成分来构成半导体用粘接膜5并调节各成分的种类及配合量，可得到具有上述特定的拉伸特性的半导体用粘接膜5。作为高分子量成分，优选热塑性树脂。
构成半导体用粘接膜的高分子量成分优选具有60℃以下的玻璃化温度(Tg)。另外，优选具有300℃以上的耐热性的高分子量成分。作为优选的高分子量成分的具体例，可举出聚酰亚胺树脂、聚酰胺酰亚胺树脂、苯氧基树脂、丙烯酸树脂、聚酰胺树脂及聚氨酯树脂。这些高分子量成分可以使用1种或组合多种使用。其中，特别优选聚酰亚胺树脂。通过使用聚酰胺树脂，可以在将填充剂含量维持在一定程度的少量的同时，容易地赋予半导体用粘接膜5如上所述的拉伸特性。
热固性成分是能够通过加热交联而形成固化体的成分，例如，可由热固性树脂及其固化剂构成。作为热固性树脂，可以使用目前公知的树脂，没有特别限定，其中，从作为半导体周边材料的便利性(容易得到高纯度制品、品种多、容易控制反应性)方面考虑，优选环氧树脂及1个分子中至少具有2个热固性酰亚胺基的酰亚胺化合物。环氧树脂通常与环氧树脂固化剂并用。
环氧树脂优选为具有2个以上环氧基的化合物。从固化性或固化物特性方面考虑，优选酚的缩水甘油醚型的环氧树脂。作为酚的缩水甘油醚型的环氧树脂，可举出例如：双酚A、双酚AD、双酚S、双酚F或卤化双酚A与表氯醇的缩合物、苯酚酚醛清漆树脂的缩水甘油醚、甲酚酚醛清漆树脂的缩水甘油醚、及双酚A酚醛清漆树脂的缩水甘油醚。其中，尤其是从固化物的交联密度高、可以使膜的热时的粘接强度升高方面考虑，优选酚醛清漆型环氧树脂(甲酚酚醛清漆树脂的缩水甘油醚及苯酚酚醛清漆树脂的缩水甘油醚等)。这些树脂可以单独使用或组合二种以上使用。
作为环氧树脂固化剂，可举出例如：酚系化合物、脂肪族胺、脂环族胺、芳香族多胺、聚酰胺、脂肪族酸酐、脂环族酸酐、芳香族酸酐、双氰胺、有机酸二酰肼、三氟化硼胺络合物、咪唑类及叔胺。其中，尤其优选酚系化合物，酚系化合物中，特别优选具有2个以上酚性羟基的酚系化合物。更具体而言，优选萘酚酚醛清漆树脂及三苯酚酚醛清漆树脂。当使用这些酚系化合物作为环氧树脂固化剂时，可以有效地减少用于封装组装的加热时的芯片表面及装置的污染及成为臭味的原因的脱气(out gas)的发生。
通过调节填充剂的含量，可以控制半导体用粘接膜的拉伸特性。当填充剂的含量增多时，有拉伸断裂伸长率变小的趋势及拉伸断裂伸长率相对于最大负荷时的伸长率的比率减小的趋势。另外，通过使用适量填充剂，还可得到改善操作性、改善导热性、调节熔融粘度、赋予触变性等效果。
从上述目的的观点考虑，填充剂优选为无机填充剂。更具体而言，优选含有选自氢氧化铝、氢氧化镁、碳酸钙、碳酸镁、硅酸钙、硅酸镁、氧化钙、氧化镁、氧化铝、氮化铝、硼酸铝晶须、氮化硼、结晶二氧化硅、非结晶二氧化硅及锑氧化物中的至少1种无机材料的无机填充剂。这些无机物中，为了提高导热性，尤其优选氧化铝、氮化铝、氮化硼、结晶二氧化硅及非结晶二氧化硅。为了调节熔融粘度及赋予触变性，优选氢氧化铝、氢氧化镁、碳酸钙、碳酸镁、硅酸钙、硅酸镁、氧化钙、氧化镁、氧化铝、结晶二氧化硅及非结晶二氧化硅。另外，为了改善耐湿性，优选氧化铝、二氧化硅、氢氧化铝及锑氧化物。也可以将多种填充剂混合使用。
当填充剂的含量变多时，在拉伸断裂伸长率变小的同时弹性模量变高而有断裂强度上升的趋势，另一方面，因粘接性下降而有耐软熔裂纹(reflow crack)性下降的趋势。特别是在有机基板之类的表面形成有凹凸的被粘物和半导体芯片之间软熔时有容易促进破坏的趋势。另外，当填充剂变多时，还有在HAST试验等高温高湿环境下的对可靠性试验的耐受性下降的趋势。进而，当填充剂的含量变多时，可将半导体用粘接膜粘贴到半导体晶片上的温度也存在上升的趋势。鉴于如上所述的情况，填充剂的含量相对于半导体用粘接膜的全部质量优选为小于30质量％、更优选为小于25质量％、进一步优选为小于20质量％。
半导体用粘接膜5优选在100℃以下的温度可粘贴在作为被粘物的半导体晶片上。在此，在半导体晶片上粘贴保持在规定温度的半导体用粘接膜时，只要半导体用粘接膜和半导体晶片的界面的剥离强度为20N/m以上，就可判断为能够粘贴在半导体晶片上。半导体用粘接膜例如可使用设定在100℃以下的温度的热辊压膜机(Hot Roll Laminator)粘贴在半导体晶片上。剥离强度的测定在25℃的环境中、拉伸角度90°、拉伸速度50mm/分钟下进行。例如，通过减少填充剂的含量、或使用具有低Tg的热塑性树脂，可得到在100℃以下可粘贴在半导体晶片上的半导体用粘接膜。半导体用粘接膜5可粘贴在半导体晶片上的温度更优选为95℃以下、进一步优选为90℃以下。在考虑背面研磨带的耐热性的情况下，半导体用粘接膜5优选在80℃以下的温度能够粘贴在作为被粘物的半导体晶片上。
半导体用粘接膜5优选具有在将半导体芯片搭载在半导体芯片搭载用支撑部件上时所要求的耐热性及耐湿性。因此，优选其通过耐软熔裂纹性试验。可以以粘接强度为指标来评价半导体用粘接膜的耐软熔裂纹性。为了得到良好的耐软熔裂纹性，在半导体晶片上以4×2mm见方的粘接面积粘接半导体用粘接膜时，优选在剥离强度初始为1.0kg/cm以上、85℃/85％的环境下放置48小时后为0.5kg/cm以上。初始的剥离强度更优选为1.3kg/cm以上、进一步优选为1.5kg/cm。在85℃/85％的环境下放置48小时后的剥离强度更优选为0.7kg/cm以上、进一步优选为0.8kg/cm以上。
半导体用粘接膜5例如可以用将含有热塑性树脂等高分子量成分、热固性成分、填充剂及溶解或分散这些物质的有机溶剂的涂敷液涂敷在基材膜上并通过加热从基材膜上的涂敷液中除去有机溶剂的方法来得到。
有机溶剂只要是能够将材料均匀地溶解或分散的溶剂就没有限定，可举出例如：二甲基甲酰胺、二甲基乙酰胺、N-甲基吡咯烷酮、二甲基亚砜、二甘醇二甲醚、甲苯、苯、二甲苯、甲基乙基酮、四氢呋喃、乙基溶纤剂、乙基溶纤剂醋酸酯、丁基溶纤剂、二噁烷、环己酮及醋酸乙酯。这些溶剂可以单独或组合二种以上使用。
基材膜只要是可以耐受用于除去有机溶剂而进行的加热的材料就没有特别限定。作为基材膜的例子，可举出：聚酯膜、聚丙烯膜、聚对苯二甲酸乙二醇酯膜、聚酰亚胺膜、聚醚酰亚胺膜、聚醚萘酸酯及甲基戊烯膜。也可以将组合有2种以上这些膜的多层膜用作基材膜。基材膜的表面也可以用硅酮系、二氧化硅系等脱模剂等进行处理。除去有机溶剂后，也可以不除去基材膜，而直接用作半导体用粘接膜的支撑体。
半导体用粘接膜还可以以与切割带粘贴在一起的复合片的状态保管及使用。通过使用这样的复合片，可以简化半导体装置制造工序。
本发明的带粘接膜半导体芯片的制造方法中使用的半导体用粘接膜也可以是以具有下述构成的芯片接合膜的形式供给的膜。
(a)依次具备基材和含有热固性树脂及/或热塑性树脂的粘接剂层的芯片接合膜。
(b)依次具备基材、粘合剂层和含有热固性树脂及/或热塑性树脂的粘接剂层的芯片接合膜。
(c)依次具备基材和含有热固性树脂及/或热塑性树脂的粘合/粘接剂层的芯片接合膜。
(a)及(b)的芯片接合膜中的粘接剂层以及(c)的芯片接合膜中的粘合·粘接剂层是上述的本发明的半导体用粘接膜。
在使用(a)的芯片接合膜的情况下，可以利用以下的任一方法得到本发明的层叠体。
(1)首先，将上述(a)的芯片接合膜的粘接剂层和半导体晶片贴合在一起。其次，将芯片接合膜的基材剥离。其次，将依次具备粘合剂层和基材的切割带部件的粘合剂层与粘接剂层贴合在一起。
(2)首先，将上述(a)的芯片接合膜的粘接剂层与依次具备粘合剂层和基材层的切割带部件的粘合剂层贴合在一起。其次，将芯片接合膜的基材剥离，将粘接剂层和半导体晶片贴合在一起。
在使用(b)的芯片接合膜的情况下，可以利用以下的方法得到本发明的层叠体。
(3)将上述(b)的芯片接合膜的粘接剂层和半导体晶片贴合在一起。在基材及粘合剂层作为切割带发挥作用时，由此可以得到层叠体。需要说明的是，也可以在将基材剥离后将切割带贴合在粘合剂层上而得到层叠体。
在使用(c)的芯片接合膜的情况下，可以利用以下的方法得到本发明的层叠体。
(4)首先，将上述(c)的芯片接合膜的粘合/粘接剂层和半导体晶片贴合在一起。在基材作为切割带发挥作用时，可以由此得到层叠体。需要说明的是，也可以在将基材剥离后将切割带贴合在粘合剂层上而得到层叠体。
如使用上述(c)的芯片接合膜的例子所示，本发明还可以提供带粘接膜半导体芯片的制造方法，该制造方法具备以下工序：准备层叠体的工序，将半导体晶片、膜状粘合/粘接剂及基材以所述顺序层叠，上述膜状粘合/粘接剂具有1～15μm范围的厚度、具有小于5％的拉伸断裂伸长率、且该拉伸断裂伸长率小于最大负荷时的伸长率的110％，上述半导体晶片具有由激光照射而形成的用于将半导体晶片分割为多个半导体芯片的改性部；将上述基材沿多个半导体芯片相互分离的方向拉伸，从而不分割上述膜状粘合/粘接剂地将半导体晶片分割为多个半导体芯片的工序；以及，将多个半导体芯片分别沿层叠体的层叠方向拾起，从而分割上述膜状粘合/粘接剂，得到带粘接膜半导体芯片的工序。上述基材可以使用作为切割带发挥作用的基材。
在本实施方式中，说明了将本发明的半导体用粘接膜配置在半导体晶片背面侧的情况，但本发明的带粘接膜半导体芯片的制造方法也可以在将半导体晶片的电路面和半导体用粘接膜粘贴在一起的方式中使用。
如上所述的利用本实施方式的方法得到的带粘接膜半导体芯片30构成例如IC、LSI之类的半导体元件。带粘接膜半导体芯片30例如可借助粘接膜5a粘接在其它的半导体芯片或半导体芯片搭载用支撑部件上。
作为半导体芯片搭载用支撑部件，可举出例如：42合金引线框架及铜引线框架等引线框架；由环氧树脂、聚酰亚胺系树脂及马来酰亚胺系树脂等形成的树脂膜；在玻璃非织造布或玻璃织造布中浸渍环氧树脂、聚酰亚胺系树脂及马来酰亚胺系树脂等热固性树脂并使其固化所得的基板；以及玻璃基板及氧化铝等陶瓷基板。
图5是表示由该方法得到的半导体装置的一实施方式的剖面图。图5所示的半导体装置100具备带配线基材(支撑部件)13和借助粘接膜5a粘接在带配线基材13上的半导体芯片8。半导体芯片8通过接合线14与带配线基材13的配线连接。另外，半导体芯片8利用埋设这些部件的密封树脂层15进行密封。
对于半导体芯片和支撑部件的粘接及半导体芯片之间的粘接，例如可以在将半导体用粘接膜夹持在半导体芯片和支撑部件之间或半导体芯片彼此之间的状态下以60～300℃加热0.1～300秒来进行。
半导体用粘接膜5含有热固性树脂时，优选加热粘接后的半导体芯片来促进半导体用粘接膜在被粘物上的密合或固化，从而增加接合部的强度。此时的加热根据粘接膜的组成适当调节即可，通常为60～220℃、0.1～600分钟。进行树脂密封时，也可以利用密封树脂的固化工序的加热。
实施例
下面，利用实施例详细地说明本发明。但是，本发明并不限定于这些实施例。
<半导体用粘接膜的制作>
(实施例1)
在具备温度计、搅拌器及氯化钙管的500ml四口烧瓶中放入作为二胺化合物的1，3-双(3-氨基丙基)四甲基二硅氧烷(0.06mol)、4，9-二氧杂癸烷-1，12-二胺(4，9-dioxadecane-1，12-diamine)(0.04mol)及作为溶剂的N-甲基-2-吡咯烷酮150g，在60℃下进行搅拌、溶解。
二胺化合物溶解后，分多次少量地添加1，10-(十亚甲基)双(偏苯三酸二酐)(0.02mol)和4，4’-氧双邻苯二甲酸酐(0.08mol)，在60℃下使之反应3小时。其后，一边吹入N2气一边以170℃进行加热，通过共沸，用3小时将体系内的水与部分溶剂一同除去。由此，得到聚酰亚胺树脂的溶液。
在上述得到的聚酰亚胺树脂的NMP溶液(含聚酰亚胺树脂100质量份)中加入甲酚酚醛清漆型环氧树脂(东都化成制)4质量份、4，4’-[1-[4-[1-(4-羟基苯基)-1-甲基乙基]苯基]亚乙基]双酚(本州化学制)2质量份、四苯基鏻四苯基硼酸酯(东京化成制)0.5质量份。进而，加入相对于全部固体成分的重量为12质量％的氮化硼填充剂(水岛合金铁制)、相对于全部固体成分的重量为3质量％的AEROSIL填充剂R972(日本AEROSIL制)，充分混炼，得到清漆。
将调制成的清漆涂敷在剥离处理完毕的聚对苯二甲酸乙二醇酯膜(帝人杜邦公司制、膜A31、厚度50μm)上，以80℃加热30分钟，接着以120℃加热30分钟，形成厚度5μm的半导体用粘接膜。
(实施例2)
将与实施例1同样操作得到的清漆涂敷在剥离处理完毕的聚对苯二甲酸乙二醇酯膜(帝人杜邦公司制、膜A31、厚度50μm)上，以80℃加热30分钟，接着以120℃加热30分钟，形成厚度15μm的半导体用粘接膜。
(比较例1)
将与实施例1同样操作得到的清漆涂敷在剥离处理完毕的聚对苯二甲酸乙二醇酯膜(帝人杜邦公司制、膜A31、厚度50μm)上，以80℃加热30分钟，接着以120℃加热30分钟，形成厚度25μm的半导体用粘接膜。
(比较例2)
准备DF-402(日立化成工业社株式会社制、商品名、厚度15μm)作为比较例2的半导体用粘接膜。
<粘接膜的评价>
(最大应力、最大负荷伸长率及拉伸断裂伸长率)
使用由B阶段状态的粘接膜裁成的长条状试验片(宽度5mm、长度50mm)进行拉伸试验。由所得的应力-变形曲线基于下述算式求出最大应力、最大负荷伸长率及拉伸断裂伸长率。拉伸试验使用拉伸试验机(SIMADZU制100Nautograph、AGS-100NH)，在25℃的环境中，在试验开始的夹盘间距离30mm、拉伸速度5mm/min的条件下进行。
最大应力(Pa)＝最大负荷(N)/试样的断面积(m2)
最大负荷伸长率(％)＝[(最大负荷下的夹盘间长度(mm)-30)/30]×100
拉伸断裂伸长率(％)＝[(断裂时的夹盘间长度(mm)-30)/30]×100
<带粘接膜半导体芯片的制作>
准备通过激光照射而在内部形成有改性部的50μm厚的半导体晶片(材质：单晶硅)和背面研磨带的层叠品。需要说明的是，改性部按照能够将半导体晶片分割为10mm×10mm的大小的方式形成。
另一方面，将实施例及比较例制得的半导体用粘接膜分别裁剪为直径210mm的圆形，将所得的各半导体用粘接膜使用晶片贴片机(WaferMounter)“DM-300H”(JCM公司制、商品名)，在室温、线压5kgf、10mm/s的条件下粘贴在切割带(电气化学工业社制、商品名“AD-80H”、厚度80μm)上，制作半导体用粘接膜和切割带的层叠品。需要说明的是，在该层叠品的切割带上也粘贴晶片环。
在上述准备的形成有改性部的半导体晶片的背面，使用晶片贴片机“DM-300H”(JCM公司制、商品名)在热板温度80℃、线压5kgf、3mm/s的条件下，粘贴上述半导体用粘接膜和切割带的层叠品，得到层叠体样品。需要说明的是，在粘贴前剥离背面研磨带。
接着，将上述得到的层叠体样品设置在Flexible die bonder“DB-730”(瑞萨东日本半导体公司制、商品名)上，利用扩展装置拉伸切割带。扩展速度为10mm/s，扩展量为4mm。接着，对进行扩展了的层叠体样品，利用以4.2mm间隔将9根顶出针(Micromechanics公司制、SEN-83-05：针直径0.7mm、尖端直径350μm半圆形)配置成格子状的Flexible die bonder“DB-730”(瑞萨东日本半导体公司制)的多芯顶出夹具，一边顶出针，一边使用作为拾起夹的橡胶吸嘴(rubber tip)(Micromechanics公司制、商品名：13-087E-33、10mm×10mm)拾起半导体芯片。此时，针的顶出设定为2个阶段动作，第1阶段在高度300μm、速度89.4mm/s的条件下顶出，其后，第2阶段在高度1500μm、速度8.94mm/s的条件下顶出，顶出后在保持时间(拾起时间)500ms的条件下顶出针，同时拾起半导体芯片。将此时的拾起性根据下述标准进行评价。
[拾起性]
A：半导体用粘接膜被切断，能够拾起带粘接膜半导体芯片。
B：半导体用粘接膜未被完全切断，不能拾起半导体芯片，产生芯片破裂。
[表1]
如表1所示，可确认利用具有1～15μm范围的厚度、具有小于5％的拉伸断裂伸长率、且该拉伸断裂伸长率小于最大负荷时的伸长率的110％的实施例1及2的半导体用粘接膜，可通过上述拾起工序分割半导体用粘接膜，得到带粘接膜半导体芯片。另外，可确认分割得到的粘接膜的毛刺非常少、且具有与半导体芯片大致相同的形状。相对于此，使用比较例1及2的半导体用粘接膜时，不能通过上述扩展工序及拾起工序分割半导体用粘接膜。
由以上的结果可知，利用使用本发明的半导体用粘接膜的带粘接膜半导体芯片的制造方法，可以得到粘贴有毛刺非常少、与半导体芯片大致为同一形状的粘接膜的带粘接膜半导体芯片，可以兼顾利用隐形切割方式的半导体装置的制造中的组装性和可靠性。
产业上的可利用性
根据本发明，可以提供在由半导体晶片高成品率地得到半导体芯片的同时，可以得到粘贴有毛刺非常少、与半导体芯片大致为同一形状的粘接膜的带粘接膜半导体芯片的带粘接膜半导体芯片的制造方法及优选用于该带粘接膜半导体芯片的制造方法的半导体用粘接膜，以及可兼顾组装性和可靠性的半导体装置的制造方法。

Claims (3)

1.一种带粘接膜半导体芯片的制造方法，其具备以下工序：
准备层叠体的工序，其将半导体晶片、半导体用粘接膜及切割带依此顺序层叠，其中，所述半导体用粘接膜具有1～15μm范围的厚度、具有小于5％的拉伸断裂伸长率、且该拉伸断裂伸长率小于最大负荷时的伸长率的110％，所述半导体晶片具有由激光照射而形成的用于将所述半导体晶片分割为多个半导体芯片的改性部；
将所述切割带沿所述多个半导体芯片相互分离的方向拉伸，从而不分割所述半导体用粘接膜地将所述半导体晶片分割为所述多个半导体芯片的工序；以及
将所述多个半导体芯片分别沿所述层叠体的层叠方向拾起，从而分割所述半导体用粘接膜，得到带粘接膜半导体芯片的工序。
2.一种半导体装置的制造方法，其具备将根据权利要求1所述的制造方法所得到的带粘接膜半导体芯片粘接于其它的半导体芯片或半导体芯片搭载用支撑部件的工序。
3.一种用于权利要求1所述的制造方法的半导体用粘接膜，其具有1～15μm范围的厚度，具有小于5％的拉伸断裂伸长率，且该拉伸断裂伸长率小于最大负荷时的伸长率的110％。
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CN102822946A (zh) * 2010-03-31 2012-12-12 古河电气工业株式会社 半导体装置的制造方法
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