CN101764092A - 半导体结构及其形成和操作方法 - Google Patents
半导体结构及其形成和操作方法 Download PDFInfo
- Publication number
- CN101764092A CN101764092A CN200910221772A CN200910221772A CN101764092A CN 101764092 A CN101764092 A CN 101764092A CN 200910221772 A CN200910221772 A CN 200910221772A CN 200910221772 A CN200910221772 A CN 200910221772A CN 101764092 A CN101764092 A CN 101764092A
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- layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
- H01L21/743—Making of internal connections, substrate contacts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Element Separation (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
Claims (25)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/342,527 US7999320B2 (en) | 2008-12-23 | 2008-12-23 | SOI radio frequency switch with enhanced signal fidelity and electrical isolation |
US12/342,527 | 2008-12-23 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101764092A true CN101764092A (zh) | 2010-06-30 |
CN101764092B CN101764092B (zh) | 2013-04-17 |
Family
ID=42265118
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2009102217727A Active CN101764092B (zh) | 2008-12-23 | 2009-11-16 | 半导体结构及其形成和操作方法 |
Country Status (5)
Country | Link |
---|---|
US (2) | US7999320B2 (zh) |
JP (1) | JP5567308B2 (zh) |
KR (1) | KR101159405B1 (zh) |
CN (1) | CN101764092B (zh) |
TW (1) | TWI462222B (zh) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102427021A (zh) * | 2011-09-28 | 2012-04-25 | 上海宏力半导体制造有限公司 | 半导体器件中的射频信号的传输结构及其形成方法 |
CN102508969A (zh) * | 2011-11-09 | 2012-06-20 | 中国科学院微电子研究所 | 基于区域几何同构和电学同构加速哑金属填充的方法 |
CN105336681A (zh) * | 2014-07-28 | 2016-02-17 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件的制作方法及半导体器件 |
Families Citing this family (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8513119B2 (en) | 2008-12-10 | 2013-08-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming bump structure having tapered sidewalls for stacked dies |
US20100171197A1 (en) | 2009-01-05 | 2010-07-08 | Hung-Pin Chang | Isolation Structure for Stacked Dies |
US8791549B2 (en) | 2009-09-22 | 2014-07-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wafer backside interconnect structure connected to TSVs |
US8466059B2 (en) | 2010-03-30 | 2013-06-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multi-layer interconnect structure for stacked dies |
JP5666180B2 (ja) | 2010-07-06 | 2015-02-12 | 矢崎総業株式会社 | レバー式コネクタ |
US9105749B2 (en) * | 2011-05-13 | 2015-08-11 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
US8900994B2 (en) | 2011-06-09 | 2014-12-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for producing a protective structure |
US8956938B2 (en) | 2012-05-16 | 2015-02-17 | International Business Machines Corporation | Epitaxial semiconductor resistor with semiconductor structures on same substrate |
CN102709296B (zh) * | 2012-06-11 | 2014-12-03 | 中国电子科技集团公司第五十八研究所 | 通过负电荷泵在背栅接负电压的soi/mos器件结构及制造方法 |
KR101959715B1 (ko) * | 2012-11-06 | 2019-03-20 | 삼성전자 주식회사 | 반도체 장치 |
US8729679B1 (en) * | 2012-12-04 | 2014-05-20 | Nxp, B.V. | Shielding silicon from external RF interference |
US8941211B2 (en) | 2013-03-01 | 2015-01-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuit using deep trench through silicon (DTS) |
US9048285B2 (en) * | 2013-07-01 | 2015-06-02 | United Microelectronics Corp. | Semiconductor structure and method of forming a harmonic-effect-suppression structure |
US20150255362A1 (en) * | 2014-03-07 | 2015-09-10 | Infineon Technologies Ag | Semiconductor Device with a Passivation Layer and Method for Producing Thereof |
US9654094B2 (en) | 2014-03-12 | 2017-05-16 | Kabushiki Kaisha Toshiba | Semiconductor switch circuit and semiconductor substrate |
JP2016046395A (ja) * | 2014-08-22 | 2016-04-04 | 株式会社東芝 | 半導体スイッチ |
US9196583B1 (en) | 2014-05-09 | 2015-11-24 | Qualcomm Incorporated | Via material selection and processing |
US9515645B2 (en) * | 2014-06-03 | 2016-12-06 | Infineon Technologies Ag | System and method for a radio frequency switch |
WO2016161029A1 (en) * | 2015-03-31 | 2016-10-06 | Skyworks Solutions, Inc. | Substrate bias for field-effect transistor devices |
WO2016183146A1 (en) * | 2015-05-12 | 2016-11-17 | Skyworks Solutions, Inc. | Silicon-on-insulator devices having contact layer |
KR101692625B1 (ko) | 2015-06-18 | 2017-01-03 | 주식회사 동부하이텍 | 고비저항 기판 상에 형성된 반도체 소자 및 무선 주파수 모듈 |
KR101710268B1 (ko) | 2015-06-18 | 2017-02-24 | 주식회사 동부하이텍 | 고비저항 기판 상에 형성된 수동 소자 및 무선 주파수 모듈 |
KR101666752B1 (ko) | 2015-06-18 | 2016-10-14 | 주식회사 동부하이텍 | 고비저항 기판 상에 형성된 반도체 소자 및 무선 주파수 모듈 |
KR101666753B1 (ko) | 2015-06-18 | 2016-10-14 | 주식회사 동부하이텍 | 고비저항 기판 상에 형성된 반도체 소자 및 무선 주파수 모듈 |
US9761546B2 (en) | 2015-10-19 | 2017-09-12 | Taiwan Semiconductor Manufacturing Co., Ltd. | Trap layer substrate stacking technique to improve performance for RF devices |
US10199461B2 (en) * | 2015-10-27 | 2019-02-05 | Texas Instruments Incorporated | Isolation of circuit elements using front side deep trench etch |
JP2018078215A (ja) * | 2016-11-10 | 2018-05-17 | ルネサスエレクトロニクス株式会社 | 半導体装置および半導体装置の製造方法 |
CN110024130B (zh) * | 2016-12-30 | 2023-10-13 | 英特尔公司 | 用于rf开关的堆叠的iii族氮化物晶体管及制造方法 |
JP2020004936A (ja) * | 2018-07-02 | 2020-01-09 | 株式会社デンソー | 半導体装置およびその製造方法 |
US11374022B2 (en) * | 2019-06-14 | 2022-06-28 | Psemi Corporation | Distributed FET back-bias network |
US20230016445A1 (en) * | 2021-07-07 | 2023-01-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor structure and forming method thereof |
CN113611660B (zh) * | 2021-07-30 | 2024-03-22 | 上海华虹宏力半导体制造有限公司 | 半导体器件的形成方法 |
Family Cites Families (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10125925A (ja) * | 1996-10-24 | 1998-05-15 | Toshiba Corp | 半導体集積回路 |
JP2000294786A (ja) * | 1999-04-05 | 2000-10-20 | Nippon Telegr & Teleph Corp <Ntt> | 高周波スイッチ |
JP2001044441A (ja) * | 1999-07-29 | 2001-02-16 | Sony Corp | 完全空乏soi型半導体装置及び集積回路 |
US6406948B1 (en) * | 2000-07-13 | 2002-06-18 | Chartered Semiconductor Manufacturing Ltd. | Method for forming an ESD protection network for SOI technology with the ESD device formed in an underlying silicon substrate |
US6562666B1 (en) | 2000-10-31 | 2003-05-13 | International Business Machines Corporation | Integrated circuits with reduced substrate capacitance |
US6804502B2 (en) | 2001-10-10 | 2004-10-12 | Peregrine Semiconductor Corporation | Switch circuit and method of switching radio frequency signals |
JP2004207271A (ja) * | 2002-12-20 | 2004-07-22 | Nec Electronics Corp | Soi基板及び半導体集積回路装置 |
JP2005228779A (ja) | 2004-02-10 | 2005-08-25 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
US7851860B2 (en) * | 2004-03-26 | 2010-12-14 | Honeywell International Inc. | Techniques to reduce substrate cross talk on mixed signal and RF circuit design |
JP4974474B2 (ja) * | 2004-06-22 | 2012-07-11 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
JP2006066691A (ja) * | 2004-08-27 | 2006-03-09 | Renesas Technology Corp | 半導体装置およびその製造方法 |
US7365396B2 (en) * | 2005-04-14 | 2008-04-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | SOI SRAM products with reduced floating body effect |
US7361534B2 (en) * | 2005-05-11 | 2008-04-22 | Advanced Micro Devices, Inc. | Method for fabricating SOI device |
US7910993B2 (en) | 2005-07-11 | 2011-03-22 | Peregrine Semiconductor Corporation | Method and apparatus for use in improving linearity of MOSFET's using an accumulated charge sink |
WO2007032128A1 (ja) * | 2005-09-16 | 2007-03-22 | Sharp Kabushiki Kaisha | 薄膜トランジスタ |
KR100724560B1 (ko) * | 2005-11-18 | 2007-06-04 | 삼성전자주식회사 | 결정질 반도체층을 갖는 반도체소자, 그의 제조방법 및그의 구동방법 |
JP2007165568A (ja) * | 2005-12-14 | 2007-06-28 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
US7718503B2 (en) * | 2006-07-21 | 2010-05-18 | Globalfoundries Inc. | SOI device and method for its fabrication |
US7638376B2 (en) * | 2007-01-12 | 2009-12-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for forming SOI device |
US8089125B2 (en) * | 2007-06-07 | 2012-01-03 | Advanced Micro Devices, Inc. | Integrated circuit system with triode |
JP2008258648A (ja) * | 2008-06-02 | 2008-10-23 | Nec Electronics Corp | 半導体集積回路装置 |
-
2008
- 2008-12-23 US US12/342,527 patent/US7999320B2/en active Active
-
2009
- 2009-08-31 KR KR1020090081470A patent/KR101159405B1/ko not_active IP Right Cessation
- 2009-09-29 JP JP2009224423A patent/JP5567308B2/ja not_active Expired - Fee Related
- 2009-11-16 CN CN2009102217727A patent/CN101764092B/zh active Active
- 2009-11-23 TW TW098139781A patent/TWI462222B/zh active
-
2011
- 2011-05-26 US US13/116,396 patent/US8916467B2/en active Active
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102427021A (zh) * | 2011-09-28 | 2012-04-25 | 上海宏力半导体制造有限公司 | 半导体器件中的射频信号的传输结构及其形成方法 |
CN102427021B (zh) * | 2011-09-28 | 2016-05-04 | 上海华虹宏力半导体制造有限公司 | 半导体器件中的射频信号的传输结构及其形成方法 |
CN102508969A (zh) * | 2011-11-09 | 2012-06-20 | 中国科学院微电子研究所 | 基于区域几何同构和电学同构加速哑金属填充的方法 |
CN102508969B (zh) * | 2011-11-09 | 2014-08-13 | 中国科学院微电子研究所 | 基于区域几何同构和电学同构加速哑金属填充的方法 |
CN105336681A (zh) * | 2014-07-28 | 2016-02-17 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件的制作方法及半导体器件 |
CN105336681B (zh) * | 2014-07-28 | 2018-05-04 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件的制作方法及半导体器件 |
Also Published As
Publication number | Publication date |
---|---|
TW201036106A (en) | 2010-10-01 |
CN101764092B (zh) | 2013-04-17 |
US20110221510A1 (en) | 2011-09-15 |
JP2010153786A (ja) | 2010-07-08 |
US8916467B2 (en) | 2014-12-23 |
KR101159405B1 (ko) | 2012-07-09 |
KR20100073969A (ko) | 2010-07-01 |
JP5567308B2 (ja) | 2014-08-06 |
US7999320B2 (en) | 2011-08-16 |
TWI462222B (zh) | 2014-11-21 |
US20100156526A1 (en) | 2010-06-24 |
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Effective date of registration: 20171124 Address after: Grand Cayman, Cayman Islands Patentee after: GLOBALFOUNDRIES INC. Address before: American New York Patentee before: Core USA second LLC Effective date of registration: 20171124 Address after: American New York Patentee after: Core USA second LLC Address before: New York grams of Armand Patentee before: International Business Machines Corp. |
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