CN101740530A - 集成电路基底 - Google Patents

集成电路基底 Download PDF

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Publication number
CN101740530A
CN101740530A CN200910221124A CN200910221124A CN101740530A CN 101740530 A CN101740530 A CN 101740530A CN 200910221124 A CN200910221124 A CN 200910221124A CN 200910221124 A CN200910221124 A CN 200910221124A CN 101740530 A CN101740530 A CN 101740530A
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China
Prior art keywords
integrated circuit
conductive
bond finger
chip
conductive bond
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Pending
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CN200910221124A
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English (en)
Inventor
申武燮
金泰宪
洪民基
金信
尹太成
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of CN101740530A publication Critical patent/CN101740530A/zh
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Abstract

本发明提供了一种集成电路基底，其包括：集成电路芯片，在其表面上具有多个导电焊盘；印刷电路板，安装到集成电路芯片。该印刷电路板包括交替布置的第一和第二导电键合手指。这些第一和第二导电键合手指分别以相对于多个导电焊盘不同的第一高度和第二高度升高。该印刷电路板还包括多个第一电绝缘基座，以相对于第二导电键合手指升高的高度支撑第一导电键合手指中相应的键合手指。还提供了多个第一和第二电互连件(如布线、梁式引线)。多个第一电互连件用于将多个导电焊盘中的第一导电焊盘电连接到第一导电键合手指中相应的键合手指。多个第二电互连件将多个导电焊盘中的第二导电焊盘电连接到第二导电键合手指中相应的键合手指。

Description

集成电路基底
本申请要求于2008年11月25日提交的第2008-117700号韩国申请的优先权，通过引用将该申请的公开内容包含于此。
技术领域
本发明涉及太阳能电池及其形成方法，更具体地说，涉及半导体太阳能电池及其形成方法。
背景技术
其上具有二维阵列的焊盘(例如，输入焊盘/输出焊盘)的集成电路芯片可以利用传统的倒装芯片键合技术电连接到印刷电路板。这些键合技术可以采用连接到两维阵列的多个焊盘的每个焊盘的焊料凸点(也称作“焊球”或“焊料接缝”)。然而，倒装芯片键合技术不适合于所有的芯片到板互连应用。例如，引线键合技术可以用于将印刷电路板与沿外围(例如，边侧)紧密布置有接触焊盘或其它接触区域的集成电路芯片电互连。但是，当集成电路芯片内的集成度增大时，随着接触焊盘的数量增加以支持更高的集成，相邻接触焊盘之间的间隔会减小。然而，相邻接触焊盘之间的间隔的减小会导致由接触相邻接触焊盘的相邻引线键合件之间的电短路引起的装置失效难以接受地增多。为了解决装置可靠性的这一潜在减小，可以使用不同长度的引线键合件来接触具有增大间隔的焊盘。然而，由于在产生并接收同步数据和信号的焊盘之间引起非均匀信号延迟等，所以不同长度的引线键合的使用会导致芯片的电特性劣化。
发明内容
根据本发明实施例的集成电路基底包括：集成电路芯片，在所述集成电路芯片的表面上具有多个导电焊盘；印刷电路板，安装到所述集成电路芯片。所述印刷电路板包括：交替布置的第一导电键合手指和第二导电键合手指。这些第一导电键合手指和第二导电键合手指分别以相对于所述多个导电焊盘不同的第一高度第二高度升高。所述印刷电路板还包括：多个第一电绝缘基座，以相对于所述第二导电键合手指升高的高度支撑所述第一导电键合手指中相应的第一导电键合手指。还提供了多个第一电互连件和多个第二电互连件(例如，布线、梁式引线)。所述多个第一电互连件将所述多个导电焊盘中的第一导电焊盘电连接到所述第一导电键合手指中相应的第一导电键合手指。所述多个第二电互连件将所述多个导电焊盘中的第二导电焊盘电连接到所述第二导电键合手指中相应的第二导电键合手指。优选地，这些第一电互连件和第二电互连件被构造成具有相等的长度，从而对导电焊盘提供等效的电阻和无功负载。
根据本发明的一些实施例，所述多个第一电绝缘基座可以被构造成提供电隔离。具体地讲，所述多个第一电绝缘基座中的一对第一电绝缘基座在相对侧上至少部分地限定所述第二导电键合手指中的每个第二导电键合手指。
根据本发明的另一些实施例，所述集成电路芯片可以被倒装芯片式地安装到所述印刷电路板上，所述多个第一电互连件和所述多个第二电互连件可以被设置为焊料键合件。此外，所述集成电路芯片可以被倒装芯片式地安装到包括交替布置的第一导电键合手指和第二导电键合手指的所述印刷电路板的第一侧，在所述印刷电路板的第二侧上可包括多个基底焊盘所述多个基底焊盘通过基底通孔电连接到所述第一导电键合手指和所述第二导电键合手指。
附图说明
图1是根据本发明第一实施例的封装集成电路芯片的平面图。
图2是沿I-I′线截取的图1的封装集成电路芯片的剖视图。
图3是根据本发明一些实施例的由图1和图2示出的多个导电键合手指(Ef)的透视图。
图4是根据本发明一些实施例的由图1和图2示出的多个导电键合手指(Ef)的透视图。
图5是根据本发明一些实施例的由图1和图2示出的多个导电键合手指(Ef)的透视图。
图6是根据本发明一些实施例的由图1和图2示出的多个导电键合手指(Ef)的透视图。
图7是根据本发明一些实施例的由图1和图2示出的多个导电键合手指(Ef)的透视图。
图8是根据本发明一些实施例的由图1和图2示出的多个导电键合手指(Ef)的透视图。
图9是根据本发明一些实施例的由图1和图2示出的多个导电键合手指(Ef)的透视图。
图10是根据本发明一些实施例的由图1和图2示出的多个导电键合手指(Ef)的透视图。
图11是根据本发明一些实施例的由图1和图2示出的多个导电键合手指(Ef)的透视图。
图12是根据本发明一些实施例的由图1和图2示出的多个导电键合手指(Ef)的透视图。
图13是根据本发明一些实施例的由图1和图2示出的多个导电键合手指(Ef)的透视图。
图14是根据本发明一些实施例的由图1和图2示出的多个导电键合手指(Ef)的透视图。
图15是根据本发明其它实施例的封装集成电路芯片的剖视图。
图16是根据本发明其它实施例的集成电路基底的剖视图。
图17是根据本发明其它实施例的集成电路基底的剖视图。
图18是根据本发明实施例的包括多个集成电路基底的存储模块板的平面图。
图19是根据本发明实施例的包括多个集成电路基底的存储模块板的平面图。
图20是沿II-II′线截取的图19的存储模块板的剖视图。
图21是根据本发明其它实施例的卡基底的平面图。
图22是图21的卡基底的剖视图。
图23是图1的封装集成电路芯片的可选剖视图，其中，所示的芯片包括利用基底通孔(through-substrate via，TSV)电互连的垂直堆叠的多个芯片。
具体实施方式
现在将参照附图在此更充分地描述本发明，在附图中示出了本发明的优选实施例。然而，本发明可以以许多不同的形式来实施，而不应该被理解为局限于在此提出的实施例。而是提供这些实施例以使本公开将是彻底的且完整的，并将把本发明的范围充分地传达给本领域的技术人员。相同的标号始终表示相同的元件。
图1是根据本发明第一实施例的封装集成电路芯片的平面图，图2是沿图1的I-I′线截取的图1的封装集成电路芯片的剖视图。根据这个第一实施例，其中具有中心开口的印刷电路板110(PCB)通过粘结层6结合到其上具有多个芯片焊盘13(例如，数据焊盘、I/O焊盘)的下半导体芯片11。下芯片11还可以由模制化合物7包封和保护，模制化合物7沿印刷电路板110的下侧延伸，并延伸到开口110H中，如图所示。
印刷电路板110在其上表面上包括多个基底焊盘116。如图所示，焊球3可以与这些基底焊盘116电接触。根据本发明的一些实施例，基底焊盘116还可以(通过板通孔电互连件，未示出)电连接到对应的导电键合手指113、114。相对于芯片11的上表面以不同的“高度”设置的这些键合手指113和114通过电互连件5电连接到芯片焊盘13中对应的芯片焊盘。如图所示，这些电互连件5可以通过布线或梁式引线(beam lead)来提供。例如，在作为图1的封装集成电路芯片的可选剖视图的图15中，图2的布线5已经替换为梁式引线5A。可选地，电互连件可以由焊料接缝来提供，如下更充分地描述的。再参照图1，键合手指113和114沿宽度为W1的键合手指区域110R并排延伸。键合手指113和114的长度由标号L1指示。
图3是图1和图2示出的多个键合手指113和114的透视图。在图3中，印刷电路板110被示为包括支撑基体区域111(例如，电绝缘基体区域)和电绝缘辅助区域112，支撑基体区域111的上面具有主表面111S，电绝缘辅助区域112从支撑基体区域111向上延伸。具有相对于主表面111S升高的上表面112S的这些辅助区域112对图1和图2的电互连件5有利地提供电隔离。该电隔离用于防止在形成期间会变偏的相邻电互连件5之间形成电“短路”。下键合手指113和上键合手指114被示为包括导电金属层121-124的复合堆叠。根据本发明的一些实施例，金属层121-124可以包括铜(Cu)层121、镍(Ni)层122、钯(Pd)层123和金(Au)层124。
图4至图14示出了图3的键合手指113和114的可选实施例。在图4的实施例中，辅助区域112A和支撑基体区域111共同形成印刷电路板110A的一部分。辅助区域112A和其上的上键合手指114A相对于下键合手指113缩进。在图5的实施例中，辅助区域112A和112A′以错列的前后布置(staggeredfront-back arrangement)而设置，如图所示。在图6的实施例中，电绝缘辅助区域112A和112A″被形成为相对于支撑基体区域111的主表面111S具有不同的高度。在图7的实施例中，下键合手指113B位于上键合手指114A的前面，在相邻的辅助区域112A之间提供有侧间隙。
在图8的实施例中，下键合手指113B设置在每个辅助区域112A的前面，下键合手指113A被限定在相邻的成对的辅助区域112A之间。但是，在图9的实施例中，支撑基体区域111包括在其上升高的基体区域111A以及设置在主表面111S上的多个键合手指113。在这个实施例中，辅助区域112A形成在升高的基体区域111A上，由此限定修改的电路板110。该升高的基体区域111A被示为包括上表面111S′，在上表面111S′上设置有键合手指113A，辅助区域112A包括上表面112S，在上表面112S上设置有键合手指114A，如图所示。图10的实施例与图9的实施例类似，然而，上键合手指113A和下键合手指113B彼此错开。图11-12的实施例与图10的实施例类似，然而，修改的电路板110C省去了图10所示的辅助区域112A，上键合手指114B和114C沿升高的基体区域111A以错列布置隔开。图13的实施例与图3的实施例类似，然而，在印刷电路板110′上，交替的辅助区域112和112′具有不同的宽度，上键合手指114和114′具有不同的宽度，下键合手指113和113′具有不同的宽度。在图14中，支撑基体区域111和错列阵列的辅助区域112G共同限定修改的电路板110G，修改的电路板110G在表面111S上具有下键合手指图案113G，并在表面112S上具有上键合手指图案114G。
现在参照图16，将描述根据本发明的其它实施例的封装多芯片基底。该多芯片基底包括印刷电路板110，在印刷电路板110上具有下键合手指113和上键合手指114。这些键合手指113和114可以由电互连件117电连接到其上具有焊球3的相应基底焊盘116，基底焊盘116沿电路板110的下侧相邻地延伸。多芯片基底包括多个半导体芯片11和11A，多个半导体芯片11和11A堆叠在一起，并由模制化合物7保护。这些芯片11和11A可以通过基底通孔13T彼此电连接。这些基底通孔13T中的一些基底通孔通过相应的焊料连接件5B电连接到上键合手指114，其它基底通孔13T通过导电间隔体5C电连接到下键合手指113。这些导电间隔体5C被示为包括由焊料键合件52包围的导电塞51。有利地，下键合手指113和上键合手指114的使用通过在相邻的手指之间提供更大的有效间隔(例如，三维间隔)来支持焊料连接件5B和52的更高程度的可靠性。
图17示出了根据本发明其它实施例的封装多芯片集成电路装置。根据本发明的这个实施例，在模制化合物7内以堆叠布置设置了多个集成电路芯片11、11A。这些芯片11和11A中的每个芯片在其上包括芯片焊盘13，芯片焊盘13可以通过布线连接件5电连接在一起。第一印刷电路板110和第二印刷电路板110″均设置有下键合手指113和上键合手指114，下键合手指113和上键合手指114通过布线连接件5和5′电连接到相应的芯片焊盘13。如图所示，下键合手指113和上键合手指114通过基底通孔互连件117电连接到相应的基底焊盘116。在基底焊盘116上还设置有焊球3，如图所示。
在图18和图19中，在具有输入-输出端子205的模块板210上设置有可根据本发明实施例形成的多个半导体封装件207、207′。图19的模块板210还包括控制器单元203。图20是沿II-II′线截取的图19的模块板210的剖视图。如图20所示，半导体封装件207包括上面具有由模制化合物7保护的芯片11的封装基底310。该芯片11包括连接到垂直互连117件的焊料键合件5D。这些垂直互连件117电连接到下键合手指113和上键合手指114，如图所示。由焊料连接件5B和导电间隔体5C提供这些电连接，导电间隔体5C包括导电塞51(导电塞51由焊料键合52包围)。
图21是根据本发明的其它实施例的卡基底410的平面图，图22是沿III-III′线截取的图21的卡基底的剖视图。在该卡基底410上包括外部端子493、第一基底460和第二基底470。这些基底中的每个基底包括下键合手指113和上键合手指114，如图所示。这些外部端子493通过内部互连件连接到相应的下键合手指113和上键合手指114，如图22所示。在模制化合物7内还设置有多个芯片11，多个芯片11如图16所示进行电连接。
图23是图1的封装集成电路芯片的可选剖视图，其中，图1所示的芯片11实际上包括利用基底通孔15(TSV)电互连的垂直堆叠的多个芯片11。如图23所示，垂直堆叠的芯片11利用粘结层9结合在一起，并由周围的模制化合物7保护。每个芯片还被示为在其上包括相应的芯片焊盘13。在本发明的这些实施例中的一些实施例中，基底通孔15可以穿过芯片焊盘13中的相应芯片焊盘延伸，如图所示。
在附图和说明书中，已经公开了本发明的典型优选实施例，虽然采用了特定的术语，但它们仅是以一般和描述性意思使用的，而不用于限制性目的，在权利要求书中阐述了本发明的范围。

Claims (15)

1.一种集成电路基底，包括集成电路芯片和印刷电路板，在所述集成电路芯片的表面上具有多个导电焊盘，所述印刷电路板安装到所述集成电路芯片，所述印刷电路板包括：
交替布置的第一导电键合手指和第二导电键合手指，所述第一导电键合手指和所述第二导电键合手指分别以相对于所述多个导电焊盘不同的第一高度和第二高度升高；
多个第一电绝缘基座，以相对于所述第二导电键合手指升高的高度支撑所述第一导电键合手指中相应的第一导电键合手指；
多个第一电互连件，将所述多个导电焊盘中的第一导电焊盘电连接到所述第一导电键合手指中相应的第一导电键合手指；
多个第二电互连件，将所述多个导电焊盘中的第二导电焊盘电连接到所述第二导电键合手指中相应的第二导电键合手指。
2.根据权利要求1所述的集成电路基底，其中，所述多个第一电绝缘基座中的一对第一电绝缘基座在相对侧上至少部分地限定所述第二导电键合手指中的每个第二导电键合手指。
3.根据权利要求1所述的集成电路基底，其中，所述多个第一电互连件和所述多个第二电互连件从由布线和梁式引线组成的组中选择。
4.根据权利要求3所述的集成电路基底，其中，所述多个第一电互连件和所述多个第二电互连件具有等效的长度。
5.根据权利要求1所述的集成电路基底，其中，所述集成电路芯片被倒装芯片式地安装到所述印刷电路板；所述多个第一电互连件和所述多个第二电互连件为焊料键合件。
6.根据权利要求1所述的集成电路基底，其中，所述集成电路芯片被倒装芯片式地安装到包括交替布置的所述第一导电键合手指和所述第二导电键合手指的所述印刷电路板的第一侧；在所述印刷电路板的第二侧上包括多个基底焊盘，所述多个基底焊盘通过基底通孔电连接到所述第一导电键合手指和所述第二导电键合手指。
7.根据权利要求1所述的集成电路基底，其中，所述集成电路芯片利用焊料键合件来倒装芯片式地安装到所述印刷电路板的第一侧，所述焊料键合件将交替布置的所述第一导电键合手指和所述第二导电键合手指电连接到所述多个导电焊盘。
8.一种封装多芯片集成电路装置，包括第一集成电路芯片、第二集成电路芯片和印刷电路板，在所述第一集成电路芯片的表面上具有多个第一导电焊盘，所述第二集成电路芯片位于所述第一集成电路芯片上，在所述第二集成电路芯片上具有多个第二导电焊盘，所述印刷电路板，安装到所述第一集成电路芯片和所述第二集成电路芯片上，所述印刷电路板包括：
交替布置的第一导电键合手指和第二导电键合手指，相对于所述多个第一导电焊盘，所述第一导电键合手指以第一高度升高，所述第二导电键合手指以第二高度升高，所述第一高度与所述第二高度不同；
交替布置的第三导电键合手指和第四导电键合手指，相对于所述多个第二导电焊盘，所述第三导电键合手指以第三高度升高，所述第四导电键合手指以第四高度升高，所述第三高度与所述第四高度不同；
多个第一电绝缘基座，以相对于所述第二导电键合手指升高的高度支撑所述第一导电键合手指中相应的第一导电键合手指；
多个第二电绝缘基座，以相对于所述第四导电键合手指升高的高度支撑所述第三导电键合手指中相应的第三导电键合手指；
多个第一电互连件，将所述多个第一导电焊盘中的相应第一导电焊盘电连接到所述第一导电键合手指中的相应第一导电键合手指；
多个第二电互连件，将所述多个第一导电焊盘中相应的第一导电焊盘电连接到所述第二导电键合手指中相应的第二导电键合手指；
多个第三电互连件，将所述多个第二导电焊盘中相应的第二导电焊盘电连接到所述第三导电键合手指中相应的第三导电键合手指；
多个第四电互连件，将所述多个第二导电焊盘中相应的第二导电焊盘电连接到所述第四导电键合手指中相应的第四导电键合手指。
9.根据权利要求8所述的集成电路装置，其中，所述印刷电路板包括：
多个基底焊盘，位于所述印刷电路板的第一表面上；
导电通孔，穿过所述印刷电路板延伸，并将所述第一导电键合手指、所述第二导电键合手指、所述第三导电键合手指和所述第四导电键合手指中的一个导电键合手指电连接到所述多个基底焊盘中相应的一个基底焊盘。
10.一种集成电路基底，包括：
第一集成电路芯片，在所述第一集成电路芯片的表面上具有多个导电焊盘；
印刷电路板，安装到所述第一集成电路芯片上，所述印刷电路板包括：第一键合手指，由一对电绝缘基座在相对侧上限定；一对第二键合手指，位于所述一对电绝缘基座上；
相邻的三条导电布线，所述相邻的三条导电布线的第一端接触所述第一键合手指和所述第二键合手指，所述相邻的三条导电布线的第二端接触位于所述集成电路芯片的表面上的紧邻的三个焊盘。
11.根据权利要求10所述的集成电路基底，所述集成电路基底还包括：多个焊球，位于所述印刷电路板上，所述多个焊球电连接到所述第一键合手指和所述第二键合手指中相应的键合手指。
12.根据权利要求11所述的集成电路基底，其中，所述多个焊球在与所述第二键合手指呈平面的界面处接触所述印刷电路板。
13.根据权利要求11所述的集成电路基底，其中，所述第一键合手指相对于所述第二键合手指中的至少一个第二键合手指具有不相等的宽度。
14.根据权利要求11所述的集成电路基底，所述集成电路基底还包括：多个第二集成电路芯片，结合到所述第一集成电路芯片。
15.根据权利要求11所述的集成电路基底，所述集成电路基底还包括：基底通孔，将所述多个第二集成电路芯片中的一个第二集成电路芯片上的焊盘电连接到所述多个导电焊盘中相应的一个导电焊盘。
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