JP5388422B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- JP5388422B2 JP5388422B2 JP2007126481A JP2007126481A JP5388422B2 JP 5388422 B2 JP5388422 B2 JP 5388422B2 JP 2007126481 A JP2007126481 A JP 2007126481A JP 2007126481 A JP2007126481 A JP 2007126481A JP 5388422 B2 JP5388422 B2 JP 5388422B2
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Description
12 第3電極
14 第4電極
20 第2半導体チップ
22 第1電極
24 第2電極
26 再配線層
28、29 めっき層
30、30a、30b 第1ワイヤ
32、 第2ワイヤ
40 絶縁層
42 ベースメタル
44 再配線用レジスト
46 第2電極用レジスト
50 実装部
60、62 接着剤
70 樹脂
90 第1領域
92 第2領域
94 第3領域
96 第4領域
Claims (10)
- 実装部に実装された第1半導体チップと、
前記第1半導体チップ上に、その一部が前記第1半導体チップからはみ出した状態で実装された第2半導体チップと、
前記第2半導体チップ上における、前記第1半導体チップからはみ出した第1領域に設けられ、前記第2半導体チップの内部回路に接続された第1電極と、
前記第2半導体チップ上における、前記第1半導体チップの直上の第2領域、または前記第1領域上における、前記第2領域及び前記第1電極の間の第3領域に設けられ、前記第2半導体チップの内部回路に前記第1電極を介して接続された第2電極と、
前記第1電極及び前記第2電極を接続する再配線層と、
前記第2電極及び前記実装部を接続する第1ワイヤと、
を備え、
前記第2電極の表面が、前記再配線層とは異なる金属層で覆われており、
隣接する前記第2電極同士の距離は、隣接する前記第1電極同士の距離よりも大きいことを特徴とする半導体装置。 - 前記第2電極及び前記再配線層の表面が、前記金属層で覆われていることを特徴とする請求項1記載の半導体装置。
- 前記第2電極は、前記第1電極に対して交差する方向に配列して設けられていることを特徴とする請求項1又は2記載の半導体装置。
- 前記第1半導体チップ上における前記第2半導体チップからはみ出した第4領域に設けられ、前記第1半導体チップの内部回路に接続された第3電極と、
前記実装部及び前記第3電極を接続する第2ワイヤと、を具備することを特徴とする請求項1から3のいずれか一項記載の半導体装置。 - 前記第1ワイヤは前記第2ワイヤに対し、上から見た場合に重ならないように設けられていることを特徴とする請求項4記載の半導体装置。
- 前記第1半導体チップ上における前記第2半導体チップからはみ出した第4領域に設けられた第4電極を具備し、前記第1ワイヤは前記第4電極を介して、前記第2電極及び前記実装部に接続されていることを特徴とする請求項1から5のいずれか一項記載の半導体装置。
- 実装部に第1半導体チップを実装する工程と、
第1電極を有する第2半導体チップ上に、再配線層及び第2電極を形成する工程と、
前記第1半導体チップ上に前記第2半導体チップを、その一部が前記第1チップからはみ出した状態で実装する工程と、
前記第2電極及び前記実装部を、第1ワイヤにてワイヤボンディングにより接続する工程とを有し、
前記第1電極は、前記第2半導体チップの前記第1半導体チップへの実装時に、前記第1半導体チップからはみ出した第1領域に位置し、前記第2半導体チップの内部回路に接続され、
前記第2電極は、前記第2半導体チップの前記第1半導体チップへの実装時に、前記第1半導体チップの直上の第2領域、または前記第1領域上における、前記第2領域及び前記第1電極の間の第3領域に位置し、前記第2半導体チップの内部回路に前記第1電極を介して接続され、
前記第1電極及び前記第2電極は、前記再配線層にて接続されており、
さらに、前記第2電極の表面に、前記再配線層とは異なる金属層を形成する工程を有し、
隣接する前記第2電極同士の距離は、隣接する前記第1電極同士の距離よりも大きいことを特徴とする半導体装置の製造方法。 - 前記第2電極及び前記再配線層の表面に、前記金属層を形成する工程を有することを特徴とする請求項7記載の半導体装置の製造方法。
- 前記第1半導体チップは、前記第1半導体チップ上における前記第2半導体チップからはみ出した第4領域上に、前記第1半導体チップの内部回路に接続された第3電極を有し、
前記第3電極及び前記実装部を前記第2ワイヤにて接続する工程を有することを特徴とする請求項7又は8記載の半導体装置の製造方法。 - 前記第1半導体チップは、前記第1半導体チップ上における前記第2半導体チップからはみ出した第4領域上に第4電極を有し、
前記第4電極を介して前記第2電極及び前記実装部を前記第1ワイヤにて接続する工程を有することを特徴とする請求項7から9のいずれか一項記載の半導体装置の製造方法。
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