CN101711430A - 射频芯片的组装 - Google Patents
射频芯片的组装 Download PDFInfo
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- CN101711430A CN101711430A CN200880021239A CN200880021239A CN101711430A CN 101711430 A CN101711430 A CN 101711430A CN 200880021239 A CN200880021239 A CN 200880021239A CN 200880021239 A CN200880021239 A CN 200880021239A CN 101711430 A CN101711430 A CN 101711430A
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- Die Bonding (AREA)
Abstract
本发明涉及射频传输/接受装置(2)的制造。本发明提供:形成不具有天线的射频传输/接受芯片;通过至少两根导电线缆元件串联连接的芯片,该导电线缆元件在两相邻芯片之间的长度分别以传输/接收频率为函数,每个元件与芯片(3)的至少一端电接触并且确保能至少暂时地机械保持所述芯片的连接;以及,对于每个芯片形成装置天线的两束绞线(41’,42’)以规则的间隔切割所述的连接。
Description
技术领域
本发明主要涉及电子电路以及更具体地涉及形成有装配射频收发装置的微电子装置。
背景技术
射频微电子收发装置被越来越多的应用于与其相关联对象的远程识别。通常称之为电子标签(RFID)。这种电子标签的功能可限于传输标识符,或者可包括更多的复杂功能(例如:远程传输由集成在芯片上的传感器测量到的结果;处理来自远距离元件的数据等)。
图1为位于读取或读-写终端1(READER,读取器)与电子标签类型的电子装置2(TAG,标签)之间的射频通讯系统的简单框图。终端1和标签2包括以简化的电感元件L1和L2样式所示的天线。依照传输所使用的频带,天线L1和L2为回路天线或偶极子天线。在图1所示例中,电感元件L1和L2分别与电容元件C1串联、与C2并联(以虚线所示)从而一起构成通常被调谐至工作频带中心频率的振荡电路。
通常,对于从数百千赫至数十兆赫的频带,天线L1和L2为回路形;而对于量级从数百兆赫至数千兆赫的频率,则所述天线为偶极子形。
最普遍情况下,电子标签2由终端1辐射的射频场中获得其所组成的电子电路工作所必须的功率。
电子标签的许多结构更普遍地以射频收发芯片和读取或读-写终端的形式存在。
形成位于所述电子标签一侧的天线L2采用来自于微电子工业的集成或印刷电路(蚀刻或印刷导电轨道)制造工艺。这极大的影响所述电子标签的成本。
期望得到一种射频收发装置,其带有制造成本更便宜的天线。
进一步期望得到一种制造装配有天线的射频收发装置的简单方法。
在某些应用中,期望将几个电子标签与同一个对象相关联。之后所述标签必须各自贴附在相关的对象上(例如,一根很长的管)。
文献WO2008/025889A披露了一种通过用于将芯片与外界电气连接的电缆元件来构成彼此相连接的微电子芯片的技术,其中,数根导线同时形成RFID组件的天线和电源。
期望利用这种技术实现射频收发装置的天线间不需要通过电源导线互联从而使射频收发装置天线的形成更容易。
进一步期望得到一种简单的解决方法,能在将它们组装到计划或正在应用中的对象之前将多个射频收发芯片相关联。
发明内容
为达到这些目标的全部或者这些目标中和其它相同的一部分,本发明提供了一种制造射频收发装置的方法,包括:
形成不带天线的射频收发芯片;
通过至少两根导电线缆元件串联连接的芯片,该导电线缆元件在相邻芯片之间分别具有根据传输-接收频率选择的长度,每个元件与芯片的至少一个接线端电接触并且至少暂时地机械保持所述芯片的串接;
并且,对于每个芯片中装置天线的两束绞线,以规则的间隔切割所述的串联连接。
依据一个实施例,两根导电线缆元件放置在所述芯片的任意一侧,在这些芯片各自沿第一方向的侧面边缘的附近。
依据一个实施例,在两相邻芯片之间设置有支撑连接所述两根导电线缆元件的至少一个导电部分的中间元件,并且对于每个芯片,该中间元件用于切割形成回路天线。
依据一个实施例,所述芯片在通过导电线缆元件连接之前被放置于支撑条之上。
依据一个实施例,线缆连接元件是在切割所述串联连接之前与不同的芯片连接,以在切割所述串联连接之后形成一连串的射频装置。
依据一个实施例,所述绞线缠绕在所述连接元件四周。
依据一个实施例,每个芯片包括至少一个用于接收导电线缆元件的区域。
本发明还提供了一种射频收发装置,包括:
集成射频收发电路的微电子芯片;
至少两束导线天线绞线。
本发明还提供了一串射频收发装置,包括若干个集成射频收发电路的电子芯片并且电子芯片通过连接至所述芯片的天线连接垫片的至少两个导电线缆元件彼此之间连接,所述元件在两相邻芯片之间各自的长度根据传输-接收频率选择。
依据一个实施例,附加的连接元件具有比两相邻芯片之间导电元件各自的长度更长的长度,在切割所述芯片之间的导电元件之后连接所述芯片。
附图说明
前述的对象、特征以及本发明的优点,与其它一样都在以下的但不限于与附图相对应的具体实施例说明中详细讨论,附图中包括:
图1,如上述,为作为实施例应该于本发明的一种射频收发系统的框图;
图2为实施例中可容纳接收线缆元件的微电子芯片的横截面简示图;
图3为另一实施例中可容纳接收线缆元件的微电子芯片的横截面简示图;
图4A和4B分别是分离之前的一串芯片以及由这串芯片获得的射频收发装置的顶视图;
图5A和5B分别是形成所述天线之前和之后,另一实施例中的一串射频收发装置的顶视图;
图6是集成电路晶片一部分的顶视简图;
图7A和7B分别是串接和立即分开应用于回转天线的另一实施例中射频装置;
图8A和8B所示仍然分别为在串接状态以及立即分开的另一实施例中的射频装置;
图9A和9B所示仍然为另一实施例中的一串射频收发装置的顶视简图。
相同的元件在不同的图中都用相同的数字指定,但并不按比例。
具体实施方式
为清楚起见,只有那些有助于理解本发明的步骤和元件才会示出和描述。尤其是所述射频收发装置的电路内部没有详述,发明根据目标应用采用常用电路(例如测量传感器、物体识别器等等)。批量制造所述微电子芯片的步骤也未有详述,在此本发明将再一次采用常用技术。
此后本发明的描述将与RFID芯片的实施例相关,但它更通常应用于任意的芯片或者微型射频收发电路。
图2为微电子芯片3的横截面简示图,该电子芯片能够形成图1中标签2类型的电子标签芯片。衬底33支撑一个或多个集成电路以及元件,并且具有至少两个垫片,在芯片3外侧对应线缆连接元件41和42(图示为虚线)的接收区域35,与可接触的接触区域电连接(连接31和32)。在图2的实施例中,衬底33双面都涂覆有绝缘和保护材料34,例如,环氧树脂。接收区域35在芯片的两侧沿第一方向形成。图2相关所描述的结构为文献WO2008/025889A中实施例描述的形式。
根据本发明,区域36用于天线连接接触区域。
图3为微电子芯片3的另一实施例的横截面简示图。与图2实施例相比,衬底33的后表面并未覆盖树脂。导线41和42的接收区域35由芯片3内形成的平行凹进所形成。所述凹进可以例如为凹槽。凹槽的形状可以有多种,尤其是方底型、V型、截锥V型、或者圆弧形。在以前的实施例中,凹进的尺寸和形状根据所述线缆连接元件的特性优选。如一实施例,凹槽的深度和宽度在20至100微米的范围内变化,以对应具有20至100微米直径的连接元件41或42。例如在凹进35的底部设置有金属区域36,并且根据本发明用作天线连接接触区域,例如通过绝缘材料34中的导电通孔32的方式。凹进35可直接形成在衬底33中,优选紧邻微电子元件。凹进35可通过任意合适的工艺形成,例如,通过干法或湿法蚀刻、锯切等。
图2和3的结构具有不同的变型,例如,如上文提及的文献中所描述。
图4A为根据本发明实施例一串RFID芯片3的顶视图。图4A中所示的连接是在将芯片3从至少部分由半导体材料制成的晶片上划片之后,通过将所述芯片放置在条5之上以规则的间隔暂时支撑而获得。然后优选将导线41和42安置于芯片侧面,与由每个芯片的导线41和42的屏蔽套35易得到的接触区域电接触。例如,所述接触区域在晶片批量生产期间在屏蔽套侧面内金属化形成。经由与芯片3的导电区域36电接触的导线41或42的组装,通过导电胶、焊接、或其它任意合适的方法实现。
最后,导线41和42以所述连接的规则间隔切割,例如,在每个芯片3的一端对应导线41而在每个芯片的另一端对应导线42(沿图4A中所示的虚线C),得到装配天线的RFID装置2。
图4B是在切割图4A的导线41和42之后得到的RFID装置2的顶视简图。每个芯片3与发源于暂时连接导线41和42的两束绞线41’和42’相连以形成装置2。
选择一旦芯片已分离开仍然保持的绞线或者部分41’和42’的长度以适应射频收发天线的理想长度。如图4B所示实施例中的天线类型,该长度,例如对于两根对准的绞线41’和42’之和大约为λ/2数量级,这里λ代表传输/接收波段中心频率的波长。
线缆元件41和42的直径大于芯片3内部的可能连接线(例如图2中的32和33)的直径。例如,该直径与完成的芯片3厚度具有相同的数量级(比例在1/4和1之间)。
只要导线41和42未被切割,它们将芯片3机械保持在一起,例如以辊压形式在它们最终组装在将识别的对象之上之前,能够维持它们的连接。
图5A和5B所示为另一实施例的分别在切割导线41和42以分离天线之前和之后的顶视图。根据本实施例,芯片3仍然以线缆连接元件7的方式彼此连接。例如,当所述芯片仍然在晶片中或被临时条如图3A的条5所支撑时,线缆7在切割导线41和42之前与芯片3相连。选择各芯片3之间连接元件7的部分的长度大于绞线41’和42’的长度。该长度基于目标应用中两个射频装置之间的理想距离以及例如从几厘米到数米。连接元件7即使在天线分离开之后仍能保持所述RFID装置在连接串20中,因而直到它们最终植入到对象上。
实施例中将RFID芯片连接串20沿地下线路放置的适用情况使定位更加容易。
根据另一实施例,连接线缆7可规则分布RFID芯片以代替织线混合进纺织品中。
实施例中线缆7根据最终期望的连接长度切割。线缆7优选为绝缘并且其机械阻抗基于目标的应用。线缆7的横截面为圆形或其它形状(例如矩形)、单股或多股。
所述连接元件(多个),它们是将形成天线绞线41’和42’的连接元件41和42或者将形成最终支撑线缆7的连接元件,可具有圆形、正方形、或其它横截面,并且由一根线缆或多个线缆形成。至于将形成所述天线的导线41和42,这些元件是导电的(并且除了在与芯片的接触处之外可能由绝缘体屏蔽)。
根据所述具体实施例,不同的芯片形成在半导体或绝缘衬底晶片上。它们通过至少一个线缆连接元件(或者将形成两根天线的导线41和42,或者永久连接元件7,或者二者皆有)互相连接。然后,排列衬底以将通过连接元件(多个)提供单独柔性机械连接而连接的芯片3彼此分离开。传统上芯片3的分离在固体衬底的情况下实现,例如通过锯切,同时要细心避免切割所述连接元件(多个)。
图6所示为衬底晶片的部分6,之上有依据本实施例形成的多个RFID芯片3。在本实施例中,在切割之前连接元件41和42与芯片43相连接。这将避免使用暂时支撑条。然而,依据所需的天线长度,相对于切割通道所需的间隔,芯片之间需要相对大的间隔。两芯片之间导线41和42的长度如图示优选大于晶片上的芯片见的间隔,以对应所期望的天线长度。
如果条5(图4A)用作暂时保持芯片3连接的临时支撑,准备形成天线绞线的导线41和42则在将芯片3放置在条5上之后进行组装。
图7A和7B分别是在切割天线导线之前和之后另一更详细实施例采用的形成的回路天线顶视图。
根据该实施例,在切割所述天线(图7A)之前的芯片连接结构中,连接导线41和42在两芯片之间通过包括彼此连接导线41和42的导电部分中间元件8来连接彼此。例如,芯片3两个两个的成对以使第一切割线(c’)位于两芯片之间而不让任意导线残留其间,并且第二切割线(c”)位于连接元件8留下的位置,在切割线c”的任一侧绞线43’连接绞线41’和42’(图7B)。连接部分43的宽度基于切割线c”的宽度以保持在每一侧,导电部分43’。作为一种变化,两个平行部分43’形成在切割线c”任意一侧的元件8之上或之中。在图7A和7B的实施例中,提供的RFID装置2’(图7B)最终分离开。然而,与图5A和5B所示相关的永久连接元件的变化形式也被提供。
图8A和8B仍然为另一实施例中分别连接或分离开的RFID芯片顶视图。
根据该实施例,具有大体拉长的形状以及从每个芯片3的两侧的突出的元件9在从晶片切割下之后放置或者集成有从每个芯片3的两侧突出的部分91和92。元件9由绝缘材料制成或者由绝缘材料包皮屏蔽并且计划分别接收之后缠绕成线圈的天线绞线41’和42’(图8B)。如果得到的RFID装置2”仍然保持连接,元件9将是支撑线缆7(图5A和5B)的部分。元件9为中度柔性或者刚性并且接收绞线41’和42’,例如,作为纺织品“绝缘胶带”。作为变化,元件9可由选自其电磁特性的材料(例如、铁氧体)制成。
图8A和8B实施例的优点在于天线的特性得到改善,尤其是提高了它们阻抗的虚部。
图9A和9B所示,与之前的示意图相比较,根据由对准每个芯片任一侧的两束绞线41’和42’组成的每个天线的变化。在这种情况下,切割导线之前所述芯片的连接通过大量的具有各自长度对应于天线绞线期望长度的两倍的导线44(图8A)获得,并且与芯片接触的区域36排成一条直线。支撑线缆7在切割导线44之后连接装置。横跨芯片3宽度的导线44的位置无关紧要(相对于由导线44的方向定义的长度方向)。
之上描述的不同实施例和变化当然可以结合。
所述实施例的优点在于他们能获得具有由线缆元件组成的天线的RFID装置,这使它们比在绝缘衬底上沉积导电墨水要便宜。
另一优点在于提供一种工艺能够至少在组装到最终对象上之前保持射频芯片连接的可能性。这可以是对芯片的卷绕处理,例如电镀、涂覆处理等等。
另一优点是所述的实施例甚至能够在最终应用中保持连接的射频芯片结构。
各种不同的实施例都已描述,以及不同的替代和改进方式对于本领域技术人员是可行的。尤其是对于天线绞线尺寸的选择基于应用以及尤其基于也作用在电子芯片侧之上的其它元件(尤其是电容元件)的期望工作频率。
进一步,发明的实际实施在基于之前提及的功能指示基础上本领域技术人员的能力之内。
最后,尽管本发明已描述了相关的每个提供一个天线的装置,但每个装置两根天线使得能遍及几个频带工作。例如,在图7A和7B所示的实施例装置的变化中,元件8位于各个芯片之间并且绞线41’和42’在同一芯片的两侧各自的长度不同,以获得不同值的两个导电元件。采用单天线也可以实现设置工作频带,就目前而言,可通过改变电容元件C2来更改振荡电路的调谐频率以设置芯片3内部构件的方式。
Claims (11)
1.一种制造射频收发装置(2,2’,2”)的方法,特征在于该方法包括:
形成不带天线的射频收发芯片(3);
所述芯片串联连接,每个芯片通过至少两个导电线缆元件(41,42,44)连接至两芯片之间,所述至少两个导电线元件各自的长度是根据传输-接收频率选择的,并且每个导电线缆元件与芯片(3)的至少一个接线端电接触,并且至少暂时地机械保持所述芯片的连接;并且
对于每个芯片,以规则的间隔切割所述的连接,以形成装置天线的绞线(41’,42’)。
2.权利要求1所述方法,其中两个导电线缆元件(41,42)放置在所述芯片的任意一侧,处于这些芯片各自沿第一方向的侧面边缘的附近。
3.如权利要求2所述方法,其中每个中间元件(8)支撑连接所述导电线缆元件(41,42)的至少一个导电部分(43),并且对于每个芯片,该中间元件切割形成回路天线。
4.如权利要求1至3中的任意一项所述方法,其中所述芯片(3)在通过导电线缆元件(41,42,44)连接之前被放置于支撑条(5)之上。
5.如权利要求1至4中的任意一项所述方法,其中线缆连接元件(7)在切割连接之前与不同的芯片连接,而在切割所述连接之后形成一连串的射频装置。
6.如权利要求5所述方法,其中所述绞线(41’,42’)缠绕在所述连接元件(7)的四周。
7.如权利要求1至6中的任意一项所述方法,其中每个芯片(3)包括用于接收导电线缆元件(41,42,44)的至少一个区域(35)。
8.一种射频收发装置(2,2’,2”),其特征在于该装置包括:
集成射频收发电路的微电子芯片(3);
应用权利要求1至7中的任意一项方法获得的至少两束导线天线绞线(41’,42’)。
9.连接起来的射频收发装置(2,2’,2”)连接串,包括若干个集成射频收发电路的电子芯片(3)并且电子芯片彼此连接,每个芯片通过至少两个导电线缆元件(41,42,44)连接至所述芯片的天线连接垫片(36),在两相邻芯片之间的元件的长度分别根据传输-接收频率选择。
10.如权利要求9所述装置的连接串(20),其中附加的连接元件(7)的长度比两相邻芯片之间导电元件(41’,42’)各自长度更长,并且该连接元件在切割所述芯片之间的导电元件之后连接所述芯片。
11.如权利要求9或10所述装置的连接串,通过实施权利要求1至7中任意一项所述的方法获得。
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FR0704445 | 2007-06-21 | ||
FR0704445A FR2917895B1 (fr) | 2007-06-21 | 2007-06-21 | Procede de fabrication d'un assemblage de puces reliees mecaniquement au moyen d'une connexion souple |
PCT/FR2008/051079 WO2009004243A2 (fr) | 2007-06-21 | 2008-06-18 | Assemblage de puces radiofrequence |
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CN2008800212154A Expired - Fee Related CN101681887B (zh) | 2007-06-21 | 2008-06-20 | 通过柔性连接而机械互连的成套芯片的制造方法 |
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EP (2) | EP2158604B1 (zh) |
JP (2) | JP5385900B2 (zh) |
CN (2) | CN101711430B (zh) |
AT (1) | ATE486367T1 (zh) |
DE (1) | DE602008003224D1 (zh) |
ES (1) | ES2355180T3 (zh) |
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-
2008
- 2008-06-18 US US12/665,419 patent/US8471773B2/en active Active
- 2008-06-18 WO PCT/FR2008/051079 patent/WO2009004243A2/fr active Application Filing
- 2008-06-18 JP JP2010512746A patent/JP5385900B2/ja active Active
- 2008-06-18 EP EP08806014.0A patent/EP2158604B1/fr active Active
- 2008-06-18 CN CN200880021239XA patent/CN101711430B/zh active Active
- 2008-06-20 DE DE200860003224 patent/DE602008003224D1/de active Active
- 2008-06-20 JP JP2010512741A patent/JP5405457B2/ja not_active Expired - Fee Related
- 2008-06-20 AT AT08826649T patent/ATE486367T1/de active
- 2008-06-20 ES ES08826649T patent/ES2355180T3/es active Active
- 2008-06-20 US US12/452,137 patent/US8258011B2/en not_active Expired - Fee Related
- 2008-06-20 EP EP20080826649 patent/EP2158605B1/fr not_active Not-in-force
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CN102959698A (zh) * | 2010-06-24 | 2013-03-06 | 原子能和代替能源委员会 | 在具有初始断点的线缆上安装的芯片元件 |
CN103080392A (zh) * | 2010-06-24 | 2013-05-01 | 原子能和代替能源委员会 | 铠装线内芯片元件的容纳 |
CN102959698B (zh) * | 2010-06-24 | 2015-08-19 | 原子能和代替能源委员会 | 在具有初始断点的线缆上安装的芯片元件 |
CN103080392B (zh) * | 2010-06-24 | 2015-11-25 | 原子能和代替能源委员会 | 铠装线内芯片元件的容纳 |
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US11755874B2 (en) | 2021-03-03 | 2023-09-12 | Sensormatic Electronics, LLC | Methods and systems for heat applied sensor tag |
US11869324B2 (en) | 2021-12-23 | 2024-01-09 | Sensormatic Electronics, LLC | Securing a security tag into an article |
Also Published As
Publication number | Publication date |
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WO2009013409A2 (fr) | 2009-01-29 |
FR2917895A1 (fr) | 2008-12-26 |
EP2158605B1 (fr) | 2010-10-27 |
CN101711430B (zh) | 2013-10-16 |
CN101681887B (zh) | 2011-08-10 |
DE602008003224D1 (de) | 2010-12-09 |
JP5385900B2 (ja) | 2014-01-08 |
WO2009013409A3 (fr) | 2009-05-22 |
ATE486367T1 (de) | 2010-11-15 |
JP2010530630A (ja) | 2010-09-09 |
WO2009004243A4 (fr) | 2009-07-23 |
US8471773B2 (en) | 2013-06-25 |
CN101681887A (zh) | 2010-03-24 |
US8258011B2 (en) | 2012-09-04 |
FR2917895B1 (fr) | 2010-04-09 |
WO2009004243A2 (fr) | 2009-01-08 |
EP2158604B1 (fr) | 2016-10-19 |
WO2009004243A3 (fr) | 2009-05-14 |
EP2158604A2 (fr) | 2010-03-03 |
JP5405457B2 (ja) | 2014-02-05 |
JP2010530584A (ja) | 2010-09-09 |
ES2355180T3 (es) | 2011-03-23 |
US20100245182A1 (en) | 2010-09-30 |
US20100136746A1 (en) | 2010-06-03 |
EP2158605A2 (fr) | 2010-03-03 |
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