CN101681887B - 通过柔性连接而机械互连的成套芯片的制造方法 - Google Patents

通过柔性连接而机械互连的成套芯片的制造方法 Download PDF

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CN101681887B
CN101681887B CN2008800212154A CN200880021215A CN101681887B CN 101681887 B CN101681887 B CN 101681887B CN 2008800212154 A CN2008800212154 A CN 2008800212154A CN 200880021215 A CN200880021215 A CN 200880021215A CN 101681887 B CN101681887 B CN 101681887B
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chip
substrate
connection element
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chips
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CN101681887A (zh
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让·布龙
布鲁诺·莫雷
多米尼克·维卡德
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Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
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Abstract

本发明涉及通过柔性连接而机械地互连的芯片(2)的组装体的制造。所述芯片(2)结合到基板(1)上,且每个芯片都包括容放区域(4)。该组装体的芯片(2)通过连接元件(6)在容放区域(4)中串联连接。然后,分开芯片(2),连接元件(6)形成柔性机械连接。

Description

通过柔性连接而机械互连的成套芯片的制造方法
技术领域
本发明涉及通过柔性连接而机械互连的芯片的组装体(assembly)的制造方法,该方法包括:
-在基板上制造芯片,每个芯片都包括容放区域,
-通过连接元件串联连接成套芯片中的各芯片的容放区域,
-分开各芯片。
背景技术
当微电子芯片不能实现其自身的特定功能时,通常连接到一个或多个其他芯片以获得所需的功能。现在,存在大量的技术用于将微电子芯片彼此机械连接和电连接。传统的技术包括在芯片已经形成在基板上并通过切割分离后,在芯片之间进行刚性的机械连接。然后,固定到刚性支撑上的芯片在形成保护涂层前进行电连接。当存在很复杂的芯片连接时,传统上采用包括在刚性支撑上进行连接的该第一方法。然而,该方法的主要缺点是它采用刚性机械支撑,这种刚性机械支撑特别不适合柔性结构中的集成。
文献WO-A-02/084617中描述的第二方法将芯片集成到成套的纺织纤维或线中来制造装置。这种芯片集成到纤维中可以通过埋入来实现。不同的芯片可以通过导电丝彼此连接,这些导电丝也能埋入或包封在纤维中。然而,该文献没有指出在不同芯片之间如何固定导电材料丝,以及如何进行在纤维中的埋入。
发明内容
本发明的目标是提供以易于执行的柔性方式彼此机械连接的芯片的组装体的制造方法。
该目标通过以下方式来实现:由凹槽形成容放区域,埋入所述凹槽中的线作为连接元件,从而实现所述的柔性连接方式(means)。
附图说明
通过下面对本发明特定实施例的描述,其他优点和特征将更加明显易懂,本发明的特定实施例仅给出非限定性示例,并且示于附图中,在附图中:
-图1至3示出了根据本发明第一实施例的连续步骤的示意性截面图;
-图4和5示出了根据本发明第二实施例的连续步骤的示意性截面图;
-图6示出了根据本发明第三实施例的示意性截面图;
-图7和8示出了根据本发明第四实施例的连续步骤的示意性截面图;
-图9示出了光刻后的图8示意性俯视图;
-图10和11示出了根据本发明第五实施例的连续步骤的示意性截面图。
具体实施方式
如图1所示,多个微电子芯片2集成在基板1上,该基板1可以是硅基板。芯片2可以相同或不同。进行传统的光刻步骤以通过光致抗蚀剂树脂3在每个微电子芯片2上限定容放区域4。
如图2所示,可以是粘合剂5的固定剂设置在容放区域4上。
然后,连接元件6通过粘合剂5固定到每个芯片2上,以彼此连接芯片。连接元件6为线性形状。它可以具有圆的或方的截面,并且由一根线或成套的线形成。连接元件6可以由绝缘材料制作,例如,天然纤维或合成纤维。在后者的情况下,例如,它可以由诸如聚酯(polyester)或聚酰胺(polyamide)的聚合物形成。然而,连接元件6优选由导电材料制作,例如金属,以实现芯片2之间的电连接。在此情况下,粘合剂5优选是导电的,并且容放区域4可以包含与芯片2的部件进行电连接的接触区域。连接元件6的连接两个容放区域4也就是两个芯片2的长度取决于它们将来的应用。因此,例如,在两个容放区域之间连接元件6的长度可以大于最初隔开两个容放区域4的距离(见图6)。例如,连接元件6较大的长度能实现随后例如以卷或环的形式存储芯片2,或者如果芯片2利用该连接元件作为天线(antenna)。在此情况下,连接元件6可以形成两个容放区域4之间的环(loop)。
如图3所示,然后图案化基板1,以将芯片2以及基板1的相应部分彼此分开。然后,芯片2仅通过连接元件6由柔性机械连接被串联连接。在块状基板(bulk substrate)1的情况下,芯片2的分开(release)以传统的方式例如通过切割进行,并注意不要切割连接元件6。
由于所有的芯片开始被固定到由基板1形成的同一刚性支撑,因此大大方便了连接元件6和芯片2之间的固定。然后,该操作类似于微电子工业中通常采用的技术。
在芯片2之间的连接不仅为机械连接而且为电连接的替换实施例中,呈现不同功能的芯片2可以彼此连接。然后,这些芯片2可以集成在一个并且相同的基板1上或集成在不同的基板上,而后通过单一的连接元件6连接。
在图4和5所示的替换实施例中,构成固定膜的临时支撑7首先沉积在基板1的表面上,该表面与包括芯片2的表面相反。如图4所示,在容放区域4已经形成在光致抗蚀剂中后,在基板1的位置彼此分开芯片2。然而,它们通过临时支撑7保持着彼此的机械固定。芯片2的这种部分地分开由任何合适的方法实现,例如,通过切割或等离子体蚀刻。
如图5所示,如前述一样,连接元件6固定到容放区域4上的每个芯片2。然后,去除临时支撑7,然后芯片2仅通过由连接元件6形成的柔性机械连接彼此固定,如图3所示。
在图6所示的另一个替换实施例中,芯片2集成在绝缘体上基板(SOI)上。绝缘体上基板通常包括布置在埋入绝缘体9上的有源基板8,埋入绝缘体9形成在支撑基板10上。有源基板8可以比作基板1,而埋入绝缘体9和支撑基板10构成了临时支撑。以与图5类似的方式,在图6中,芯片2已经在有源基板8的位置被部分地分开,并且连接元件6固定到每个芯片2。然后,例如,通过对埋入绝缘体9进行湿法蚀刻特别是通过氢氟酸的湿法蚀刻,芯片可以从由埋入绝缘体9和支撑基板10形成的临时支撑分开。也可以通过劈开而分开临时支撑,然后临时支撑固定到芯片,而不再提供任何机械功能。如前所述,芯片2仅通过连接元件6保持彼此连接。
在替换实施例(未示出)中,在例如为焊垫形式的芯片的接触区域处,连接元件6通过焊接(welding)而不是通过粘结(bonding)来固定到每个芯片2。在此情况下,接触区域构成容放区域4,并且免除了沉积光致抗蚀剂3以及通过光刻形成容放区域的步骤。连接元件6优选固定在接触区域,并且执行超声波振动以进行焊接。然后,在每个接触区域上重复该操作以进行不同的焊接。如果连接元件6用作芯片2之间的电连接,则连接元件6由导电材料制作,该导电材料优选为金属,并且芯片的接触区域也由导电材料制作,该导电材料也优选为金属。焊接可以在芯片被切割之前进行,如图2所示,或者也可以在芯片被部分地切割(如图4和6所示)后,在除去临时基板之前(图7或9和10)。例如,也可以通过填充材料、等离子体、电解和阴极溅射等实现焊接。
在图7至9所示的另一个替换实施例中,芯片2集成在绝缘体上基板上。连接元件6的固定既不通过焊接也不通过粘结来进行。通过标准的切割或者干法蚀刻直到埋入绝缘体9而在有源基板8的层的位置使芯片2彼此分开。然后,诸如树脂的填充材料11填充如此形成在层8中的切割线。在图7至8所示的示例中,填充材料11填充位于两个芯片2之间的整个空间。然后,由设计为构成连接元件的连接材料形成的层12沉积在如此获得的芯片的组装体上(图8)。连接材料12可以是导电的或绝缘的,例如,诸如由氮化硅或氧化硅制作的无机物类型(mineral type),或者诸如由
Figure G2008800212154D00041
制作的有机类型。该沉积以传统的方式图案化,例如,通过光刻和等离子体蚀刻,以形成导电或绝缘的线(track),该线构成在由接触焊盘形成的容放区域4彼此连接芯片的连接元件6,如图9的俯视图所示。然后,通过适当的方法去除填充材料11,并且例如通过去除埋入绝缘体9,使芯片2从其支撑分开。
在图10和11所示的另一个实施例中,容放区域4由至少一个制作在芯片2中的凹陷形成,优选相邻于微电子部件。例如,该凹陷可以由凹槽或孔形成。多种形状的凹槽或孔都是可能的,特别是具有方形底部、V形、截头V形或者圆弧形状。凹陷的尺寸和形状优选根据连接元件6的特性选择。例如,对于直径为20至100μm的连接元件6,凹槽的深度和宽度可以在20至100μm的范围内变化。该凹陷可以通过任何适合的技术制作,例如,通过干法蚀刻、切割,或者通过例如以KOH溶液的湿法蚀刻。
如图10所示,线状的柔性连接元件6埋入每个凹槽中,凹槽为如图10所示的方形截面。如果连接元件6是导电的,则连接元件6优选涂覆有绝缘材料层13,以防止与基板1的任何短路。在相反的情况下,可以通过任何已知的方法进行凹槽的电绝缘。如果绝缘材料13是热固性聚合物,则优选采用热插入(hot insertion),以利于将连接元件6埋入并结合在凹槽中。
然后,芯片2照例从支撑层分开,并且其后仅通过连接元件6由柔性连接而彼此连接。
如图11所示,在芯片2与外面的电连接必须通过连接元件6进行的情况下,进行连接元件6和芯片2之间的电连接的附加步骤。元件6和芯片2的接触焊垫之间的电连接可以以导电线14的形式通过已知的方法例如喷墨、丝网印刷来制作,或者采用导电胶来制作。
在没有示出的替换实施例中,例如,电连接也可以通过沉积在凹槽内部的导电层实现。电连接也可以通过导电层制作,在形成用于埋入线的凹槽时,该导电层用作停止层(通过凹槽底部的电连接),或者该导电层在形成凹槽时被蚀刻(通过凹槽的边缘电连接)。所有这些实施例都具有在导电线和芯片之间传输电流的目的。
在图10和11中,与每个芯片相关的两个凹陷和两个连接元件6可以将一个芯片连接到两个不同的芯片。还可以每个芯片包括两个凹槽,然后两个连接元件连接每个芯片。于是,芯片包括附加凹槽。
该实施例可以与上述实施例类似的方式以包括临时膜的基板(例如,SOI基板)优选使用。然后,与前面一样,通过蚀刻埋入的电介质或者劈开基板,可以实现SOI基板的分开。
以通常的方式,形成在一个晶片且相同晶片上的大量芯片2可以通过至少一个柔性连接元件彼此串联连接,并且彼此分开。因此,获得能够以卷或卷形物储存并能按需切割的柔性串的形式的芯片的组装体。芯片的组装体优选涂覆有针对外部环境侵袭提供保护的聚合物或任何其他材料。
这种类型的芯片的组装体例如可以有利地用于装备带有RFID芯片的天线。因此,形成多个RFID芯片2,并且由柔性导电连接元件6连接。连接元件6的隔开两个芯片2的长度优选对应于天线的有用长度。然后,在两个芯片2之间进行连接元件6的分段(sectioning),以获得装备有它们的天线的RFID芯片。
本发明不限于上述实施例。具体地讲,来自不同基板的不同类型的芯片可以由单一的连接元件6连接,因此能够获得复杂的功能。此外,芯片的组装体的制造可以使用上述有关不同实施例中各特征的结合。
本发明不限于上述实施例,而是包括替换实施例(未示出),其中芯片的组装体不通过连接到芯片的组装体或大量芯片的单根线制造。在该实施例中,两个连续的芯片通过至少一个单独的线彼此连接。因此,单独的线连接到两个芯片,并且芯片的组装体的每个单独的线进行组装体的柔性连接。这样,由单独的线两两连接的芯片,这更容易实现芯片的组装体的功能,也就是,以所希望的顺序连接芯片而能获得所需的技术性能。于是,单一的凹槽在其各端部能容纳两种不同的单独的线,并且这些线的每一个都连接到不同的导电区域。
以通常的方式,可以从基板形成聚集所有芯片的单一套件或通过精细组织基板的不同芯片有利地形成的几种套件。

Claims (9)

1.一种通过柔性连接来机械互连的成套的芯片的制造方法,该方法包括:
-在基板上制造多个芯片,每个芯片都包括容放区域,
-通过连接元件串联连接所述芯片的所述容放区域,
-图案化基板,以将芯片以及基板的相应部分彼此分开,
该方法的特征在于,所述容放区域由凹槽形成,所述连接元件是埋入所述凹槽中的线,以实现所述柔性连接方式。
2.根据权利要求1所述的方法,其特征在于,所述连接元件是导电的。
3.根据权利要求1所述的方法,其特征在于,所述基板首先被固定到临时支撑,该方法包括这样的步骤:
在所述容放区域串联连接前,在所述基板的位置部分地切割所述芯片,在分离所述芯片时去除所述临时支撑。
4.根据权利要求3所述的方法,其特征在于,所述临时支撑是形成在所述基板的相对于所述芯片的表面上的固定膜。
5.根据权利要求3所述的方法,其特征在于,所述基板是绝缘体上基板,该绝缘体上基板包括首先被固定到临时支撑的有源基板,所述临时支撑包括埋入绝缘体和支撑基板,该埋入绝缘体设置在有源基板和支撑基板之间,通过去除该埋入绝缘体而分离所述芯片。
6.根据权利要求1所述的方法,其特征在于,所述凹槽包括方形、V形或圆弧形状。
7.根据权利要求1所述的方法,其特征在于,在所述芯片上形成附加凹槽,两个连接元件连接每个芯片。
8.根据权利要求1所述的方法,其特征在于,所述成套的芯片形成卷。
9.根据权利要求1所述的方法,其特征在于,两个连续芯片由单独的线连接。
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Families Citing this family (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2937464B1 (fr) 2008-10-21 2011-02-25 Commissariat Energie Atomique Assemblage d'une puce microelectronique a rainure avec un element filaire sous forme de toron et procede d'assemblage
FR2945151B1 (fr) 2009-04-30 2011-04-29 Commissariat Energie Atomique Procede de fixation d'un composant electronique sur un produit
JP5281965B2 (ja) * 2009-06-23 2013-09-04 日立Geニュークリア・エナジー株式会社 Icタグケーブル用芯線、icタグケーブル、icタグケーブルの位置検出システム及び検出方法
US8471387B2 (en) * 2010-05-12 2013-06-25 Monolithe Semiconductor Inc. Extendable network structure
FR2961949B1 (fr) 2010-06-24 2012-08-03 Commissariat Energie Atomique Elements a puce assembles sur des fils presentant une amorce de rupture
FR2961947B1 (fr) 2010-06-24 2013-03-15 Commissariat Energie Atomique Incorporation d'elements a puce dans un fil guipe
CA2818301A1 (en) * 2010-11-22 2012-05-31 Senseair Ab Method for the wafer-level integration of shape memory alloy wires
JP5820696B2 (ja) * 2011-11-07 2015-11-24 新電元工業株式会社 半導体装置の製造方法及び半導体装置の製造用治具
DE102011120250B4 (de) 2011-12-05 2023-05-04 Volkswagen Aktiengesellschaft Telefonantennenkoppelplatte für ein Fahrzeug
FR2986372B1 (fr) * 2012-01-31 2014-02-28 Commissariat Energie Atomique Procede d'assemblage d'un element a puce micro-electronique sur un element filaire, installation permettant de realiser l'assemblage
US8927338B1 (en) 2013-06-13 2015-01-06 International Business Machines Corporation Flexible, stretchable electronic devices
US9231327B1 (en) 2013-08-27 2016-01-05 Flextronics Ap, Llc Electronic circuit slidable interconnect
US9674949B1 (en) 2013-08-27 2017-06-06 Flextronics Ap, Llc Method of making stretchable interconnect using magnet wires
US9801277B1 (en) 2013-08-27 2017-10-24 Flextronics Ap, Llc Bellows interconnect
US10015880B1 (en) 2013-12-09 2018-07-03 Multek Technologies Ltd. Rip stop on flex and rigid flex circuits
US9338915B1 (en) 2013-12-09 2016-05-10 Flextronics Ap, Llc Method of attaching electronic module on fabrics by stitching plated through holes
DE102015219190A1 (de) 2015-10-05 2017-04-06 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zum Herstellen eines elektronischen Bauelements und elektronisches Bauelement
FR3042203B1 (fr) 2015-10-12 2018-06-22 Commissariat A L'energie Atomique Et Aux Energies Alternatives Incorporation d'elements a puce dans un fil guipe.
FR3058579B1 (fr) * 2016-11-07 2018-11-16 Commissariat A L'energie Atomique Et Aux Energies Alternatives Dispositif d'emission reception radiofrequence
FR3062515B1 (fr) 2017-01-30 2019-11-01 Primo1D Procede d'insertion d'un fil dans une rainure d'une puce de semi-conducteur, et equipement pour la mise en œuvre d’un tel procede.
FR3065578B1 (fr) 2017-04-19 2019-05-03 Primo1D Procede d'assemblage d'une puce microelectronique sur un element filaire
FR3065579B1 (fr) 2017-04-19 2019-05-03 Primo1D Dispositif d'emission reception radiofrequence
RO133013B1 (ro) * 2017-06-16 2020-09-30 Promar Textil Industries S.R.L. Etichetă rfid pentru medii agresive cu cuplaj inductiv în buclă dublă
FR3069962B1 (fr) 2017-08-01 2020-09-25 Primo1D Antenne a plaque pour coupler un terminal d’emission-reception a un dispositif rfid
FR3078980B1 (fr) 2018-03-14 2021-06-11 Primo1D Fil guipe compose d’une ame principale et d’au moins un fils de couverture et comprenant au moins un element filaire conducteur relie electriquement a au moins une puce electronique
US10438895B1 (en) 2018-06-08 2019-10-08 American Semiconductor, Inc. Flexible micro-module
US10970613B1 (en) 2019-09-18 2021-04-06 Sensormatic Electronics, LLC Systems and methods for providing tags adapted to be incorporated with or in items
US11443160B2 (en) 2019-09-18 2022-09-13 Sensormatic Electronics, LLC Systems and methods for laser tuning and attaching RFID tags to products
FR3103630B1 (fr) 2019-11-22 2022-06-03 Primo1D Puce fonctionnelle adaptee pour etre assemblee a des elements filaires, et procede de fabrication d’une telle puce
US11055588B2 (en) 2019-11-27 2021-07-06 Sensormatic Electronics, LLC Flexible water-resistant sensor tag
US11694057B2 (en) 2020-01-03 2023-07-04 Sensormatic Electronics, LLC RFID tag and method of making same
CN111394854B (zh) * 2020-02-26 2022-07-12 东华大学 一种法向模螺旋偶极子电子标签纱的制作方法
EP3923195B1 (fr) * 2020-06-11 2023-08-23 Primo1D Etiquette électronique présentant un caractère souple et déformable
FR3119944B1 (fr) 2021-02-15 2023-02-10 Primo1D Dispositif d'émission-réception radiofréquence utilisant une antenne composée d’un fil textile et d’un ruban conducteur et étiquette électronique associée
US11755874B2 (en) 2021-03-03 2023-09-12 Sensormatic Electronics, LLC Methods and systems for heat applied sensor tag
FR3131253B1 (fr) 2021-12-23 2024-01-05 Primo1D Pneumatique équipée d’un dispositif d'émission-réception radiofréquence
US11869324B2 (en) 2021-12-23 2024-01-09 Sensormatic Electronics, LLC Securing a security tag into an article

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003021679A3 (en) * 2001-09-03 2003-11-27 Nat Microelectronic Res Ct Uni Integrated circuit structure and a method of making an integrated circuit structure
WO2005048302A2 (en) * 2003-11-05 2005-05-26 California Institute Of Technology Method for integrating pre-fabricated chip structures into functional electronic systems

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0461247A (ja) * 1990-06-28 1992-02-27 Narumi China Corp クワッド・フラット・パッケージ
DE19908172A1 (de) 1999-02-25 2000-08-31 Joergen Brosow Aufklebeplombe
NO311317B1 (no) * 1999-04-30 2001-11-12 Thin Film Electronics Asa Apparat omfattende elektroniske og/eller optoelektroniske kretser samt fremgangsmåte til å realisere og/eller integrerekretser av denne art i apparatet
US6743982B2 (en) * 2000-11-29 2004-06-01 Xerox Corporation Stretchable interconnects using stress gradient films
JP4433629B2 (ja) * 2001-03-13 2010-03-17 株式会社日立製作所 半導体装置及びその製造方法
GB0108950D0 (en) * 2001-04-10 2001-05-30 Leonard Philip N Personal computer systems
DE10122324A1 (de) * 2001-05-08 2002-11-14 Philips Corp Intellectual Pty Flexible integrierte monolithische Schaltung
WO2003060986A2 (en) * 2002-01-11 2003-07-24 The Pennsylvania State University Method of forming a removable support with a sacrificial layers and of transferring devices
EP1630728B1 (en) 2003-05-28 2007-11-07 Hitachi, Ltd. Radio recognition semiconductor device and its manufacturing method
JP2005051144A (ja) * 2003-07-31 2005-02-24 Shinko Electric Ind Co Ltd 半導体装置の製造方法
US7629667B2 (en) * 2003-08-28 2009-12-08 Hitachi, Ltd. Semiconductor device including an on-chip coil antenna formed on a device layer which is formed on an oxide film layer
CN1263131C (zh) * 2003-10-08 2006-07-05 复旦大学 射频标签芯片与片外天线阻抗匹配片内自动调节的电路
JP4291209B2 (ja) * 2004-05-20 2009-07-08 エルピーダメモリ株式会社 半導体装置の製造方法
KR101197046B1 (ko) * 2005-01-26 2012-11-06 삼성디스플레이 주식회사 발광다이오드를 사용하는 2차원 광원 및 이를 이용한 액정표시 장치
JP4867915B2 (ja) * 2005-02-16 2012-02-01 株式会社日立製作所 電子タグチップ
CA2600055A1 (en) * 2005-02-23 2006-08-31 Textilma Ag Transponder-thread and application thereof
US20060285480A1 (en) * 2005-06-21 2006-12-21 Janofsky Eric B Wireless local area network communications module and integrated chip package
JP5044984B2 (ja) * 2005-06-29 2012-10-10 大日本印刷株式会社 Icタグ、icタグの製造方法、およびicタグの製造装置、並びに、インターポーザ、インターポーザの製造方法、およびインターポーザの製造装置
US7621043B2 (en) * 2005-11-02 2009-11-24 Checkpoint Systems, Inc. Device for making an in-mold circuit
DE602007007201D1 (de) * 2006-04-07 2010-07-29 Koninkl Philips Electronics Nv Elastisch verformbare integrierte schaltung
JP4796628B2 (ja) * 2006-06-02 2011-10-19 株式会社日立製作所 Icタグ用インレットの製造方法
WO2008081699A1 (ja) * 2006-12-28 2008-07-10 Philtech Inc. 基体シート
US8154456B2 (en) * 2008-05-22 2012-04-10 Philtech Inc. RF powder-containing base

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003021679A3 (en) * 2001-09-03 2003-11-27 Nat Microelectronic Res Ct Uni Integrated circuit structure and a method of making an integrated circuit structure
WO2005048302A2 (en) * 2003-11-05 2005-05-26 California Institute Of Technology Method for integrating pre-fabricated chip structures into functional electronic systems

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JP5405457B2 (ja) 2014-02-05
CN101711430A (zh) 2010-05-19
US20100245182A1 (en) 2010-09-30
JP2010530584A (ja) 2010-09-09
JP2010530630A (ja) 2010-09-09
DE602008003224D1 (de) 2010-12-09
EP2158605B1 (fr) 2010-10-27
US20100136746A1 (en) 2010-06-03
CN101681887A (zh) 2010-03-24
EP2158605A2 (fr) 2010-03-03
WO2009013409A3 (fr) 2009-05-22
FR2917895A1 (fr) 2008-12-26
JP5385900B2 (ja) 2014-01-08
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ATE486367T1 (de) 2010-11-15
CN101711430B (zh) 2013-10-16
US8258011B2 (en) 2012-09-04
WO2009013409A2 (fr) 2009-01-29
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US8471773B2 (en) 2013-06-25

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