CN101587847A - 利用pcb基板进行垂直互连的多芯片组件封装方法 - Google Patents
利用pcb基板进行垂直互连的多芯片组件封装方法 Download PDFInfo
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Abstract
本发明公开了一种利用PCB基板进行垂直互连的多芯片组件封装方法,其特征在于:包括以下步骤:1)在叠层PCB基板侧壁形成一个或多个有电路图形布线的侧壁腔体,且侧壁腔体内具有侧壁焊盘;在叠层PCB基板的上表面形成一个平面或形成具有一个或多个表面腔体的平面,在所述平面上或腔体内具有用于表贴芯片的电路布线;2)在叠层PCB基板的侧壁或侧壁腔体内垂直贴装芯片,将贴装好的芯片用环氧树脂胶水进行保护;3)在叠层PCB基板的上表面的平面或腔体内贴装芯片,将贴装好的芯片用环氧树脂胶水进行保护。本发明是基于叠层PCB基板将IC或MEMS等芯片进行垂直贴片实现多芯片组件封装,能够使芯片测量垂直方向上的物理量。
Description
技术领域
本发明涉及一种多芯片组件的三维封装方法,更确切地说是利用印制线路板(Printed Circuit Board,PCB)基板实现多芯片组件高密度封装方法,属于电子器件封装领域。
背景技术
随着微电子技术的飞速发展,电子元器件封装的开始向高密度、轻量化、多功能等方向发展。多芯片三维封装成为这一先进封装的趋势,多芯片组件封装(Multi-Chip Module,MGM)是将多个类型如IC、MEMS等芯片放置在一个封装体内,从而得到更高的封装密度。其中,叠层多芯片组件(MCM-L)是一种基于PCB基板的多芯片封装技术,利用多层的PCB基板布线实现多个芯片之间的互连。
微机电系统(Micro Electro Mechanical Systems,MEM)技术是将整个系统集成在单个芯片上实现各种物理、化学和生物的传感器和执行器。其中部分传感器是测量三个方向(X、Y、Z)的物理量变化,如三轴加速度计、三轴磁传感器等。除了在芯片上进行集成系统(System On Chip,SOC)直接测量三个方向的物理量外,还可以将传感器设计为单方向测量的芯片,通过进行三维的封装将系统集成在一起(System in Package,SIP)。二维平面的芯片表贴技术(SMT)已经非常成熟,但是三维芯片封装尤其是将芯片进行竖直贴片封装仍是新的挑战。
发明内容
本发明所要解决的技术问题是提供一种三维多芯片组件的封装方法,可以实现一个或多个芯片在垂直方向的互连。
为解决上述技术问题,本发明提供一种利用PCB基板进行垂直互连的多芯片组件封装方法。本发明以多层PCB板作为封装基板,利用PCB板制作过程中的多层布线、层压和钻孔技术在封装基板的侧壁形成有图形布线的腔体或平面,用于放置一个或多个垂直方向的芯片,实现与平面表贴芯片的互连,最终形成多芯片组件封装模块。
本发明的利用PCB基板进行垂直互连的多芯片组件封装方法,其特征在于:包括以下步骤:
1)在叠层PCB基板侧壁形成一个或多个有电路图形布线的侧壁腔体,且侧壁腔体内具有用于贴装芯片的布线的侧壁焊盘;在叠层PCB基板的上表面形成一个平面或形成具有一个或多个表面腔体的平面,在所述平面上或腔体内具有用于表贴芯片的电路布线,所述叠层PCB基板的侧面与上表面相垂直;
2)在叠层PCB基板的侧壁或侧壁腔体内垂直贴装芯片,将贴装好的芯片用环氧树脂胶水进行保护;
3)在叠层PCB基板的上表面的平面或腔体内贴装芯片,将贴装好的芯片用环氧树脂胶水进行保护。
还包括在PCB板底部的金属化焊盘处进行SMT表贴,或在PCB板底部移植无铅焊球的步骤。
所述芯片为IC或MEMS芯片。
本发明所采用的叠层PCB基板的制备过程为:每层PCB板层布线后,对用于隔离焊盘的PCB板进行预打孔,将PCB板层压在一起,在侧壁需要金属化的位置打孔,孔径小于预打孔的孔径,将孔内金属化形成金属化焊盘。
在所述步骤2)中,可利用倒装焊实现芯片的倒装式垂直表贴,具体步骤为:
(a)将叠层PCB基板垂直放置,使叠层PCB基板侧壁腔体水平以方便芯片的表贴;
(b)在侧壁腔体内侧壁焊盘图形上均匀涂覆无铅助焊剂;
(c)将长有凸点的芯片倒装焊在已涂好助焊剂的焊盘上;
(d)将表贴好芯片的PCB基板按照高温回流曲线进行回流固化;回流固化曲线峰值温度比凸点金属的熔点高30℃。
(e)在已表贴回流后的芯片底部填充底充料,加热固化;
(f)在侧壁腔体内填充包封胶,加热固化后,用于保护完成倒装焊的芯片。
在所述步骤2)中,可采用引线键合式完成芯片的垂直表贴,具体步骤为:
(a)将PCB基板垂直放置,使PCB基板侧壁腔体水平以方便芯片的表贴;
(b)在侧壁或侧壁腔体内放置贴片胶,贴片胶可以是导电胶或者导热胶;
(c)在侧壁或侧壁腔体内表贴芯片,将贴片胶高温固化;
(d)将PCB基板加热,采用引线键合的方式实现芯片与PCB板之间的电气连接;
(e)在侧壁或侧壁腔体内填充包封胶,加热固化后,用于保护完成引线键合的芯片。
在所述步骤3)中,可利用倒装焊实现多个芯片的倒装式贴装,具体步骤为:
(a)将PCB基板水平放置,以便于表面的多个芯片的表贴;
(b)在PCB基板表面焊盘图形上均匀涂覆无铅助焊剂;
(c)将长有凸点的芯片倒装焊在已涂好助焊剂的焊盘上;
(d)将表贴好芯片的PCB基板按照高温回流曲线进行回流固化;回流固化曲线峰值温度比凸点金属的熔点高30℃;
(e)在已表贴回流后的芯片底部填充底充料,加热固化;
(f)在PCB基板表面采用围堰填充的方式对芯片进行包封,加热固化,用于保护完成倒装焊的芯片。
在所述步骤3)中,可利用引线键合式完成芯片的表贴,具体步骤为:
(a)将PCB基板水平放置,以便于表面的多个芯片的表贴;
(b)在表面或表面腔体内放置贴片胶,贴片胶可以是导电胶或者导热胶;
(c)在表面或表面腔体内表贴芯片,将贴片胶高温固化;
(d)将PCB基板加热,采用引线键合的方式实现芯片与PCB板之间的电气连接。
(f)在PCB基板表面采用围堰填充的方式对芯片进行包封,加热固化后,用于保护完成倒装焊的芯片。
本发明所达到的有益效果:
本发明是基于叠层PCB基板将IC或MEMS等芯片进行垂直贴片实现多芯片组件封装,能够使芯片测量垂直方向上的物理量。
附图说明
图1为本发明的叠层PCB基板的结构示意图;
图2A-2E为本发明第一实施例的制作流程示意图;
图3A-3D为本发明第二实施例的制作流程示意图。
具体实施方式
为使对本发明的目的、封装结构及其特征有进一步的了解,配合附图详细说明如下:
图1为本发明的叠层PCB基板的结构示意图;
在叠层PCB基板侧边形成一个或多个有电路图形布线的腔体,且侧壁腔体12内具有用于贴装芯片的布线的侧壁焊盘16;在叠层PCB基板的上表面形成一个平面或形成具有一个或多个表面腔体11的平面,在所述平面上或腔体内具有用于表贴芯片的电路布线13,叠层PCB基板的侧面与上表面相垂直,PCB板层压在一起,并通过通孔14形成电气连接,底部具有底部焊盘15。
图2A-2E为本发明第一实施例的制作流程示意图;
图3A-3D为本发明第二实施例的制作流程示意图。
第一实施例:
在图2A中,首先将叠层PCB基板垂直放置并固定好,使侧壁上表面朝上,便于芯片表贴,侧壁腔体12内焊盘图形上均匀涂覆无铅助焊剂,将IC或MEMS芯片倒装在侧壁焊盘16上,将表贴好芯片的PCB基板按照高温回流曲线进行回流固化,回流固化曲线峰值温度比凸点22金属的熔点高30℃。此时,侧壁芯片21与叠层PCB板形成良好的电气互连。
在图2B中,在已倒装焊好的侧壁芯片下填充底充胶24,以提高模块的长期可靠性。在侧壁腔体12里注入环氧树脂23胶水,以保护垂直互连的芯片。
在图2C中,叠层PCB板水平放置,在表面焊盘处均匀涂覆无铅助焊剂,将一个或多个表面芯片25倒装在基板表面,将表贴好芯片的叠基板按照高温回流曲线进行回流固化。表面芯片与侧壁芯片形成电气互连后组成系统模块。
在图2D中,在平面芯片下填充底充胶24提高芯片的可靠性,将整个模块采用环氧树脂23胶水进行封装。
在图2E中,将组装好模块倒置固定好,在底部焊盘上均匀涂覆助焊剂,移植无铅焊球26并回流,在底部形成焊球排列,便于器件的下一级组装。
第二实施例:
本实施例是将IC或MEMS芯片采用引线键合的方式互连形成多芯片组件模块。
在图3A中,将叠层PCB基板垂直放置并固定好,使侧壁腔体上表面朝上,在侧壁腔体内放置贴片胶32,将垂直芯片上表面朝上表贴在侧壁腔体12内,加热固化贴片胶将芯片固定,利用引线31采用引线键合的方式将芯片上的焊盘与侧壁腔体12内金属化的焊盘16互连,形成良好的电气连接。
在图3B中,为保护引线键合和提高模块的长期可靠性,在侧壁腔体里注入环氧树脂23胶水并固化。
在图3C中,将叠层PCB板水平放置,在叠层PCB上表面放置贴片胶32,将一个或多个表面芯片25表贴在基板表面,加热固化贴片胶32将芯片固定,采用引线键合的方式将芯片上的焊盘与上表面腔体上金属化的焊盘互连,多个芯片与叠层基板形成电气互连。
在图3D中,采用环氧树脂23胶水保护上表面表贴的表面芯片25和引线31。
本发明按照一个典型实施例进行了说明,应当理解,上述实施例不以任何形式限定本发明,凡采用权利要求范围内的多芯片组件封装方法均落在本发明专利的保护范围之内。
Claims (10)
1.一种利用PCB基板进行垂直互连的多芯片组件封装方法,其特征在于:包括以下步骤:
1)在叠层PCB基板侧壁形成一个或多个有电路图形布线的侧壁腔体,且侧壁腔体内具有用于贴装芯片的布线的侧壁焊盘;在叠层PCB基板的上表面形成一个平面或形成具有一个或多个表面腔体的平面,在所述平面上或腔体内具有用于表贴芯片的电路布线,所述叠层PCB基板的侧面与上表面相垂直;
2)在叠层PCB基板的侧壁或侧壁腔体内垂直贴装芯片,将贴装好的芯片用环氧树脂胶水进行保护;
3)在叠层PCB基板的上表面的平面或腔体内贴装芯片,将贴装好的芯片用环氧树脂胶水进行保护。
2.根据权利要求1所述的利用PCB基板进行垂直互连的多芯片组件封装方法,其特征在于:还包括在PCB板底部的金属化焊盘处进行SMT表贴或在PCB板底部移植无铅焊球的步骤。
3.根据权利要求1或2所述的利用PCB基板进行垂直互连的多芯片组件封装方法,其特征在于:所述叠层PCB基板的制备过程为:每层PCB板层布线后,对用于隔离焊盘的PCB板进行预打孔,将PCB板层压在一起,在侧壁需要金属化的位置打孔,孔径小于预打孔的孔径,将孔内金属化形成金属化焊盘。
4.根据权利要求1或2所述的利用PCB基板进行垂直互连的多芯片组件封装方法,其特征在于:在所述步骤2)中,利用倒装焊实现芯片的倒装式垂直表贴,具体步骤为:
(a)将叠层PCB基板垂直放置,使叠层PCB基板侧壁腔体水平以方便芯片的表贴;
(b)在侧壁腔体内侧壁焊盘图形上均匀涂覆无铅助焊剂;
(c)将长有凸点的芯片倒装焊在已涂好助焊剂的焊盘上;
(d)将表贴好芯片的PCB基板按照高温回流曲线进行回流固化;
(e)在已表贴回流后的芯片底部填充底充料,加热固化;
(f)在侧壁腔体内填充包封胶,加热固化。
5.根据权利要求4所述的利用PCB基板进行垂直互连的多芯片组件封装方法,其特征在于:在步骤(d)中,回流固化曲线峰值温度比凸点金属的熔点高30℃。
6.根据权利要求1或2所述的利用PCB基板进行垂直互连的多芯片组件封装方法,其特征在于:在所述步骤2)中,采用引线键合式完成芯片的垂直表贴,具体步骤为:
(a)将PCB基板垂直放置,使PCB基板侧壁腔体水平以方便芯片的表贴;
(b)在侧壁或侧壁腔体内放置贴片胶,贴片胶可以是导电胶或者导热胶;
(c)在侧壁或侧壁腔体内表贴芯片,将贴片胶高温固化;
(d)将PCB基板加热,采用引线键合的方式实现芯片与PCB板之间的电气连接;
(e)在侧壁或侧壁腔体内填充包封胶,加热固化。
7.根据权利要求1或2所述的利用PCB基板进行垂直互连的多芯片组件封装方法,其特征在于:在所述步骤3)中,利用倒装焊实现多个芯片的倒装式贴装,具体步骤为:
(a)将PCB基板水平放置,以便于表面的多个芯片的表贴;
(b)在PCB基板表面焊盘图形上均匀涂覆无铅助焊剂;
(c)将长有凸点的芯片倒装焊在已涂好助焊剂的焊盘上;
(d)将表贴好芯片的PCB基板按照高温回流曲线进行回流固化;
(e)在已表贴回流后的芯片底部填充底充料,加热固化;
(f)在PCB基板表面采用围堰填充的方式对芯片进行包封,加热固化,用于保护完成倒装焊的芯片。
8.根据权利要求7所述的利用PCB基板进行垂直互连的多芯片组件封装方法,其特征在于:在所述步骤(d)中,回流固化曲线峰值温度比凸点金属的熔点高30℃。
9.根据权利要求1或2所述的利用PCB基板进行垂直互连的多芯片组件封装方法,其特征在于:在所述步骤3)中,利用引线键合式完成芯片的表贴,具体步骤为:
(a)将PCB基板水平放置,以便于表面的多个芯片的表贴;
(b)在表面或表面腔体内放置贴片胶,贴片胶可以是导电胶或者导热胶;
(c)在表面或表面腔体内表贴芯片,将贴片胶高温固化;
(d)将PCB基板加热,采用引线键合的方式实现芯片与PCB板之间的电气连接;
(f)在PCB基板表面采用围堰填充的方式对芯片进行包封,加热固化后,用于保护完成倒装焊的芯片。
10.根据权利要求1或2所述的利用PCB基板进行垂直互连的多芯片组件封装方法,其特征在于:所述芯片为IC或MEMS芯片。
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