CN101573789B - 包括其凸块形成位点上的焊料帽的微电子管芯及其制造方法 - Google Patents

包括其凸块形成位点上的焊料帽的微电子管芯及其制造方法 Download PDF

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CN101573789B
CN101573789B CN200780048516.1A CN200780048516A CN101573789B CN 101573789 B CN101573789 B CN 101573789B CN 200780048516 A CN200780048516 A CN 200780048516A CN 101573789 B CN101573789 B CN 101573789B
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solder
substrate
projection
caps
tube core
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CN101573789A (zh
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M·庞
C·古鲁默西
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Intel Corp
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Intel Corp
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Abstract

一种形成微电子封装的方法和根据该方法形成的封装。所述方法包括：提供微电子基板，所述微电子基板包括结合焊盘和相应结合焊盘上的焊料凸块；提供其上包括凸块形成位点的微电子管芯；在所述凸块形成位点上提供焊料帽；将所述管芯定位到所述基板上以形成管芯‑基板组合，定位包括将所述管芯上的相应各个焊料帽放置为与所述基板上的对应的焊料凸块对准；以及通过使所述管芯‑基板组合回流以由所述焊料帽和焊料凸块形成焊点，从而将所述管芯结合到所述基板。

Description

包括其凸块形成位点上的焊料帽的微电子管芯及其制造方法
技术领域
本发明的实施例总体上涉及向基板安装微电子管芯的方法以及根据这种方法形成的封装。
背景技术
向基板安装微电子管芯或IC芯片的公知方法之一包括倒装芯片封装。基板允许封入管芯，同时将电源和信号往返于管芯引导。倒装芯片封装包括在被称为“凸块形成(bumping)”的工艺中使用附着到基板结合焊盘的焊料凸块阵列。焊料凸块阵列适于和诸如管芯的接收部件上的分立凸块形成位点(bumping site)配合。在本申请的语境中“凸块形成位点”表示微电子部件(例如管芯或基板)的结合焊盘上包括一个或多个金属化层的位点，该凸块形成位点适于通过例如焊接连接将微电子部件与另一微电子部件实现电气和机械结合。如本文所使用的凸块形成位点的范例包括公知的ENIG焊盘，其包括阻挡层，该阻挡层包括例如被Au层覆盖的Ni层。在配合管芯和基板之后可以随后对封装加热，以部分液化或“回流”凸块，从而在相应的凸块形成位点和连接盘上形成相应焊点(solder joint)形式的电气和机械连接。经常把这种技术称为“倒装芯片”，因为通常将焊料凸块固定到基板上，其中，然后“翻转”管芯和相关凸块形成位点以将管芯固定到基板。
关于这一点，参考图1和2，其示出了将管芯倒装芯片安装到基板上以形成微电子封装期间的各阶段。如图1所示，示出了基板102的一部分，其包括结合焊盘104，结合焊盘上形成有焊料凸块106，包括小体积焊料凸块106’。众所周知，诸如凸块106’的小体积焊料凸块可能源于若干情况，例如在向基板上印刷焊料的过程期间焊料掩模撤离(lift off)。如图1进一步所示，管芯108的一部分被示为包括其上的凸块形成位点110。现在参考图2，常规的倒装芯片安装工艺涉及放置相应的基板焊料凸块106，与凸块形成位点110中的相应位点对准并接触，并将这样形成的组件暴露于高温，以便使焊料回流。在回流期间，与凸块形成位点110接触的焊料凸块106/106’熔化，形成熔化的焊料部分112。不利地，一些熔化的焊料部分112可能被对应的凸块形成位点110过分吸引(wick)上去，可能带来焊料吸引开路(SWO)的风险，例如如焊料部分112’的情况所示。在这种情况下，在焊料固化之后，不会在SWO的位置处形成有效的焊点。当基板结合焊盘104中存在诸如焊料凸块106’的小体积焊料凸块时，在固化之后，这种焊料，例如焊料部分112″所示的焊料可能会导致脆弱焊点的形成，最终可能导致焊点破裂和电迁移。另一个通常所观察到的与LVSB相关的问题是焊点可能不会首先形成，导致组件故障。
现有技术未能提供没有通常与焊料提升(lift-up)相关联的问题的、用于向基板安装管芯的可靠方法，这些问题例如是焊点缺失、小体积焊点和焊点破裂。
附图说明
图1和2示出了根据现有技术将管芯倒装芯片安装到基板上的各阶段；
图3-5示出了根据实施例将管芯倒装芯片安装到基板上的各阶段；以及
图6是包括诸如图5的封装的封装的系统的示意图。
为了说明的简单和清晰，附图中的元件未必一定按照比例绘制。例如，为了清晰，图中一些元件的尺度可能被相对于其他元件夸大。在认为适当的时候，在各图中重复使用附图标记以表示对应或类似元件。
具体实施方式
在以下详细描述中，公开了一种形成微电子管芯的方法、根据该方法形成的微电子管芯以及形成包括该管芯的微电子封装的方法。参考附图，附图以例示方式示出了可以实践本发明的具体实施例。要理解的是，可以存在其他实施例，且可以做出其他结构变化而不脱离本发明的范围和精神。
如本文所使用的术语“上”、“之上”、“之下”和“相邻”表示一个元件相对于其他元件的位置。这样一来，设置于第二元件上、之上或之下的第一元件可以直接与第二元件接触或其可以包括一个或多个中间元件。此外，设置在第二元件旁边或与其相邻的第一元件可以直接与第二元件接触或其可以包括一个或多个中间元件。
在一个实施例中，公开了一种向基板上安装管芯的方法。在另一个实施例中，公开了一种根据该方法形成的微电子封装。下文中将参考图3-6讨论该实施例和其他实施例的各方面，其中图3-5示出了将管芯倒装芯片安装到基板以形成微电子封装期间的各阶段。然而，不能将附图理解为限制性的，因为附图是用于解释和理解的目的。
首先参考图3，一种形成微电子封装的方法实施例包括提供微电子基板202，图3示出了其一部分。“微电子基板”在本申请的语境中表示已经向其上提供了微电子导电图案的基板。基板可以包括已完成微电子器件的基板，或适于被进一步处理以形成微电子器件的基板，或诸如印刷线路板的包括适于提供微电子部件间互连的导电图案的基板。例如，该基板可以是有机建造基板、陶瓷基板或半导体基板，例如微电子管芯的硅基板。图3中示出的基板202的部分包括结合焊盘204，结合焊盘204具有形成于其上的焊料凸块206，例如包括小体积焊料凸块206’。如前所述，诸如凸块206’的小体积焊料凸块可能源于若干情况，例如在向基板上印刷焊料的过程期间焊料掩模撤离。在焊料中存在的过量助熔剂(flux)可能干扰焊料润湿行为并在去除助熔剂(de-fluxing)之后导致焊料缺失时，也可能由焊料回流诱发的故障导致LVAB。LVSB的另一种可能根源可能涉及一个或多个凹陷阻焊剂开口的几何不规则性。在这种情况下，大于标称值的阻焊剂开口可能诱发LVSB，因为在实际提供较少焊料体积的地方将需要更大的焊料体积。通过将小体积焊料凸块206’显示为存在于基板202上，本说明书并不表示将提供小体积焊料凸块206’视为实施例的一部分，而是要表示即使在存在诸如焊料凸块206’的小体积焊料凸块的情况下实施例也为倒装芯片安装提供了优点，如下文将要结合图4和5所述。基板结合焊盘204可以包括基板上任何公知类型的表面加工(surface finish)，例如，在包括金和镍层的凸块金属化之下，如本领域的技术人员所公知的。要指出的是，实施例不限于如结合焊盘206的情况那样使用具有均匀尺寸和间距的结合焊盘的基板，而是在它们的范围内包括提供不同或不均匀尺寸和间距的结合焊盘。该基板上还可以包括阻焊剂层(现在示出)，如所公知的，亦即可主要作为基板导电图案保护膜而提供的施加到基板表面上特定区域的抗热涂层材料。
如图3进一步所示，一种方法实施例包括提供微电子管芯，例如管芯208，图3中示出了其一部分。在实施例语境中“微电子管芯”表示管芯基板，其上形成有微电路，且其可以包括如下文定义的凸块形成位点。管芯基板的范例包括晶片等，晶片包括硅(Si)、砷化镓(GaAs)、磷化铟(InP)及其衍生物。使用各种技术，例如分层、掺杂、掩蔽和蚀刻来构建数千乃至数百万个晶体管、电阻器等形式的微观集成电路(IC)器件作为管芯的一部分。将IC器件互连以界定执行特定功能的特定电子电路，特定功能例如为微处理器或计算机存储器的功能。现在仍参考图3，管芯基板211包括其上的凸块形成位点210。凸块形成位点210可以包括如本领域公知的金属化层，例如包括例如Cu、其上的例如Au的稳定层的导电层。任选地，凸块形成位点210还可以包括阻挡层，例如Au层顶部的Ni层，或根据应用需要的任何其他金属层(未示出)。如本领域技术人员所知，可以根据任一种公知的方法，例如通过无电镀或电解电镀提供凸块形成位点210中的层，例如Cu层、Ni层和Au层。
仍然参考图3，一种方法实施例还包括向凸块形成位点210上提供焊料帽214。焊料帽214可以由顺从性材料制成，例如基于Sn的材料，包括例如SnAg、SnCu或基本纯的Sn。用于焊料帽的材料最优选地包括Sn，更优选地为SnCu，其选择将根据应用的需要。可以将焊料帽材料的“顺从性”表达为它们的弹性模量。优选地，根据实施例，在可以想到将若干不同焊料材料用作焊料帽材料的情况下，可以基于这些焊料材料中的哪一种是该组中最顺从的，即，这些焊料材料中的哪一种具有该组中最低的弹性模量，来做出最终会使用哪一种焊料材料的选择。更加顺从的焊料帽会有助于减轻管芯应力，并且因此是优选的选择。可以根据任一种公知的沉积焊料的方法，例如，通过将焊料帽214电镀到凸块形成位点210上来提供焊料帽。提供焊料帽的其他方式处于实施例的范围之内，例如，印刷、电镀、离子/化学/气相沉积、撒布和放置。例如，可以将浆料形式的焊料帽丝网印刷或通过针型涂敷器撒布到凸块形成位点上。根据一个实施例，高度H至少为大约10微米。根据实施例，沉积到凸块形成位点210上的焊料帽214的体积会是用于管芯和基板之间来结合管芯和基板的最小预定焊料量(MPAS)的函数。如本领域技术人员所知，MPAS本身将是管芯和基板之间的最小必需间隙(MRG)的函数。如所周知，MRG又是若干不同因素的函数，若干不同因素例如包括基板上的结合焊盘。例如，焊盘直径可以确定需要多少焊料来润湿焊盘表面，然后，假设沉积的焊料量相同，较大的焊盘可能导致管芯和基板之间较小的分隔间隙，是否考虑在管芯和基板之间使用底填材料，如果适用的话，考虑使用的底填材料类型(例如毛细管或无流动型)，焊点的热-机械阻力和焊点的电迁移阻力。例如，在考虑使用包括填料的毛细管型底填材料，例如包括以其中的氧化硅颗粒作为填料的环氧树脂的底填材料时，本领域的技术人员将认识到，MRG大约为填料颗粒最大尺寸的两倍，以便当在管芯和基板之间撒布底填材料期间允许底填材料流动。从最小限度上说，根据实施例的MRG可以足以在管芯和基板之间建立热学、电气和机械可靠的焊点，如本领域技术人员所知，该焊点能经得起通常施加到封装的热循环和可靠性应力测试。要考虑的一个重要因素是要在例如CPU工作期间通过焊点泵送相当大电流密度时焊点的电迁移阻力。因此，根据实施例，优选较大的焊料体积而不是较小的焊料体积。根据一个实施例，提供焊料帽可以包括提供每个焊料帽，使得被提供的焊料帽的体积和对应一个焊料凸块的体积的组合体积等于或大于MPAS。不过，在确定以上条件时，将假设对应一个焊料凸块的体积不对应于诸如凸块206’的小体积焊料凸块的体积，而是对应于考虑用于基板的每个结合焊盘上的焊料凸块的体积。
现在参考图4，一种方法实施例包括将管芯208定位到基板202上以形成管芯-基板组合205，并使管芯-基板组合205经受回流温度，例如大约230摄氏度到大约260摄氏度的温度，以使焊料凸块206和焊料帽214回流，以由其形成焊点220(图5)。在回流期间，与凸块形成位点210上的焊料帽214接触的焊料凸块206/206’熔化，形成熔化的焊料部分212，其包括焊料凸块206/206’和焊料帽214的组合。具体而言，凸块206’与对应焊料帽的组合可以产生如图所示的焊料部分212’。部分地由于在焊料熔化期间存在焊料帽而使表面张力最小化而带来的焊料帽与焊料凸块改善的润湿性(与凸块形成位点和焊料凸块的润湿性相对照)往往会比根据现有技术融合凸块形成位点与焊料凸块容易得多地融合焊料帽和焊料凸块。如图4中由焊料部分212所示，优先在焊料帽214和焊料凸块206/206’之间进行浸润往往会限制焊料被吸引到凸块形成位点210的程度，并往往至少部分地补偿诸如凸块206’的小体积焊料凸块，从而减小焊料吸引开路、焊料破裂、电迁移或小体积焊料凸块故障的风险。此外，焊料帽214的存在会获得更高的焊点，并因此获得比单独利用焊料凸块206/206’所实现的管芯208和基板202之间的间隙高度更大的间隙高度。结果，会获得更加顺从的焊点，因为更高的焊点将具有更大能力吸收应力，并因此被视为比其较矮对应物更加顺从，表示在电迁移阻力方面其具有更好的焊点可靠性和性能。如所周知，电迁移阻力是指在电流下焊点仍具有电功能的小时数。作为回流的结果，熔化的焊料帽214和焊料凸块206/206’的固化会产生如图5所示的焊点220。
现在参考图5，一种方法实施例包括在管芯208和基板202之间提供底填材料218。可以在微电子管芯208和载体基板202之间的间隙219之内提供并固化底填材料218，该间隙包围由焊料帽214和焊料凸块206/206’的回流所形成的焊点220。如图5所示向间隙219施加底填材料218的过程依照的是现有技术中公知的毛细管底填方案。不过，实施例不限于使用底填材料，或使用如图所示的毛细管底填方案，而是在其范围之内包括管芯208和基板202之间的间隙219中没使用底填的封装以及管芯208和基板202之间的间隙219中使用非流动底填的封装等。在固化之后，诸如底填材料218的底填材料通过支撑微电子管芯208和载体基板202有助于防止在热循环期间在焊点220上施加负荷。
参考图6，其示出了可以在其中使用本发明实施例的很多可能系统900的一个。在一个实施例中，电子组件1000可以包括诸如图4的封装200的微电子封装。组件1000还可以包括微处理器。在备选实施例中，电子组件1000可以包括专用IC(ASIC)。也可以根据本发明的实施例封装芯片组(例如图形、声音和控制芯片组)中的集成电路。
对于图6所示的实施例而言，如图所示，系统900还可以包括通过总线1010彼此耦合的主存储器1002、图形处理器1004、大容量存储装置1006和/或输入/输出模块1008。存储器1002的范例包括，但不限于静态随机存取存储器(SRAM)和动态随机存取存储器(DRAM)。大容量存储装置1006的范例包括，但不限于硬盘驱动器、光盘驱动器(CD)、数字多用盘驱动器(DVD)等。输入/输出模块1008的范例包括，但不限于键盘、光标控制装置、显示器、网络接口等。总线1010的范例包括，但不限于外围控制接口(PCI)总线和工业标准体系(ISA)总线等。在各实施例中，系统90可以是无线移动电话、个人数字助理、口袋PC、写字板PC、笔记本PC、台式计算机、机顶盒、介质中心PC、DVD播放器和服务器。
以举例的方式而非限制的方式给出了上述各实施例。已经这样详细描述了本发明的实施例，应当理解，由所附权利要求限定的本发明不受上述说明书中阐述的具体细节限制，因为在不脱离其精神或范围的情况下其很多变化都是可能的。

Claims (16)

1.一种提供微电子管芯的方法，包括：
提供管芯基板；
在所述管芯基板的表面上提供凸块形成位点；
在所述凸块形成位点上提供焊料帽；
在微电子基板上提供焊料凸块，其中所述焊料帽的体积是用于结合所述管芯基板和所述微电子基板的最小预定焊料量的函数，并且所述焊料帽的体积和对应的焊料凸块的体积的组合体积等于或大于所述最小预定焊料量；
对所述焊料帽和所述焊料凸块进行回流以形成焊点，其中所述焊料凸块和所述焊料帽在回流期间熔化；以及
在所述管芯基板和所述微电子基板之间的间隙之内提供并固化底填材料，其中所述管芯基板和所述微电子基板之间的最小必需间隙是所述底填材料中的填料颗粒的最大尺寸的两倍。
2.根据权利要求1所述的方法，其中提供焊料帽包括：
为所述焊料帽选择一组不同的焊料材料；
从该组中选择该组中弹性模量最低的焊料材料。
3.根据权利要求1所述的方法，其中所述焊料帽包括Sn。
4.根据权利要求3所述的方法，其中所述焊料帽包括SnAg、SnCu和基本纯的Sn中的一种。
5.根据权利要求1所述的方法，其中提供焊料帽包括将所述焊料帽电镀到所述凸块形成位点上。
6.根据权利要求1所述的方法，其中所述焊料帽具有至少10微米的高度。
7.一种形成微电子封装的方法，包括：
提供微电子基板，所述微电子基板包括结合焊盘和所述结合焊盘的相应结合焊盘上的焊料凸块；
提供其上包括凸块形成位点的微电子管芯；
在所述凸块形成位点上提供焊料帽，其中所述焊料帽的体积是用于结合所述管芯和所述基板的最小预定焊料量的函数，并且所述焊料帽的体积和对应的焊料凸块的体积的组合体积等于或大于所述最小预定焊料量；
将所述管芯定位到所述基板上以形成管芯-基板组合，定位包括将所述管芯上的相应焊料帽放置为与所述基板上的对应的焊料凸块对准；
通过使所述管芯-基板组合经受回流，以由所述焊料帽和焊料凸块形成焊点，从而将所述管芯结合到所述基板，其中所述焊料帽和所述焊料凸块在回流期间熔化；以及
在所述基板和所述管芯之间的间隙之内提供并固化底填材料，其中所述基板和所述管芯之间的最小必需间隙是所述底填材料中的填料颗粒的最大尺寸的两倍。
8.根据权利要求7所述的方法，其中提供焊料帽包括：
为所述焊料帽选择一组不同的焊料材料；
从该组中选择该组中弹性模量最低的焊料材料。
9.根据权利要求7所述的方法，其中所述焊料帽包括Sn。
10.根据权利要求9所述的方法，其中所述焊料帽包括SnAg、SnCu和基本纯的Sn中的一种。
11.根据权利要求7所述的方法，其中提供焊料帽包括将所述焊料帽电镀到所述凸块形成位点上。
12.根据权利要求7所述的方法，其中所述焊料帽具有至少10微米的高度。
13.一种微电子管芯，包括：
管芯基板；
所述管芯基板上的多个凸块形成位点；
相应的各个所述凸块形成位点上的多个焊料帽；
微电子基板上的多个焊料凸块，其中所述焊料帽的体积是用于结合所述管芯基板和所述微电子基板的最小预定焊料量的函数，并且所述焊料帽的体积和对应的焊料凸块的体积的组合体积等于或大于所述最小预定焊料量，其中所述多个焊料帽和所述多个焊料凸块被回流，以形成焊点，并且其中所述焊料帽和所述焊料凸块在回流期间熔化；以及
在所述管芯基板和所述微电子基板之间的间隙之内提供并固化的底填材料，其中所述管芯基板和所述微电子基板之间的最小必需间隙是所述底填材料中的填料颗粒的最大尺寸的两倍。
14.根据权利要求13所述的管芯，其中所述焊料帽包括Sn。
15.根据权利要求13所述的管芯，其中所述焊料帽包括SnAg、SnCu和基本纯的Sn中的一种。
16.根据权利要求13所述的管芯，其中所述焊料帽具有大于或等于10微米的高度。
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