CN101568237A - Method and device for eliminating signal noise - Google Patents
Method and device for eliminating signal noise Download PDFInfo
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Abstract
The invention discloses a method and device for eliminating signal noise, the device includes a backward-forward counter and a signal output circuit; the method for eliminating signal noise has the following steps: 1) setting valid and invalid level counting thresholds; 2) receiving the signal with signal noise needed to be eliminated by the backward-forward counter and beginning to count; when the rising edge of each clock arrives, if the signal is an valid electrical level, adding one on the current counting value, otherwise subtracting one; and the counting value does not increase/decrease until it reaches to a valid/invalid level counting threshold; meanwhile, the signal output circuit outputs signal without noise according to the counting value: when the rising edge of each clock arrives, if the counting value is a valid/invalid level counting threshold, then outputting valid/invalid level; if the counting value is between the valid and invalid level counting threshold, keeping the output equal to the output of the previous clock. The device provided by the invention can thoroughly eliminate wide noise, stably output signal without noise, and which is simple to be realized, thereby improving reliability of the system.
Description
Technical field
The present invention relates to the signal processing technology field, relate in particular to a kind of method and device of eliminate signal burr.
Background technology
Along with the development of data communication technology, the somewhat complex design of communication equipment emerges in an endless stream, and causes signal to be interfered more and more easily like this, produces burr.So-called burr is exactly acute angle or the sharp cutting edge of a knife or a sword in the smooth signal.How to eliminate burr and become the most general problem in the signal processing technology field.
Chinese patent CN200610160922 discloses a kind of device and method of eliminate signal burr, and its core concept is: according to the definite progression that postpones of Breadth Maximum of waiting to eliminate burr, treat the interface signal of eliminating burr according to this delay progression and postpone to handle; The inhibit signals at different levels that delayed processing obtains are carried out logical AND operation and logic OR operation respectively, obtain carrot-free signal according to logical AND operating result and logic OR operating result.
The shortcoming of this method is: in the process that realizes, if want to eliminate wide burr, the delay progression that adds is too much, and the time delay of the no burr signal of output is longer, and implements more complicated.
Summary of the invention
Technical problem to be solved by this invention provides a kind of method and device of eliminate signal burr, effectively eliminates the burr of broad apace, stably exports carrot-free signal.
For solving the problems of the technologies described above, the present invention adopts following solution:
A kind of method of eliminate signal burr comprises:
(1) effective level meter is set and counts threshold value and inactive level counting threshold value;
(2) reception is waited to eliminate the signal of burr and is begun counting: when the rising edge of each clock arrives, if described signal is a significant level, then current count value is added 1, otherwise then subtract 1; And described count value no longer increases after reaching significant level counting threshold value, no longer reduces after reaching inactive level counting threshold value;
Simultaneously, export carrot-free signal: when the rising edge of each clock arrives,, then export significant level if current count value is a significant level counting threshold value according to described count value; If current count value is an inactive level counting threshold value, then export inactive level; If current count value then keeps identical with the output of last clock between significant level counting threshold value and inactive level counting threshold value.
Wherein, in the step (1), earlier according to following formula according to the clock cycle and the duration of waiting to eliminate burr determine the difference of described significant level counting threshold value and inactive level counting threshold value to be respectively arranged with and to imitate level counting threshold value and inactive level counting threshold value again according to this difference:
Significant level counting threshold value-inactive level counting threshold value=wait to eliminate duration/(2 * clock cycle) of burr.
A kind of device of eliminate signal burr comprises forward-backward counter and signal output apparatus;
Described forward-backward counter is used to be provided with effective level meter and counts threshold value and inactive level counting threshold value; Also be used to receive and wait to eliminate the signal of burr and when receiving, count: when the rising edge arrival of each clock, if described signal is a significant level, then current count value is added 1, otherwise then subtract 1, and described count value no longer increases after reaching significant level counting threshold value, no longer reduces after reaching inactive level counting threshold value; Also be used for current count value being sent to signal output apparatus at each clock;
Described signal output apparatus is used for exporting carrot-free signal according to described count value: when the rising edge of each clock arrives, if current count value is a significant level counting threshold value, then export significant level; If current count value is an inactive level counting threshold value, then export inactive level; If current count value then keeps identical with the output of last clock between significant level counting threshold value and inactive level counting threshold value.
Wherein, described forward-backward counter is four binary-coded decimal forward-backward counters.
Wherein, described signal output apparatus comprises four inputs and door, four input NOR gate and JK flip-flop;
The output of described four binary-coded decimal forward-backward counters links to each other respectively with the input of described four inputs with door, four input NOR gate, and described four inputs link to each other with two inputs of JK flip-flop respectively with the output of door with four input NOR gate.
The present invention has following beneficial effect:
1) the present invention's deburring up hill and dale, and stably export carrot-free signal; Again because of adopting forward-backward counter, so only use half logical resource of prior art just can reach the ability of eliminating the equal length burr, it is the present invention can eliminate two times of durations with same resource burr, so of the present invention one big advantage is to eliminate the burr than broad, and simply be easy to realize.
2) adopt the present invention, incoming level can not occur and in a single day reach decision level, output level just produces the situation of saltus step, this is because the present invention has adopted counter, this has just determined only to reach the counts that satisfies thresholding just can export the level of variation, reduce the difficulty of later stage system development, improved the reliability of system.
Description of drawings
Fig. 1 is the apparatus structure schematic diagram of eliminate signal burr of the present invention;
Fig. 2 is the method flow diagram of eliminate signal burr of the present invention;
Fig. 3 is the structural representation of four binary-coded decimal forward-backward counters of embodiment of the invention employing;
Fig. 4 is the structural representation of the signal output apparatus that adopts in the embodiment of the invention;
Fig. 5 is the signal waveform (shown in Fig. 5 (a)) of eliminating burr and the contrast schematic diagram that adopts the carrot-free signal waveform (shown in Fig. 5 (b)) that obtains after the inventive method processing for the treatment of in the embodiment of the invention.
Embodiment
The present invention is described in further detail below in conjunction with drawings and Examples:
The apparatus structure of eliminate signal burr of the present invention comprises as shown in Figure 1:
Forward-backward counter is used to be provided with effective level meter and counts threshold value and inactive level counting threshold value; Also be used for when reception waits to eliminate the signal of burr, counting: when the rising edge of each clock arrives,, then current count value is added 1 if described signal is a significant level; If described signal is an inactive level, then current count value is subtracted 1; And described count value no longer increases after reaching significant level counting threshold value, no longer reduces after reaching inactive level counting threshold value; Also be used for current count value being sent to signal output apparatus at each clock;
Signal output apparatus is used for exporting carrot-free signal according to described count value: when the rising edge of each clock arrives, if current count value is a significant level counting threshold value, then export significant level; If current count value is an inactive level counting threshold value, then export inactive level; If current count value then keeps identical with the output of last clock between significant level counting threshold value and inactive level counting threshold value.
Correspondingly, the method for the eliminate signal burr of said apparatus may further comprise the steps as shown in Figure 2:
201, according to the clock cycle and the duration of waiting to eliminate burr the significant level counting threshold value and the inactive level counting threshold value of forward-backward counter are set, can be provided with according to following formula:
Significant level counting threshold value-inactive level counting threshold value=wait to eliminate duration/(2 * clock cycle) of burr
For example, the duration of waiting to eliminate burr is 200ns, clock cycle is 20ns, then significant level counting threshold value-inactive level counting threshold value=200ns/ (2 * 20ns)=5, effective level meter can be set so count that threshold value is 5, inactive level counting threshold value is 0.
202, when the rising edge of present clock arrives, judge whether the current signal of waiting to eliminate burr is significant level, if then execution in step 203; If not then execution in step 204;
203, whether the count value of judging current forward-backward counter is significant level counting threshold value, if then export significant level; If not, then count value is added 1, and export identical level with last clock; Change step 205 afterwards over to;
204, whether the count value of judging current forward-backward counter is inactive level counting threshold value, if then export inactive level; If not, then count value is subtracted 1, and export identical level with last clock;
205, wait for the rising edge arrival of next clock, when arriving, change step 202 over to.
Below be a specific embodiment of the present invention:
In the present embodiment, what forward-backward counter adopted is typical four binary-coded decimal forward-backward counters, its internal structure comprises four signal input parts (IutputA, Iutput B, IutputC, Iutput D) and four count value outputs (OutputA, Output B, Output C, OutputD) as shown in Figure 3; Wherein, input input be the level value (be input as Binary Zero 001b during significant level, be input as Binary Zero 000b during inactive level) of waiting to eliminate the signal of burr, output output be the binary counting value)
Correspondingly, the structure of signal output apparatus as shown in Figure 4, constitute by one four input and door, four input NOR gate and a JK flip-flop, the count value of four binary-coded decimal forward-backward counters output (Output A, Output B, Output C, Output D) is as four inputs input with door and four input NOR gate, and four inputs with and four outputs of importing NOR gate be connected two inputs of JK flip-flop respectively.
In the present embodiment, wait to eliminate the signal of burr shown in Fig. 5 (a), significant level is a low level, inactive level is that high level (can be high level by significant level certainly in other example, inactive level can be low level), because wherein waiting to eliminate the maximum duration of burr is 400ns and clock cycle to be 50ns (being that frequency is 20MHz), then in order to eliminate all burrs, the significant level counting threshold value that four binary-coded decimal forward-backward counters can be set can be eliminated the long burr of 400ns for Binary Zero 100b, low level counting threshold value is Binary Zero 000b, and the signalization output module is 4 o'clock output significant levels in count value simultaneously, count value is 0 o'clock output low level, count value between 4 and 0 the time with the identical level of last clock output.
The detailed process of signal shown in Fig. 5 (a) being done the processing of elimination burr is:
When the rising edge of the 1st clock arrives, current count value m=0, the signal of waiting to eliminate burr is a high level, then count value is that minimum threshold m keeps initial value, the output high level;
When the rising edge of the 2nd clock arrives, current count value m=0, the signal of waiting to eliminate burr is a high level, then count value is that minimum threshold m keeps initial value, the output high level;
When the rising edge of the 3rd clock arrives, current count value m=0, the signal of waiting to eliminate burr is a low level, then count value is m+1=1, the output high level;
When the rising edge of the 4th clock arrives, current count value m=1, the signal of waiting to eliminate burr is a high level, then count value is m-1=0, the output high level;
When the rising edge of the 5th clock arrives, current count value m=0, the signal of waiting to eliminate burr is a high level, then count value keeps initial value, the output high level;
When the rising edge of the 6th clock arrives, current count value m=0, the signal of waiting to eliminate burr is a low level, count value m+1=1 then, output high level;
When the rising edge of the 7th clock arrives, current count value m=1, the signal of waiting to eliminate burr is a high level, count value m-1=0 then, output high level;
When the rising edge of the 8th clock arrives, current count value m=0, the signal of waiting to eliminate burr is a low level, count value m+1=1 then, output high level;
When the rising edge of the 9th clock arrives, current count value m=1, the signal of waiting to eliminate burr is a low level, count value m+1=2 then, output high level;
When the rising edge of the 10th clock arrives, current count value m=2, the signal of waiting to eliminate burr is a low level, count value m+1=3 then, output high level;
When the rising edge of the 11st clock arrives, current count value m=3, the signal of waiting to eliminate burr is a low level, count value m+1=4 then, output low level;
When the rising edge of the 12nd clock arrives, current count value m=4, the signal of waiting to eliminate burr is a low level, then count value has reached high threshold, keeps initial value, output low level;
When the rising edge of the 13rd clock arrives, current count value m=4, the signal of waiting to eliminate burr is a low level, then count value has reached high threshold, keeps initial value, output low level;
......
When the rising edge of the 16th clock arrives, current count value m=4, the signal of waiting to eliminate burr is a high level, count value m-1=3 then, output low level;
When the rising edge of the 17th clock arrives, current count value m=3, the signal of waiting to eliminate burr is a low level, count value m+1=4 then, output low level;
Afterwards by that analogy
So far, the waveform through eliminating the signal after burr is handled this shows that the present invention can eliminate the signal burr of broad effectively shown in Fig. 5 (b), and guarantees the stable output of signal.
Above embodiment is only unrestricted in order to technical scheme of the present invention to be described, only with reference to preferred embodiment the present invention is had been described in detail.Those of ordinary skill in the art should be appreciated that and can make amendment or be equal to replacement technical scheme of the present invention, and do not break away from the spirit and scope of technical solution of the present invention, all should be encompassed in the middle of the claim scope of the present invention.
Claims (5)
1, a kind of method of eliminate signal burr is characterized in that, this method comprises:
(1) effective level meter is set and counts threshold value and inactive level counting threshold value;
(2) reception is waited to eliminate the signal of burr and is begun counting: when the rising edge of each clock arrives, if described signal is a significant level, then current count value is added 1, otherwise then subtract 1; And described count value no longer increases after reaching significant level counting threshold value, no longer reduces after reaching inactive level counting threshold value;
Simultaneously, export carrot-free signal: when the rising edge of each clock arrives,, then export significant level if current count value is a significant level counting threshold value according to described count value; If current count value is an inactive level counting threshold value, then export inactive level; If current count value then keeps identical with the output of last clock between significant level counting threshold value and inactive level counting threshold value.
2, the method for eliminate signal burr as claimed in claim 1, it is characterized in that, in the step (1), earlier according to following formula according to the clock cycle and the duration of waiting to eliminate burr determine the difference of described significant level counting threshold value and inactive level counting threshold value to be respectively arranged with and to imitate level counting threshold value and inactive level counting threshold value again according to this difference:
Significant level counting threshold value-inactive level counting threshold value=wait to eliminate duration/(2 * clock cycle) of burr.
3, a kind of device of eliminate signal burr is characterized in that, this device comprises forward-backward counter and signal output apparatus;
Described forward-backward counter is used to be provided with effective level meter and counts threshold value and inactive level counting threshold value; Also be used to receive and wait to eliminate the signal of burr and when receiving, count: when the rising edge arrival of each clock, if described signal is a significant level, then current count value is added 1, otherwise then subtract 1, and described count value no longer increases after reaching significant level counting threshold value, no longer reduces after reaching inactive level counting threshold value; Also be used for current count value being sent to signal output apparatus at each clock;
Described signal output apparatus is used for exporting carrot-free signal according to described count value: when the rising edge of each clock arrives, if current count value is a significant level counting threshold value, then export significant level; If current count value is an inactive level counting threshold value, then export inactive level; If current count value then keeps identical with the output of last clock between significant level counting threshold value and inactive level counting threshold value.
4, the device of eliminate signal burr as claimed in claim 3 is characterized in that, described forward-backward counter is four binary-coded decimal forward-backward counters.
5, the device of eliminate signal burr as claimed in claim 4 is characterized in that, described signal output apparatus comprises four inputs and door, four input NOR gate and JK flip-flop;
The output of described four binary-coded decimal forward-backward counters links to each other respectively with the input of described four inputs with door, four input NOR gate, and described four inputs link to each other with two inputs of JK flip-flop respectively with the output of door with four input NOR gate.
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