CN101512742A - 半导体器件的制造方法 - Google Patents

半导体器件的制造方法 Download PDF

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Publication number
CN101512742A
CN101512742A CNA2006800559601A CN200680055960A CN101512742A CN 101512742 A CN101512742 A CN 101512742A CN A2006800559601 A CNA2006800559601 A CN A2006800559601A CN 200680055960 A CN200680055960 A CN 200680055960A CN 101512742 A CN101512742 A CN 101512742A
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adhesive linkage
semiconductor element
semiconductor device
manufacture method
semiconductor
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CN101512742B (zh
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手代木和雄
下别府佑三
吉本和浩
新城嘉昭
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Socionext Inc
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Fujitsu Semiconductor Ltd
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Abstract

本发明提供一种半导体器件的制造方法，其特征在于，包括：在装载有半导体元件(21A)的支撑衬底(51)上配设粘接剂(52)的工序；在外部连接用端子(24)配设于所述半导体元件(21A)一侧的主面上的所述半导体元件(21A)另一侧的主面上，设置阻止所述粘接剂(52)的流动的构件(33)的工序；通过所述构件(33)对所述半导体元件(21A)加压，并将其装载在配设有所述粘接剂(52)的所述支撑衬底(51)上的工序。

Description

半导体器件的制造方法
技术领域
本发明涉及半导体器件的制造方法，特别是涉及具有在布线衬底等支撑衬底上倒装(flip chip)(倒置)安装具有突起电极的半导体元件的工序的半导体器件的制造方法。
背景技术
作为在电路衬底等支撑衬底上安装半导体元件的一种方法，适用使该半导体元件的主面(形成电子电路的面)与支撑衬底相对置的所谓倒装(倒置)安装。此时，在该半导体元件的所述主面上，设置由导电性材料构成的突起电极(又称凸点)，该突起电极与支撑衬底上的电极端子连接。
作为包括该倒装(倒置)安装工序的半导体器件的制造方法，以往使用以下的方法。图1～图4表示这样的以往的半导体器件的制造方法。
即，准备适用所谓晶片工艺(wafer process)，并在一侧的主面上形成多个半导体元件(LSI元件)而构成的半导体衬底(晶片)1。在该半导体衬底1的背面(非电子电路形成面)上，粘贴紫外线(UV)固化型切割胶带(dicingtape)2，隔着该切割胶带2将半导体衬底1固定在贴片环(wafer ring)(框架)3上(参照图1(a))。在该半导体衬底1一侧的主面(半导体元件形成面)上，在该半导体元件的各个区域，配设有作为外部连接用端子的突起电极(凸点)。
接着，通过使用切割锯(dicing saw)4的刀片切割(blade dicing)法，纵横切断半导体衬底1，分离半导体元件，并使其单片化(参照图1(b))。
接下来，从所述切割胶带2的背面侧照射紫外线(UV光)，使切割胶带2的粘接层固化(参照图1(c))。由此，切割胶带2的粘合力降低，成为单片化的半导体元件能够从切割胶带2剥离的状态。
然后，利用顶销(未图示)从切割胶带2的下方向上顶，从而从切割胶带2剥离单片化的半导体元件，同时使用在上方待机的吸附工具5吸附半导体元件6，将该半导体元件6输送至托盘7(参照图2(d))。其结果，将半导体元件6容纳在托盘7上。
接着，使用拾取工具(pick up tool)8取出容纳在托盘7上的半导体元件6。然后，上下反转该拾取工具8，将半导体元件6交接至在上方待机的键合工具(bonding tool)9(参照图2(e))。
一方面，在后面的工序中，在用于装载并粘着半导体元件6的布线衬底10的上表面，并且在用于装载并粘着该装半导体元件6的部位上，涂敷由膏状的环氧类树脂等热固化性树脂等构成的粘接剂11(参照图2(f))。
接着，使用图像处理装置(未图示)，对半导体元件6和布线衬底10进行对位，一边使用键合工具9加热及加压，一边将半导体素子6倒装(倒置)安装在布线衬底10上(参照图2(g))。
其结果，设置在半导体元件6下表面上的突起电极(凸点)12与布线衬底10的电极13连接(参照图3(h))。
此时，通过加热使所述粘接剂11(参照图2(f))固化，从而加强半导体元件6与布线衬底10之间的粘接，并且保护半导体元件6与布线衬底10的连接部位不受湿气等外部环境的影响。
接着，将装载在布线衬底10一侧的主面上的多个半导体元件6一并用树脂封固。在模具14上安装该布线衬底10，向配置有该布线衬底10一侧的主面的模腔内注入封固用树脂15进行树脂封固(参照图3(h))。
接着，在所述布线衬底10的另一主面上，设置多个构成外部连接端子16的焊锡球(参照图3(i))。
然后，通过使用切割锯17的刀片切割法，将布线衬底10以及通过封固用树脂15在该布线衬底10的一侧的主面上进行了树脂封固的半导体元件6及粘接剂11等作为一个单位，沿虚线X-X′进行分离并使其单片化(参照图4(j))。
其结果，在布线衬底10上倒装(倒置)安装半导体元件6，进而形成用封固用树脂15封固的半导体器件18(参照图4(k))。
此外，已提出如下所述的方法或半导体器件。所述方法是，在向多布线衬底的芯片安装区域按压由接触托(collet)所吸附保持的半导体元件的背面，从而进行所述半导体元件的芯片键合(die bonding)时，预先在所述半导体元件的主面上粘贴保护胶带(例如，参照专利文献1)。所述半导体器件具有：聚酰亚胺衬底，在其上表面上形成有铜线；连接孔，设置在所述衬底上并与所述铜线连接；焊锡球，形成在所述衬底的下表面并通过所述连接孔与所述铜线连接；半导体元件，键合在所述衬底的上表面上；金凸点，安装在所述半导体元件上并与所述铜线连接；各向异性导电膜，配置在所述半导体元件与所述聚酰亚胺衬底之间；保护膜，设置在所述半导体元件的某一整个面上(例如，参照专利文献2)。
进而，如下的方式也已被提出，即，通过形成在表面上的焊锡凸点，在电路衬底上装配(mount)半导体元件，所述半导体元件具有利用粘合层粘接在背面的半导体元件背面保护层，通过加热处理使所述焊锡凸点熔化，接合半导体元件和电路衬底，并且软化粘合层，利用该粘合层覆盖半导体元件的侧面(例如，参照专利文献3)。
专利文献1：JP特开2003-234359号公报；
专利文献2：JP特开2001-68603号公报；
专利文献3：JP特开2005-26311号公报。
发明内容
发明所要解决的课题
但是，在这样的以往的半导体器件的制造方法中，存在下面这样的问题。
即，在所述图2(g)所示的工序中，通过键合工具9在布线衬底10上倒装(倒置)安装半导体元件6，设置在半导体元件6的主面上的突起电极(凸点)12与布线衬底10上的电极13连接。
此时，设置在该布线衬底10与导体元件6之间的粘接剂11沿该半导体元件6的侧面向上漫。另外，该粘接剂11也从半导体元件6的侧面向周围的布线衬底10的表面扩展，形成所谓的焊脚(fillet)(参照图5)。
半导体元件6一边被键合工具9吸引并保持，一边被加热以及加压而粘着在布线衬底10上。此时，由于键合工具9进行的加热，使布线衬底10上的粘接剂11的粘度降低。然后，由于该表面张力，该粘接剂11沿半导体元件6的侧面上升，并且在布线衬底10的表面扩张，形成焊脚。
在固化粘接剂11时，因为用更大的压紧力进行固化，所以提高焊脚接合的可靠性，从这一观点来看优选形成此焊脚。
但是，若粘接剂11的涂敷量过多，则该粘接剂11超出半导体元件6的厚度向上漫，如图6所示，该粘接剂11的一部分会与键合工具9的下表面接触。此外，图6(b)放大表示在图6(a)中由虚线包围的部分。
因为键合工具9被加热而形成为高温，与该键合工具9的下表面接触的粘接剂11固化，如图7所示那样，粘附并残留在键合工具9的下表面上。
其结果，会破坏键合工具9的表面(半导体元件吸附面)的平坦性，在吸附并键合处理下一个被键合半导体元件6时，会出现键合工具9与半导体元件6的布线衬底10的不良连接，如发生吸附错误、不均匀加热半导体元件6，或者半导体元件6与布线衬底10的连接部的温度上升不足等。
另外，因为粘附并固化的粘接剂11A呈突起状，所以在键合处理时，也可能发生以该突起为起点集中键合负荷，从而在半导体元件6上产生裂纹的情况。
进而，难以检测和除去该粘接剂11A。另外，即使为能够除去粘接剂11A的状态，在键合装置中，因为通常没有设置检测粘接剂11A的单元，所以若出现这样的状态，则有可能出现未察觉地制造出不好的半导体器件的情况。
半导体元件6的厚度越薄，越容易发生这样的粘接剂的漫出所形成的该粘接剂11粘附在键合工具9上的情况，伴随要求半导体器件的薄型化，今后，这种情况可能更加严重。
为解决这样的问题，需要防止粘接剂11粘附在键合工具9上。
通过减少粘接剂11在布线衬底10上的涂敷量，能够使此状态难以形成，但因此会降低半导体元件6与布线衬底10之间的粘接的可靠性，从而会降低半导体器件的可靠性。
另外，也考虑到在键合装置上附加用于检测粘接剂11粘附在键合工具9上的功能，但产生用于附加该功能的费用，进而产生该检测工序会降低制造处理能力，从而制造费用上升。
本发明的目的在于提供一种半导体器件的制造方法，所述半导体器件的制造方法无需减少粘接剂在布线衬底上的涂敷量，就能够防止该粘接剂粘附在键合工具上并固化的状态。
用于解决课题的手段
根据本发明的一个观点，提供一种半导体器件的制造方法，其特征在于，包括：在装载有半导体元件的支撑衬底上配设粘接剂的工序；在一侧的主面上配设有外部连接用端子的所述半导体元件的另一侧的主面上，设置阻止所述粘接剂流动的构件的工序；隔着所述构件对所述半导体元件加压，将其装载在配设有所述粘接剂的所述支撑衬底上的工序。。
可以在将所述构件粘贴在半导体衬底上的状态下，切断所述构件，切断后的所述构件的面大于对所述半导体衬底进行单片化后的所述半导体元件的另一侧的主面。也可以在通过第一粘接层在切割胶带上粘贴所述构件，并且，隔着第二粘接层在所述半导体衬底上粘贴所述构件的状态下，切断所述构件以及所述半导体衬底。
可以成为所述第一粘接层以及所述第二粘接层为紫外线固化粘接层，使所述第二粘接层的固化状态开始所需要的紫外线照射光量大于使所述第一粘接层的固化状态开始所需要的紫外线照射光量。
可以成为所述第一粘接层以及所述第二粘接层为热发泡型粘接层，使所述第二粘接层的发泡状态开始所需要的温度大于使所述第一粘接层的发泡状态开始所需要的温度。
发明效果
根据本发明能够提供一种半导体器件的制造方法，所述半导体器件的制造方法无需减少粘接剂在布线衬底上的涂敷量，并能够简便地预先防止粘接剂粘附在键合工具上并固化的状态。
附图说明
图1是表示以往的半导体器件的制造方法的外观立体图。
图2是表示以往的半导体器件的制造方法的外观立体图。
图3是表示以往的半导体器件的制造方法的剖面图。
图4是表示以往的半导体器件的制造方法的剖面图。
图5是表示以往的半导体器件的制造方法的缺陷的侧视图。
图6是表示以往的半导体器件的制造方法的缺陷的侧剖图。
图7是表示以往的半导体器件的制造方法的缺陷的剖面图。
图8是表示本发明第一实施方式的半导体器件的制造方法的外观立体图以及主要部分的剖面图。
图9是表示本发明第一实施方式的半导体器件的制造方法的外观立体图以及主要部分的剖面图。
图10是表示本发明第一实施方式的半导体器件的制造方法的外观立体图以及主要部分的剖面图。
图11是表示本发明第一实施方式的半导体器件的制造方法的外观立体图以及主要部分的剖面图。
图12是表示本发明第一实施方式的半导体器件的制造方法的外观立体图以及主要部分的剖面图。
图13是表示本发明第一实施方式的半导体器件的制造方法的外观立体图。
图14是表示本发明第一实施方式的半导体器件的制造方法的外观立体图以及主要部分侧视图。
图15是表示本发明第一实施方式的半导体器件的制造方法的外观立体图以及主要部分的剖面图。
图16本发明第一实施方式的半导体器件的制造方法的主要部分的剖面图。
图17是表示本发明第一实施方式的半导体器件的制造方法的外观立体图以及主要部分的剖面图。
图18是表示本发明第一实施方式的半导体器件的制造方法的外观立体图以及主要部分的剖面图。
图19是表示本发明第一实施方式的半导体器件的制造方法的外观立体图以及主要部分的剖面图。
图20是表示本发明第一实施方式的半导体器件的制造方法的主要部分的剖面图。
图21是表示本发明第一实施方式的半导体器件的制造方法的主要部分的剖面图。
图22是表示本发明第一实施方式的半导体器件的制造方法的主要部分的剖面图。
图23是表示本发明第一实施方式的半导体器件的结构的剖面图。
图24是表示本发明第二实施方式的半导体器件的制造方法的外观立体图。
图25是表示本发明第二实施方式的半导体器件的制造方法的主要部分的剖面图。
图26是表示本发明第二实施方式的半导体器件的制造方法的外观立体图。
图27是表示本发明第二实施方式的半导体器件的制造方法的外观立体图。
图28是表示本发明第二实施方式的半导体器件的制造方法的外观立体图。
图29是表示本发明第二实施方式的半导体器件的制造方法的外观立体图。
图30是表示本发明第二实施方式的半导体器件的制造方法的外观立体图。
图31是表示本发明第二实施方式的半导体器件的制造方法的外观立体图。
图32是表示本发明第二实施方式的半导体器件的制造方法的外观立体图。
图33是表示本发明第二实施方式的半导体器件的制造方法的外观立体图。
图34是表示本发明第二实施方式的半导体器件的制造方法的外观立体图。
图35是表示粘贴在半导体衬底上的胶带的变形例的结构的剖面图。
图36是表示能够适用本发明的制造方法的半导体器件的第一变形例的剖面图。
图37是表示能够适用本发明的制造方法的半导体器件的第二变形例的剖面图。
附图标记说明
20  突起电极
21  半导体衬底
24  第一切割锯
25  第二切割锯
30  切割胶带
31、73  第一粘接层
32  保护胶带
33、74  第二粘接层
40  半导体元件
44  键合工具
46  粘接剂
50  布线衬底
51  电极
具体实施方式
下面，用两个实施方式对本发明的半导体器件的制造方法进行详细说明。
[第一实施方式]
用图8～图23对本发明第一实施方式进行说明。此外，在图8～图12、图14、图15、图17～图19中，(b)表示(a)的主要部分的放大剖面。
准备适用所谓晶片工艺，并在一侧的主面上形成多个半导体元件(LSI元件)而构成的半导体衬底(晶片)21。此外，根据需要，对该半导体衬底21的另一侧的主面(背面)进行研磨处理，减小该半导体衬底21的厚度。
将该半导体衬底21的背面(非电子电路形成面)粘贴在紫外线(UV)固化型切割胶带22上，并隔着该切割胶带22而固定在贴片环(框架)23上(参照图8(a))。
图8(b)表示半导体衬底21粘贴在该切割胶带22上的状态。在该半导体衬底21的一侧的主面(半导体元件形成面)上，在该半导体元件的各个区域，配设作为外部连接用端子的突起电极(凸点)24。在同图8(b)中，点划线X-X′表示半导体元件的边界部。
另一方面，切割胶带22具有4层结构。即，在切割胶带基体材料31上依次层叠形成有紫外线(UV)固化型第一粘接层32、保护胶带基体材料33以及紫外线(UV)固化型第二粘接层34。
作为切割胶带基体材料31的材料，能够使用例如聚对苯二甲酸乙二醇酯(PET：Polyethlene Terephthalate)，聚烯烃(PO：Polyolefin)等。但并不仅限于这些材料。另外，该切割胶带基体材料31的厚度也无限制，例如能够设定为约50～100μm。
另外，由于在后述键合工序中要被加热，所以保护胶带基体材料33需要具有耐热性，适合即使接触粘接剂也难以粘附及固化的聚四氟乙烯类材料。该保护胶带基体材料33的厚度也无限制，例如能够设定为约10～30μm。
另一方面，第一粘接层32以及第二粘接层34为所谓紫外线(UV)固化型粘接层，能够适用例如丙烯酸类紫外线(UV)固化型粘接层。但是，并不仅限于这样的材料。这些粘接层32、34的厚度无限制，例如设定为20～50μm左右。
此外，使第二粘接层34的固化状态开始所需要的紫外线(UV)照射光量大于使第一粘接层32的固化状态开始所需要的紫外线(UV)照射光量。例如，设定使第一粘接层32的固化状态开始所需要的紫外线(UV)照射光量为约100mJ/cm2，在此情况下，设定使第二粘接层34的固化状态开始所需要的紫外线(UV)照射光量为500mJ/cm2。
改变构成粘接层的材料之间的配合比，能够改变使粘接层的固化状态开始所需要的紫外线(UV)照射光量。
此外，第二粘接层34与所述切割胶带基体材料31相同，因为在键合工序(后述)中要被加热所以需要具有耐热性。
接着，对应于所述图8(b)中的点划线X-X′，通过使用切割锯25的刀片切割的方法，纵横切断所述半导体衬底21，从而分离为各个半导体元件21A，使半导体衬底21单片化(参照图9)。通过这样的切割，半导体元件21A被单片化为矩形的平面形状。
此时，将切割锯25的宽度(刃厚)设定为例如50μm以上。
该切割锯25切入半导体衬底21，进一步切入第二粘接层34，到达保护胶带基体材料33的上表面，形成露出该保护胶带基体材料33的槽(切割槽)26。
接着，通过使用第二切割锯27的刀片切割的方法，切入在所述切割处理所产生的切割槽26内露出的保护胶带基体材料33及位于其下层的第一粘接层32，从而形成槽28(参照图10(a)、(b))。
该第二切割锯27的宽度(刃厚)小于所述切割锯25的宽度(刃厚)，被设定为例如约20μm以下。在此切割处理中，第二切割锯27到达切割胶带基体材料31的上表面。
其结果，在各个半导体元件21A的周围与切割胶带22之间形成由槽26和槽28构成的阶梯差(参照图10(c))。
即，切割锯25切断并分离半导体衬底21以及第二粘接层34，第二切割锯27切断并分离保护胶带基体材料33以及第一粘接层32，从而形成在保护胶带基体材料33以及第一粘接层32上的槽28的宽度B小于形成在半导体衬底21以及第二粘接层34上的槽26的宽度A(B<A)。
因此，在将切割锯25设定为约50μm，将第二切割锯27的宽度设定为约20μm来进行切断处理的情况下，保护胶带基体材料33对于各个半导体元件21A部来说剩余为向该半导体元件21A的外侧延伸约15μm。即，成为尺寸大于半导体元件21A的保护胶带基体材料33隔着第二粘接层34而粘贴在半导体元件21A上的状态。
在半导体元件21A的全部四个边上，该保护胶带基体材料33延伸到该半导体元件21A的侧面的外侧，并呈矩形的平面形状。
此外，通过将第二切割锯27的宽度(刃厚)设为小于切割锯25的宽度(刃厚)，能够进一步加大半导体衬底21以及第二粘接层34的切断槽26的宽度A与保护胶带基体材料33以及第一粘接层32的切断槽28的宽度B之间的差。
由此，能够形成这样的状态，即，尺寸比半导体元件21A更大的保护胶带基体材料33设置在该半导体元件21A的背面。
接着，从所述切割胶带基体材料31的下表面一侧，即与单片化的半导体衬底所存在的面相反一侧的面，照射紫外线(UV光)(参照图11)。
此时，将紫外线(UV光)的照射光量设定为如下的量，即，使第一粘接层32的固化状态开始，不使第2粘接层34的固化状态开始的量。
即，在设定使第一粘接层32的固化状态开始所需要的UV照射光量为约100mJ/cm2，设定使第二粘接层34的固化状态开始所需要的UV照射光量为约50omJ/cm2的情况下，照射照射光量为200mJ/cm2的紫外线(UV)。
其结果，只有第一粘接层32发生固化反应，第二粘接层34未发生固化。
即，形成为如下状态，即，仅固化设置在切割胶带基体材料31上的第一粘接层32，降低其粘合力，从而能够从切割胶带基体材料31剥离设置在第一粘接层32上的保护胶带基体材料33。
然后，从该切割胶带基体材料31剥离隔着第二粘接层34而安装有保护胶带基体材料33并被单片化的半导体元件21A，并将其容纳在托盘41上(参照图12)。
即，在工作台(未图示)上承载切割胶带基体材料31以及在保护胶带基体材料33上支撑的多个半导体元件21A。
在该工作台上设置有连接真空吸引装置的真空吸引孔，通过该真空吸引孔在该工作台上吸附固定所述切割胶带基体材料31。
在此状态下，顶销42从切割胶带基体材料31的下方上升，该顶销42贯通该切割胶带基体材料31及第一粘接层32后继续上升，从而从切割胶带基体材料31上剥离一个半导体元件21A。
此时，因为第一粘接层32的粘合力下降，所以位于该第一粘接层32上的保护胶带基体材料33与半导体元件21A以一体化的状态从切割胶带基体材料31分离。
另一方面，对应于该顶销42的上升，在半导体元件21A的上方配置吸附工具43，真空吸附并保持被顶上来的半导体元件21A。然后，该吸附工具43将该半导体元件21A转移至托盘41并将半导体元件21A容纳在托盘41上。
其结果，具有比该半导体元件21A面积更大的保护胶带基体材料33隔着第二粘接层34而配设在容纳于托盘的半导体元件21A的背面。
接着，使用拾取工具44取出容纳于托盘41上的半导体元件21A。然后，上下反转该拾取工具44，将该半导体元件21A交接至在上方待机的键合工具45(参照图13)。
其结果，该键合工具45吸附隔着第二粘接层34而配设在被处理半导体元件21A的背面的保护胶带基体材料33，从而保持该半导体元件21A。
另一方面，在之后的工序中，在用于装载并粘着半导体元件21A的布线衬底51的上表面，在用于装载并粘着该半导体元件21A的部位上，通过喷嘴46涂敷膏状的粘接剂52，该粘接剂52为环氧类树脂等的热固化性树脂等(参照图14)。
如该图所示，在该布线衬底51形状大(大型)，并且装载有多个半导体元件的情况下，对应于每个半导体元件的装载部位，选择性地涂敷粘接剂52。
接着，使用图像处理装置(未图示)对半导体元件21A及布线衬底51进行对位，一边使用所述键合工具45进行加热及加压，一边在布线衬底51上倒装(倒置)安装半导体元件21A(参照图15)。
此时，通过加热固化所述粘接剂52，增加半导体元件21A与布线衬底51之间的粘接强度，并且保护半导体元件21A与布线衬底51的连接部位不受湿气等外部环境的影响。
在进行此倒装(倒置)安装时，在涂敷了粘接剂52的状态下，设置在半导体元件21A的下表面的突起电极(凸点)24与布线衬底51的电极53连接。此时，若该粘接剂52的涂敷量过多，则该粘接剂52会超过该半导体元件21A的厚度而漫过半导体元件21A的侧面(参照图16)。
另外，在本实施方式中，比该半导体元件21A面积更大的保护胶带基体材料33隔着第二粘接层34而位于该半导体元件21A的背面与键合工具45之间。即，在半导体元件21A的全部四个边上，该保护胶带基体材料33延伸到该半导体元件21A的侧面的外侧。
因此，该保护胶带基体材料33防止漫过半导体元件21A的侧面的粘接剂52继续漫延，使粘接剂52不能到达键合工具45。
因此，能够在粘接剂52没有粘附在该键合工具45上的情况下，在形状大的布线衬底51上连续装载半导体元件21A。
此外，在所述图12所示的工序中，在从切割胶带基体材料30剥离半导体元件21A后，导体元件21A的一端容纳在托盘41上。但是，毋庸置疑也可能有这样的情况，即，在从切割胶带基体材料31剥离半导体元件21A后，不在托盘41上容纳半导体元件21A，而是上下反转吸附工具43，将该半导体元件21A交接至在上方待机的键合工具45，然后粘着在布线衬底51上。
接着，从该半导体元件21A的上方对装载有多个半导体元件21A的布线衬底51照射紫外线(UV光)(参照图17)。
此时，将紫外线的照射光量设定为使第二粘接层34的固化状态开始的量。例如，在设定使第二粘接层34的固化状态开始所需要的UV照射光量为约500mJ/cm2的情况下，照射约600mJ/cm2的UV。
其结果，设置在半导体元件21A的背面与保护胶带基体材料33之间的第二接着层34发生固化反应，粘合力下降，从而成为保护胶带基体材料33能够从半导体元件21A的背面剥离的状态。
接着，跨过分别设置有多个半导体元件21A的保护胶带基体材料33，粘贴长条状连续的剥离用胶带47，拉拽该剥离用胶带47，从半导体元件21A的背面剥离并除去保护胶带基体材料33(参照图18)。
即，在图18中按箭头所示方向拉拽剥离用胶带47，剥离并除去粘贴在半导体元件21A上的保护胶带基体材料33。
此外，剥离用胶带47的材料、厚度等并无限制，但需要具有能够剥离保护胶带基体材料33的粘合性。
通过此工序，从装载在布线衬底51上的多个半导体元件21A的背面，剥离并除去保护胶带基体材料33(参照图19)。
接着，将装载并粘着在布线衬底51一侧的主面上的半导体元件21A一并用树脂封固。在模具61上安装该布线衬底51，在配置有该布线衬底51一侧的主面的模腔内注入封固用树脂62进行树脂封固处理(参照图20)。
接着，在所述布线衬底51另一侧的主面上，对应于设置在该布线衬底51上的电极53，设置多个构成外部连接端子54的焊锡球(参照图21)。
然后，通过使用切割锯29的刀片切割法，在布线衬底51以及该布线衬底51的一侧的主面上，以通过封固用树脂62树脂封固的半导体元件21A及粘接剂52等作为一个单位，沿虚线X-X′进行分离从而进行单片化的处理(参照图22)。
其结果，形成了这样的半导体器件71(参照图23)，即，半导体元件21A倒装(倒置)安装在布线衬底51上进而被封固用树脂62封固的半导体器件。该半导体器件71又称作BGA(Ball Grid Array：球栅阵列封装)型半导体器件。
这样，根据本第一实施方式，在布线衬底51上使用键合工具45粘着半导体元件21A时，预先涂敷在该布线衬底51上的粘接剂52即使漫过半导体元件21A的侧面，由于存在配置在所述半导体元件21A的背面，且比该半导体元件21A面积更大的保护胶带基体材料33，所以能够阻止所述粘接剂52到达键合工具45。
因此，无需减少向布线衬底51涂敷粘接剂52的涂敷量，能够适用充足的量的粘接剂52，因而能够高可靠性地将半导体元件21A粘着在布线衬底51上。
进而，也不需要在操作键合工具45的装置等上附加用于检测粘接剂52是否粘附在键合工具45上的功能。
[第二实施方式]
接着，用图24～图34对本发明第二实施方式进行说明。此外，图25、图35～图37是主要部分放大剖面图。与所述第一实施方式对应的部位标注相同的附图标记省略详细说明。
准备适用所谓晶片工艺，并在一侧的主面上形成多个半导体元件(LSI元件)而构成的半导体衬底(晶片)21。此外，根据需要，对该半导体衬底21的另一侧的主面(背面)进行研磨处理，减小该半导体衬底21的厚度。
在该半导体衬底21的背面(非电子电路形成面)上粘贴胶带81，将整体固定在贴片环(框架)23上(参照图24)。
该胶带81具有如图25所示的4层结构。即，在切割胶带基体材料31上依次层叠形成热发泡型第一粘接层82、保护胶带基体材料33以及热发泡型第二粘接层84。
作为切割胶带基体材料31的材料能够使用例如聚对苯二甲酸乙二醇酯(PET：Polyethlene Terephthalate)、聚烯烃(PO：Polyolefin)等。但是，并不仅限于这些材料。另外，切割胶带基体材料31的厚度也无限制，例如能够设定为约50～100μm。
另外，由于在后述键合工序中要被加热，所以保护胶带基体材料33需要具有耐热性，适合即使接触粘接剂也难以粘附及固化的聚四氟乙烯类材料。该保护胶带基体材料33的厚度也无限制，例如能够设定为约10～30μm。
另一方面，第一粘接层82以及第二粘接层84为如上所述的热发泡型粘接层，当被加热时发泡，粘合力下降。作为第一粘接层82以及第二粘接层84的材料，并无特别限定，能够适用例如日东电工制造的热剥离薄膜“REVALPHA”。另外，粘接层82以及84的厚度并无特别限制，例如能够设定为约20～50μm。
在该粘接层，设定使第二粘接层84开始发泡的温度高于使第一粘接层82开始发泡的温度。例如，设定使第一粘接层82的发泡状态开始的温度为约90℃，设定使第二粘接层84的发泡状态开始的温度为约150℃。
此外，改变构成粘接层的材料之间的配合比，能够改变使粘接层的发泡状态开始的温度。
接着，与在所述第一实施方式中图9所示的工序相同，通过使用切割锯25的刀片切割的方法，纵横切断半导体衬底21，从而分离为各个半导体元件21A，使半导体元件21A单片化(参照图26)。
此时，切割锯25的宽度设定为例如约50μm以上。该切割锯25切入半导体衬底21，进而切入第二粘接层84，到达保护胶带基体材料33的上表面，形成露出该保护胶带基体材料33的槽26(切割槽)。
接着，与所述第一实施方式中图10所示工序相同，通过使用第二切割锯27的刀片切割的方法，切入在所述切割处理所形成的切割槽26内露出的保护胶带基体材料33以及其下层的第一粘接层82(参照图27)。
该第二切割锯27的宽度(刃厚)小于所述切割锯25的宽度(刃厚)，例如设定为约20μm以下。
通过该切割处理，该第二切割锯27到达切割胶带基体材料31的上表面。其结果，在半导体衬底21以及胶带81上形成槽状的阶梯差(未图示)。
即，通过切割锯25切断并分离半导体衬底21以及第二粘接层84，通过第二切割锯27切断并分离保护胶带基体材料33以及第一粘接层82，使保护胶带基体材料33以及将第一粘接层82的切断宽度B小于半导体衬底21以及第二接着层84的切断宽度A(B<A)。
此外，通过使第二切割锯27的宽度(刃厚)小于切割锯25的宽度(刃厚)，能够使半导体衬底21及第二粘接层84的切断宽度A与保护胶带基体材料33及第一粘接层82的切断宽度B之差更大。
由此，能够形成这样的状态，即，隔着第二粘接层84将比半导体元件21A尺寸更大的保护胶带基体材料33安装在半导体元件21A的背面。
接着，将贴片环23配置在加热块(heat block)91上，从切割胶带基体材料31的下表面一侧加热切割胶带基体材料31(参照图28)
此时，加热温度设定为使第一粘接层82开始发泡，不使第二粘接层84开始发泡的温度。
即，在设定使第一粘接层82的发泡状态开始的温度为约90℃，设定使第二粘接层84的发泡状态开始的温度为约150℃的情况下，将加热块91的温度设定为约100℃，将其碰到切割胶带基体材料31的下表面约5～10秒。
其结果，仅第一粘接层82发泡反应，第二粘接层84并不发泡。
即，形成为如下状态，即，仅使设置于切割胶带基体材料31上的第一粘接层82发泡，粘合力下降，使设置在该第一粘接层82上的保护胶带基体材料33能够从切割胶带基体材料30剥离。
此外，此加热处理能够根据需要进行如下选择，即，可以选择如本例那样通过接触面积与半导体衬底21大致相同大小的的加热块91一并进行加热，或者使用接触面积与单片化后的半导体元件21A大致相同大小的的加热块以半导体元件为单位来进行加热。
然后，隔着第二粘接层84安装保护胶带基体材料33，从该切割胶带基体材料31剥离单片化的半导体元件21A，并将其容纳在托盘41上(参照图29)。
即，在工作台(未图示)上承载切割胶带基体材料31以及在保护胶带基体材料33上支撑的多个半导体元件21A。
在该工作台上设置有连接真空吸引装置的真空吸引孔，通过该真空吸引孔在该工作台上吸附固定所述切割胶带基体材料31。
在此状态下，顶销从切割胶带基体材料31的下方上升，该顶销贯通该切割胶带基体材料31及第一粘接层32后上升，从而从切割胶带基体材料31剥离一个半导体元件21A。
此时，因为第一粘接层82的粘合力下降，所以设置在该第一粘接层32上的保护胶带基体材料33与半导体元件21A以一体化的状态从切割胶带基体材料31上被剥离。
另一方面，对应于该顶销42的上升，在半导体元件21A的上方配置吸附工具43，真空吸附并保持被顶上去的半导体元件21A。
然后，该吸附工具43向托盘41转移该半导体元件21A，并将该半导体元件21A容纳在托盘41上。
这样，比该半导体元件21A面积更大的保护胶带基体材料33隔着第二粘接层34设置在容纳于托盘41上的半导体元件21A的背面。
接着，使用拾取工具44取出容纳于托盘41上的半导体元件21A。然后，上下反转该拾取工具44，将该半导体元件21A交接至在上方待机的键合工具45(参照图30)。
其结果，该键合工具45吸附隔着第二粘接层84而设置在被处理半导体元件21A的背面的保护胶带基体材料33，从而保持该半导体元件21A。
另一方面，在之后的工序中，在装载并粘着有半导体元件21A的布线衬底51的上表面，在装载并粘着该半导体元件21A的部位上，通过喷嘴46涂敷膏状的粘接剂52，该粘接剂52为环氧类树脂等的热固化性树脂等(参照图31)。
如该图所示，在该布线衬底51形状大(大型)并且装载多个半导体元件21A的情况下，对应于每个半导体元件的装载部位，选择性地涂敷粘接剂52。
接着，使用图像处理装置(未图示)对半导体元件21A及布线衬底51进行对位，一边使用所述键合工具45进行加热及加压，一边在布线衬底51上倒装(倒置)安装半导体元件21A(参照图32)。
此时，通过加热固化所述粘接剂52，增加半导体元件21A与布线衬底51之间的粘接强度，并且保护半导体元件21A与布线衬底51的连接部位不受湿气等外部环境的影响。
在进行此倒装(倒置)安装时，在涂敷粘接剂52的状态下，设置在半导体元件21A的下表面上的突起电极(凸点)24与布线衬底51的电极53连接。此时，若该粘接剂52的涂敷量过多，则该粘接剂52超过该半导体元件21A的厚度漫过半导体元件21A的侧面。
此时，在本实施方式中，比该半导体元件21A面积更大的保护胶带基体材料33隔着第二粘接层34而位于该半导体元件21A的背面与键合工具45之间。即，在半导体元件21A的全部四个边上，该保护胶带基体材料33延伸到该半导体元件21A的侧面的外侧。
因此，该保护胶带基体材料33防止漫过半导体元件21A的侧面的粘接剂52继续漫延，使粘接剂52不能到达键合工具45。
因此，在粘接剂52没有粘附在该键合工具45上的情况下，能够在形状大的布线衬底51上，连续装载半导体元件21A。
但是，隔着第二粘接层84在半导体元件21A的背面粘贴有保护胶带基体材料33。
另一方面，为了进行键合处理，将所述键合工具45的加热温度设定为使第二粘接层84的固化状态开始的温度。例如，在设定使第二粘接层84的固化状态开始的温度为约150℃的情况下，将键合工具45产生的加热温度设定为约300℃。
其结果，设置在半导体元件21A的背面与保护胶带基体材料33之间的第二粘接层84发生发泡反应，粘合力降低，从而形成能够从半导体元件21A的背面剥离保护胶带基体材料33以及第二粘接层84的状态。
这样，通过键合工具45所进行的加热，设置在半导体元件21A的背面与保护胶带基体材料33之间的第二粘接层84发生发泡反应，其粘合力降低。
即，形成如下的状态，即，通过吸附保持半导体元件21A的键合工具45，能够将半导体元件21A键合在布线衬底51上，同时，能够从半导体元件21A的背面剥离保护胶带基体材料33。
因此，与所述第一实施方式的情况相比，在本实施方式中能够形成以较少的工序从半导体元件21A的背面剥离保护胶带基体材料33的状态。
接着，跨过分别设置有多个半导体元件21A的保护胶带基体材料33，粘贴长条状连续的剥离用胶带47，拉拽该剥离用胶带47，从半导体元件21A的背面剥离并除去保护胶带基体材料33(参照图33)。
即，在图33中按箭头所示方向拉拽剥离用胶带47，剥离并除去粘贴在半导体元件21A上的保护胶带基体材料33。
此外，剥离用胶带47的材料、厚度等并无限制，但需要具有能够剥离保护胶带基体材料33的粘合性。
通过此工序，从装载在布线衬底51上的多个半导体元件21A的背面，剥离并除去保护胶带基体材料33(参照图34)。
接着，将装载并粘着在布线衬底51一侧的主面上的半导体元件21A一并用树脂封固。在模具61上安装该布线衬底51，在配置有该布线衬底51一侧的主面的模腔内注入封固用树脂62进行树脂封固处理。
接着，在所述布线衬底51另一侧的主面上，对应于设置在该布线衬底51上的电极53，设置多个构成外部连接端子54的焊锡球。
然后，通过使用切割锯29的刀片切割法，在布线衬底51以及在该布线衬底51的一侧的主面上，以通过封固用树脂62树脂封固的半导体元件21A以及粘接剂52等作为一个单位，进行分离从而进行单片化的处理。
其结果，形成了这样的半导体器件，即，在布线衬底51上倒装(倒置)安装半导体元件21A，进而用封固用树脂62封固的半导体器件。(未图示)该半导体器件又称作BGA(Ball Grid Array：球栅阵列封装)型半导体器件。
这样，在本发明的第二实施方式中，在布线衬底51上使用键合工具45粘着半导体元件21A时，预先涂敷在该布线衬底51上的粘接剂52即使漫过半导体元件21A的侧面，因为存在配置在所述半导体元件21A的背面，且比该半导体元件21A面积更大的保护胶带基体材料33，所以能够阻止所述粘接剂52到达键合工具45。
因此，无需减少向布线衬底51涂敷粘接剂52的涂敷量，能够适用充足的量的粘接剂52，因而能够高可靠性地将半导体元件21A粘着在布线衬底51上。
进而，也不需要在操作键合工具45的装置等上附加用于检测粘接剂52是否粘附在键合工具45上的功能。
进而，对于本发明的第二实施方式，在图32所示的键合工序中，能够形成如下的状态，即，使用键合工具45吸附保持半导体元件21A，将其键合在布线衬底51上，同时使第二粘接层84发泡，能够从半导体元件21A的背面剥离保护胶带基体材料33。
因此，与所述第一实施方式的情况相比，可实现以下状态，即，能够以较少的工序数，容易地从半导体元件21A的背面剥离保护胶带基体材料33以及第二粘接层84。
以上，用两种实施方式对本发明进行了说明，但本发明并不仅限于这些实施方式所示的结构，在本发明的范围内可以进行各种变形以及改良。
例如，可以使粘贴在半导体衬底21上的切割胶带形成为图35所示的结构。
即，可以在切割胶带基体材料31上形成依次层叠紫外线(UV)固化型的第一粘接层32、保护胶带基体材料33以及热发泡型的第二粘接层84的四层结构。
在此胶带结构中，为了形成能够容易地从切割胶带基体材料31剥离设置在第一粘接层32上的保护胶带基体材料33的状态，从切割胶带基体材料31的下表面一侧照射紫外线(UV光)，仅使设置在该切割胶带基体材料31上的第一粘接层32固化并使其粘合力降低。
另外，为了形成能够容易地从半导体元件21A的背面剥离保护胶带基体材料33以及第二粘接层84的状态，在使用吸附保持半导体元件21A的键合工具45，在布线衬底51上键合半导体元件21A时，通过键合工具45加热，使设置在半导体元件21A的背面与保护胶带基体材料33之间的第二粘接层84发生发泡反应。使其粘合力降低。
另一方面，取代上述结构，可以采用在切割胶带基体材料31上依次层叠热发泡型的第一粘接层82、保护胶带基体材料33以及紫外线(UV)固化型的第二粘接层34而形成的四层结构。
另外，在上述实施方式中展示了制造BGA(Ball Grid Array)型半导体器件的例子，但本发明不仅限于此半导体器件，所述BGA型半导体器件在布线衬底51的表面安装并连接半导体元件21A，通过封固用树脂62进行树脂封固，其中，所述布线衬底51的背面设置有多个构成外部连接端子55的焊锡球。
即，本发明也能够适用具有图36或图37所示结构的半导体器件的制造。
在图36所示的半导体器件171中，在利用粘接剂52而粘着于布线衬底51上的半导体元件21A上，在使第二半导体元件101的电子电路形成面在上方的状态下，利用芯片键合材料102来装载第二半导体元件101。即所谓的进行两阶段堆叠的多芯片封装(multi-tip package)型半导体器件。
此半导体器件171在所述图19或图34所示的工序后，在半导体元件21A上，在以该电路形成面在上方的状态下，利用芯片键合膜等芯片键合材料102来装载第二半导体元件101，进而，通过键合线(bonding wire)103连接该第二半导体元件101与布线衬底51的电极53。
然后，实施如所述图20～图22所示的实施树脂封固工序、外部连接用端子设置工序以及单片化处理工序，从而形成半导体器件171。
另外，图37所示的半导体器件172是进行两段堆叠的多芯片封装型半导体器件，所述进行两段堆叠的多芯片封装型半导体器件形成为在布线衬底51上，在以半导体元件111的电路形成面为上的状态下，通过芯片键合材料112装载半导体元件111，进而在该半导体元件111上通过粘接剂52装载半导体元件21A。
布线衬底51的电极53与半导体元件111之间通过键合线113连接。
此半导体器件的制造方法如下，即，在布线衬底51上，在以半导体元件111的电路形成面在上方的状态下，利用芯片键合膜等芯片键合材料112装载半导体元件111，并通过键合线113连接该半导体元件111与布线衬底51的电极53，此后通过所述图8～图19或图24～图34所示的工序，在半导体元件111上，通过粘接剂52装载半导体元件21A。在该情况下，半导体元件21A的承载对象是半导体元件111。
然后，实施如所述图20～图22所示的树脂封固工序、外部连接用端子设置工序以及单片化处理工序，从而形成半导体器件172。
此外，在所述本发明的两种实施方式中，在半导体元件21A的背面，隔着第二粘接层设置比该半导体元件21A面积更大的保护胶带基体材料33，在此状态下，抵接键合工具45。
即，在半导体元件21A的全部四个边上，该保护胶带基体材料33延伸到该半导体元件21A的侧面的外侧，在该状态下，按压键合工具45。
这样，通过将保护胶带基体材料33的面积设为大于半导体元件21A的面积，在该保护胶带基体材料33部分，阻止粘接剂的流动(向上漫)，防止该粘接剂到达键合工具45。
为防止该粘接剂向键合工具部流动，一般考虑增加粘接剂流动的延伸面距离，将保护胶带基体材料33的厚度设得更厚。
但是，增加该保护胶带基体材料33的厚度会降低键合工具45所形成的加热效果，而且，使该保护胶带基体材料33的操作变得繁琐等，所以并不实用。
产业上的可利用性
本发明涉及半导体器件的制造方法，能够在布线衬底等的支撑衬底上倒装(倒置)安装具有突起电极的半导体元件时，提高工作效率及制造成品率。

Claims (14)

1.一种半导体器件的制造方法，其特征在于，包括：
在装载有半导体元件的支撑衬底上配设粘接剂的工序；
在一侧的主面上配设有外部连接用端子的所述半导体元件的另一侧的主面上，设置阻止所述粘接剂流动的构件的工序；
隔着所述构件对所述半导体元件加压，将其装载在配设有所述粘接剂的所述支撑衬底上的工序。
2.如权利要求1所述的半导体器件的制造方法，其特征在于，
在将所述构件粘贴在半导体衬底上的状态下，切断所述构件，
切断后的所述构件的面大于从所述半导体衬底中单片化出来的所述半导体元件的另一侧的主面。
3.如权利要求2所述的半导体器件的制造方法，其特征在于，
在隔着第一粘接层而在切割胶带上粘贴所述构件，并且，隔着第二粘接层而在所述半导体衬底上粘贴所述构件的状态下，切断所述构件以及所述半导体衬底。
4.如权利要求3所述的半导体器件的制造方法，其特征在于，
所述半导体衬底以及所述第一粘接层的切断宽度大于所述构件以及所述第二粘接层的切断宽度。
5.如权利要求3或4所述的半导体器件的制造方法，其特征在于，
通过第一切割锯，切断所述半导体衬底以及所述第一粘接层，
通过第二切割锯，切断所述构件以及所述第二粘接层，
所述第一切割锯的宽度大于所述第二切割锯的宽度。
6.如权利要求3～5中任一项所述的半导体器件的制造方法，其特征在于，
所述第一粘接层以及所述第二粘接层为紫外线固化粘接层，
使所述第二粘接层的固化状态开始所需要的紫外线照射光量大于使所述第一粘接层的固化状态开始所需要的紫外线照射光量。
7.如权利要求6所述的半导体器件的制造方法，其特征在于，
形成如下状态，即，在切断所述构件后，从切割胶带一侧照射紫外线而使所述第一粘接层固化，从而能够将粘贴在所述半导体元件上的所述构件从所述切割胶带上剥离。
8.如权利要求6或7所述的半导体器件的制造方法，其特征在于，
形成如下状态，即，在所述键合工序后，从构件一侧照射紫外线而使所述第二粘接层固化，从而能够将所述构件从所述半导体元件的所述背面上剥离。
9.如权利要求3～5所述的半导体器件的制造方法，其特征在于，
所述第一粘接层以及所述第二粘接层为热发泡型粘接层，
使所述第二粘接层的发泡状态开始所需要的温度大于使所述第一粘接层的发泡状态开始所需要的温度。
10.如权利要求9所述的半导体器件的制造方法，其特征在于，
形成如下状态，即，在切断所述构件后，从切割胶带一侧加热而使所述第一粘接层发泡，从而能够将粘贴在所述半导体元件上的所述构件从所述切割胶带上剥离。
11.如权利要求9或10所述的半导体器件的制造方法，其特征在于，
形成如下状态，即，在进行所述键合工序时，通过向构件一侧加热而使所述第二粘接层发泡，从而能够使所述构件从所述半导体元件的所述背面上剥离。
12.如权利要求3～5中任一项所述的半导体器件的制造方法，其特征在于，
所述第一粘接层为紫外线固化粘接层，
所述第二粘接层为热发泡型粘接层。
13.如权利要求12所述的半导体器件的制造方法，其特征在于，
形成如下状态，即，在切断所述构件后，从切割胶带一侧照射紫外线而使所述第一粘接层固化，从而能够使粘贴在所述半导体元件上的所述构件从所述切割胶带上剥离。
14.如权利要求12或13所述的半导体器件的制造方法，其特征在于，
形成如下状态，即，在进行所述键合工序时，通过向所述构件一侧加热而使所述第二粘接层发泡，从而能够使所述构件从所述半导体元件的所述背面上剥离。
CN2006800559601A 2006-09-27 2006-09-27 半导体器件的制造方法 Expired - Fee Related CN101512742B (zh)

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