CN101506970B - 减小基片与基片上的凸出电极之间的应力 - Google Patents

减小基片与基片上的凸出电极之间的应力 Download PDF

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CN101506970B
CN101506970B CN2007800303835A CN200780030383A CN101506970B CN 101506970 B CN101506970 B CN 101506970B CN 2007800303835 A CN2007800303835 A CN 2007800303835A CN 200780030383 A CN200780030383 A CN 200780030383A CN 101506970 B CN101506970 B CN 101506970B
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substrate
projected electrode
semiconductor element
substrate surface
gap
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CN101506970A (zh
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约尔格·贾斯珀
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NXP BV
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Abstract

本发明涉及具有基片和凸出电极的半导体元件。凸出电极具有基片表面，其面向基片并且包括一个通过间隙与基片分离的第一基片表面部分。该间隙允许凸出电极相对基片发生应力补偿形变。凸出电极的基片表面还包括第二基片表面部分，其与基片具有固定的机械连接并具有电连接。由于凸出电极与基片之间的机械连接的覆盖面积较小，凸出电极可以在三个维度上顺应所施加的机械应力，而不会将相同量的应力传递给基片或传递给组件中的外部基片。这使得组件寿命得以提高，在组件中半导体元件通过凸出电极连接至外部基片。

Description

减小基片与基片上的凸出电极之间的应力
技术领域
本发明涉及一种具有基片以及基片上的凸出电极的半导体元件，该凸出电极用于将半导体元件电连接到外部基片上。本发明还涉及包括半导体元件和外部基片的元件外接基片组件，涉及制造半导体元件的方法，并且涉及制造元件外接基片组件的方法。
背景技术
为了在诸如电路板的外部基片上安装半导体元件(如包括集成电路的芯片)，公知的技术是通过半导体元件的内部基片上的凸出电极使半导体元件结合到外部基片上。凸出电极通常形如凸块。注意，在下文中将把半导体元件的内部基片简称为“基片”，外部基片将一直称为“外部基片”而不加省略。
US 5,545,589解决了凸块与半导体元件的基片(其上配置有凸出电极)之间的机械应力的问题。为了避免破裂，在把面向基片的凸块前端通过导电粘合剂固定到基片上之前为凸块前端提供了粗糙表面。这样，接触表面积得以增加，从而提高了粘合强度，改进了机械连接和电连接的可靠性。然而，凸块与基片之间更强固的机械连接仅提高了可容许的机械应力阈值。
发明内容
根据本发明的第一方面，提供一种具有基片和基片上的凸出电极的半导体元件。凸出电极适用于将半导体元件电连接至外部基片。凸出电极具有基片表面，其面向基片并且包括一个通过间隙与基片分离的第一基片表面部分。该间隙允许凸出电极相对基片发生应力补偿形变。凸出电极的基片表面还包括第二基片表面部分，其与基片具有固定的机械连接并具有电连接。
本发明的第一方面的半导体元件通过凸出电极与基片在第二基片表面部分处的机械连接的减小的接触面积(相比于凸出电极的基片表面的全部面积)，减小了凸出电极施加给基片的应力。如果施加了机械应力，则凸出电极有能力通过其相对于基片发生三维形变来顺应该应力。在凸出电极的基片表面的第一基片表面部分处将凸出电极与基片分开的间隙减少了凸出电极与基片之间的接合并且使凸出电极能够发生形变。
凸出电极与基片之间的机械应力，或者在元件外接基片组件中凸出电极与外部基片之间的机械应力例如是由元件与外部基片的热膨胀系数之间的差异导致的。由于元件通常基于硅并且还包括金属层以及由绝缘体构成的层，而外部基片通常由有机材料构成，从而在温度变化时表现出不同的特性。由热膨胀系数的差异所导致的机械应力会造成半导体元件基片上的隔离层的破裂、层的剥离、甚至硅的崩落。在电路板一侧，也已观察到由于所施加的机械应力导致布置在电路板上的薄膜的剥离。
因此，凸出电极与基片之间的机械连接具有更小的覆盖面积(footprint)，本发明的第一方面的半导体元件的凸出电极能够在三个维度上顺应所施加的应力，而不会将相同量的应力传递给基片或者外部基片。不同于增加凸块和基片之间的连接的机械强度(如US5,545,589所建议)，本发明的第一方面的半导体元件具备增强的顺应机械应力的能力。这还使得组件寿命得以提高，在所述组件中半导体元件的基片通过凸出电极连接至外部基片。
本发明具有很宽的应用范围。其可以用于半导体元件和外部基片的组件，用于基于Si、GaAs、SiGe或其它技术的分立元件、用于光学元件、用于机械组件、用于MEMS、以及任何其它使用刚性凸出电极结构的组件。
根据本发明的第二方面，提供一种包括本发明的第一方面的半导体元件的元件外接基片组件，其中所述半导体元件通过凸出电极连接至外部基片。该元件外接基片组件享有本发明的第一方面的半导体元件的优点。
下面将对本发明的第一方面的半导体元件的优选实施例以及元件外接基片组件的优选实施例进行描述。应当理解，半导体元件的优选实施例也构成了包含本发明的第一方面的半导体元件的元件外接基片组件的优选实施例。此外，除非是明确描述的替代实施例，文中所述的实施例可以彼此进行组合。
凸出电极和基片之间的机械连接的覆盖面积可以最小化为在基片和凸出电极之间提供工作状态所需粘合力的所需量。因此，在第一实施例中，第二基片表面部分相对第一基片表面部分所占的面积量与基片和凸出电极之间所需的最小粘合力相对应。在此实施例中，第一基片表面部分的面积比例是最大化的，从而容许凸出电极通过应力引发的形变来尽可能地顺应所施加的机械应力。
可以在基片和凸出电极的第一基片表面部分之间的间隙中填充任何允许凸出电极相对基片发生应力引发的形变的介质。尽管优选气体介质，但是还可以用液态介质或乳浊液来填充间隙，以改善基片与凸出电极之间的热接触。
优选的是，凸出电极的基片表面是平坦的。这提供了易于加工的特别简单的凸出电极几何结构。
在一个替代实施例中，凸出电极的基片表面具有凹进结构，其在第一基片表面部分和基片之间形成间隙。
然而，优选的是，第一基片表面部分和基片之间的间隙包括与基片相关联的凹进结构。此实施例提供了能够通过制造基片期间的很简单的处理技术、以及后续对凸出电极在第一基片表面部分的范围内进行钻蚀(under-etching)来制造的间隙，如在本发明方法的优选实施例的部分所详细说明的。
在刚刚描述的实施例中，凹进结构优选地包括不同的面向凸出电极的表面部分，它们被布置在距离第一基片表面部分中的凸出电极底表面的不同距离处。该凹进结构可以包括例如多个相邻的沟槽状结构，这些结构会在钻蚀步骤中通过毛细效应促进液态蚀刻剂的扩散。
此外，凹进结构优选形成在布置于基片上的叠层中。叠层可以包括例如金属化层以及沉积在金属化层上的钝化层。在这样的层结构中，凸出电极在其第二基片部分与金属化层连接，以建立与基片的电连接。钝化层优选由电绝缘材料如二氧化硅SiO2或氮氧化硅构成。
在一个实施例中，既在凸出电极的基片表面上也在基片侧提供了凹进结构。
凸出电极与基片在第二基片表面部分处的机械粘合优选地通过导电粘合层来增强。该粘合层可以例如沉积在上述层结构中的金属化层上。然而，粘合层不延伸至第一基片表面部分以提供凸出电极的形变能力。
凸出电极优选地形成凸块，如在现有技术中广泛使用的。适用于形成凸出电极的优选材料是金Au和铜Cu。其它的例子有铝Al、银Ag、铂Pt或镍Ni。一般来说，任何能够制造成所需高度、形状并能连接至外部基片的导电层都可适用。
在元件外接基片组件的一个实施例中，外部基片包括金属电极，该金属电极与半导体器件的凸出电极相连接。尽管一般在基片上提供间隙并且不在外部基片上提供间隙较为容易，仍然可以在凸出电极和外部基片的交界处提供相应的应力顺应结构。
根据本发明的第三方面，提供一种在基片上制造半导体元件的方法。该方法包括如下步骤：
在基片上制造用于将半导体元件电连接至外部基片的凸出电极，
在基片和凸出电极在其第一基片表面部分的基片表面之间制造间隙，该间隙容许凸出电极相对基片发生应力顺应形变，
将第二基片表面部分处的凸出电极电连接并机械固定到基片上。
在本发明的上述方法中，制造间隙的步骤是在制造凸出电极的步骤之后进行或者同时进行的。这包含了以多个处理步骤来制造间隙的可能性，其中某些步骤与制造凸出电极的步骤同时进行，某些步骤在制造凸出电极的步骤之后进行。同时制造间隙和电极意味着在尚未完成凸出电极的制造时制造间隙。
此外，对凸出电极的第二基片表面部分进行电连接以及机械固定的步骤是在制造间隙的步骤之前进行或者同时进行的。这包含了以多个处理步骤来制造间隙的可能性，其中某些步骤与将凸出电极电连接并机械固定至内部基片的步骤同时进行，某些步骤在前述步骤之后进行。
本发明的方法提供用于制造本发明的半导体器件的工艺。
本发明的另一个方面是形成元件外接基片组件的方法，该方法包括如下步骤：
提供本发明的第一方面的半导体元件；
提供外部基片；
通过凸出电极连接半导体元件和外部基片。
下面将对本发明的两个方法的优选实施例进行描述。应当理解，第三方面(制造半导体元件)的方法的实施例也能构成第四方面(形成元件外接基片组件)的方法的实施例。另外，除非是明确描述的替代实施例，这些实施例可以彼此进行组合。
在一个优选实施例中，制造间隙的方法包括：
在制造凸出电极结构的步骤之前，制造与基片相关的凹进结构，以及
在制造凸出电极结构的步骤之后，移除该凹进结构与凸出电极在其第一基片表面部分处的基片表面之间的层。
在该实施例中，凸出电极另外用作移除第一基片表面部分和第二基片表面部分以外的粘合层的掩模。在一个实施例中，凹进结构和凸出电极的基片表面之间的部分移除的层是在本发明的半导体元件的其它实施例部分提到过的粘合层。
优选地，从凹进结构和凸出电极在其第一基片表面部分中的基片表面之间移除层的步骤包括使该层暴露于蚀刻剂。优选为液态蚀刻剂。为了促进液态蚀刻剂在第二基片表面部分的扩散，制造凹进结构的步骤优选地包括在凹进结构中制造狭缝，狭缝具有能够通过毛细效应促进液态蚀刻剂扩散的横向宽度。
本发明的另一个方面是用于形成元件基片组件的方法，该方法包括如下步骤：
提供根据本发明第一方面的半导体元件；
提供外部基片；
通过凸出电极连接半导体元件和外部基片。
提供根据本发明第一方面的半导体元件的步骤优选地包括执行根据本发明第三方面或其一个实施例的方法。
本发明的优选实施例还在从属权利要求中进行了限定。应当理解，本发明第一方面的半导体元件和本发明第二方面的组件以及用于形成半导体元件和形成元件外接基片组件的方法具有类似和/或相同的实施例。
附图说明
现参照附图对本发明进行更详细的说明，其中：
图1和图2示出半导体元件的一个实施例的示意性剖视图。
图3和图4示出包含图1和图2的半导体元件的元件外接基片组件的不同示意性剖视图。
图5示出用于在基片上制造半导体元件的方法的流程图。
具体实施方式
图1和图2示出半导体元件的一个实施例的示意性剖视图。图1和图2的两个截面图示出了相互垂直的截面。图1所示的截面在图2中由短划线I-I表示。后文中同时参照图1和图2。
半导体元件100具有基片102和基片102上的凸块104形式的凸出电极。基片102包含集成电路(未示出)，并被叠层106覆盖，所述叠层106包含隔离层108、金属化层110和钝化层112。钝化层112由二氧化硅或氮氧化硅或氮化硅或其组合构成，例如以夹心层结构的层结构形式。也可以是有机材料如聚酰亚胺。金属化层由含Cu或Si的Al构成，或者由Cu构成。在本实施例中，凸块104由Au构成。可替代的材料是Al、Cu、或者Au和Cu的组合。一般来说，任何导电并可以通过焊接、粘合或其它已知技术固定至外部基片(如电路板)以提供机械连接和电连接的材料均可用作凸块。
金属化层110以及其上的钝化层112包含一个凹进结构114。该凹进结构包括金属化层110中的多个开口，在示意图中以示例的形式示出了其中的开口116至126。开口116至126产生了金属化线的规则间隔的栅格。金属化线具有横向宽度w和横向间距p，对横向间距p进行选择来容许在钝化层112的保形沉积期间形成狭缝(如开口120中的狭缝128)。狭缝的横向宽度适于形成沟槽，这些沟槽通过毛细效应来促进液态蚀刻剂的扩散。这样，凹进结构114使得能够在制造期间在基片102上的叠层106和凸块104之间间隙，如将对图5的说明部分所详细说明的。该凹进结构还在基片侧限定了凸块104和钝化层112之间的间隙的轮廓。显然，钝化层112的不同表面部分被布置在距离凸出电极在其第一基片表面部分132的底表面的不同距离处。
凸块104具有面向基片102的基片表面130。基片表面130具有在凹进结构114上延伸的第一基片表面部分132。第一基片表面部分基本上是平坦的。第二基片表面部分134在凹进结构114的横向区域以外延伸，并且与粘合层136接触。粘合层136是可导电的。钝化层112中的开口138被伸入其中的粘合层136和凸出块部分140填充。
这样，凸块104通过粘合层136与金属化层110机械连接和电连接。但是凸块104和基片之间的机械接触仅限于第二基片表面部分134。凸块104与基片在第一基片表面部分130处通过凹进接口114和第一基片表面部分132之间的间隙分开。这种结构保持了电接触不受影响，但减小了基片与凸块之间的机械接触的覆盖面积。机械接触被减小到可确保凸块至元件所需最小粘合力的程度。
凸块104和下面的基片之间减小的机械连接覆盖面积减小了二者之间所施加的机械应力，例如在半导体元件受热或受冷的情况下。由于元件和凸块通常具有不同的材料成分，因此二者由于其各自的热膨胀系数而对变化温度具有不同的机械适应度。如果由于热效应或机械冲击而产生了机械应力，则凸块104能够在三个维度上顺应应力，而不会将应力施加给下面的基片(包括叠层106)。
这样就能够避免层结构106的层的剥离或者材料从基片102中崩落。
图3和图4示出包括图1和图2中的半导体元件的元件外接基片组件的不同示意性剖视图。具体来说，图3和图4的元件外接基片组件200包括图1和图2的半导体元件100。另外，元件外接基片组件200包括带有金属电极204的电路板202形式的外部基片，该外部基片通过例如焊接连接至凸块104。
元件外接基片组件200具有更好地顺应例如在热循环期间或者受到机械冲击时所产生的机械应力的优点。在这种情况下，施加在基片202、凸块104、半导体元件100的基片102及其顶部的层结构之间的机械应力的量得以减小。
电路板202通常由有机材料构成，其一般具有比半导体元件100的不同层更高的热膨胀系数。在现有器件中，这样的机械应力会导致电路板上的薄膜的剥离。该问题在允许凸块104在三个维度上顺应机械应力的元件外接基片组件200中得以避免。这使得组件寿命得以提高。
半导体元件可以基于硅或其它基片材料，如砷化镓(GaAs)、硅锗(SiGe)或其它基片材料。图1至图4的元件及组件结构还可以形成光学组件或电光组件、机械组件、MEMS或其组合。类似的，任何其它使用刚性凸块型结构的组件都可以形成半导体元件100或元件外接基片组件200。
图5示出用于在基片上制造半导体元件的方法的流程图。本发明该方法的这个实施例涉及图1至图4的半导体元件100和元件外接基片组件200的制造。
在第一步骤300中，半导体元件100的制造到达金属化层110的沉积。
随后，在步骤302中，通过适当的图案形成技术(如光刻法)在金属化层110中形成开口116至126来为金属化层形成横向结构。在后续的处理步骤304中，沉积钝化层112，优选使用保形沉积技术。这样，形成了诸如狭缝128的小狭缝，它们形成能够在后面的处理中促进蚀刻剂传播的毛细沟槽。
然后，在钝化层112的顶部沉积粘合层136(步骤306)。使用保形沉积技术来形成粘合层。此时，粘合层覆盖整个基片表面。
然后使用本身已知的技术来在钝化层112和粘合层136的顶部制造凸块104(步骤308)。在一个实施例中，该步骤包括金属的掩模沉积。
在下一个处理步骤中，从基片所有未被凸块104覆盖的部分移除粘合层136。此外，使用凹进结构114在第一基片表面部分132的下面在钝化层和凸块104的基片表面130之间制造间隙(步骤310)。当液态蚀刻剂穿透并蚀刻粘合层136，则形成了间隙。通过在凹进结构中形成的沟槽使蚀刻剂扩散来提供支撑。这样凹进结构中提供的沟槽用于形成间隙。于是移除了第一基片表面部分132下面的粘合层136。
下面对到此为止的处理进行概括：
步骤300：制造半导体元件结构到达金属化层。
步骤302：制造凹进结构。
步骤304：沉积钝化层。
步骤306：沉积粘合层。
步骤308：制造凸出电极。
步骤310：从凸出电极的第一基片表面部分的下面移除粘合层。
为了制造诸如组件200的组件，半导体元件100在金属电极204处与电路板202接触。随后使用已知的技术来将凸块104附接至金属电极204。
尽管在附图和前述说明中对本发明进行了具体图解和说明，但这些图解和说明应当认为是说明性或者示例性而非限定性；本发明不限于所公开的实施例。
本发明的应用包括但不限于电子、光电、MEMS、生物医学技术和传感器领域的元件和组件。
本领域的技术人员在实践所要求的发明时可以通过对附图、公开和权利要求的研究来理解和实现所公开实施例的其它变型。
在权利要求中，词语“包括”并不排除其它的元素或步骤，不定冠词“一种”或“一个”并不排除多种或多个。
权利要求中的任何参考标号均不应理解为对发明范围的限制。

Claims (9)

1.一种半导体元件(100)，具有基片(102)和基片上的凸出电极(104)，所述凸出电极用于将半导体元件电连接至外部基片(202)，
其中所述凸出电极具有基片表面(130)，所述基片表面(130)面向所述基片并且包括通过间隙(114)与基片分离的第一基片表面部分(132)，所述间隙(114)允许凸出电极相对基片发生应力补偿形变，所述基片表面(130)还包括第二基片表面部分(134)，其与基片具有固定的机械连接和电连接，以及
其中所述间隙包括与基片相关联的凹进结构(114)，所述凹进结构包括布置在距离凸出电极在其第一基片表面部分(132)的底表面不同距离处的不同表面部分，
其特征在于所述凹进结构中形成有狭缝(128)。
2.如权利要求1所述的半导体元件，其中所述间隙被气体介质填充。
3.如权利要求1所述的半导体元件，其中凸出电极的基片表面(130，132，134)是平坦的。
4.如权利要求1所述的半导体元件，其中凹进结构在叠层(106)中形成，所述叠层(106)布置在基片(102)上。
5.如权利要求4所述的半导体元件，其中所述叠层在从基片到凸出电极的方向上包括金属化层(110)和钝化层(112)，并且其中凸出电极在其第二基片表面部分(134)处与金属化层(110)连接。
6.如权利要求5所述的半导体元件，其中凸出电极在其第二基片表面部分(134)处通过导电粘合层(136)固定至金属化层(110)。
7.一种元件外接基片组件(200)，包括如权利要求1所述的半导体元件(100)，其中半导体元件(100)通过凸出电极(104)连接至外部基片(202)。
8.一种在基片(102)上制造半导体元件(100)的方法，包括如下步骤：
在基片(102)上制造用于将半导体元件电连接至外部基片(202)的凸出电极(104)；
在基片和凸出电极在其第一基片表面部分(132)的基片表面(130)之间制造间隙(114)，所述间隙允许凸出电极相对基片发生应力补偿形变；
将在第二基片表面部分(134)的凸出电极(104)电连接并机械固定至基片(102)；
其中制造间隙的步骤是在制造凸出电极的步骤之后进行或者同时进行的；
其中将凸出电极的第二基片表面部分电连接和机械固定的步骤是在制造间隙的步骤之前进行或者同时进行的；
其中制造间隙的步骤包括在制造凸出电极结构的步骤之前，制造与基片(102)相关联的凹进结构(114)，所述凹进结构包括布置在距离凸出电极在其第一基片表面部分(132)的底表面不同距离处的不同表面部分；以及
在制造凸出电极结构的步骤之后，移除凹进结构(114)和凸出电极在其第一基片表面部分(132)的基片表面(130)之间的层；
其特征在于，移除所述层的步骤包括将所述层暴露于蚀刻剂，并且其中制造凹进结构的步骤包括在凹进结构(114)中制造狭缝(128)，所述狭缝具有能够通过毛细效应促进液态蚀刻剂扩散的横向宽度。
9.一种形成元件基片组件(200)的方法，包括如下步骤：
提供如权利要求1所述的半导体元件(100)；
提供外部基片(202)；以及
通过凸出电极(104)连接半导体元件和外部基片。
CN2007800303835A 2006-08-17 2007-08-13 减小基片与基片上的凸出电极之间的应力 Expired - Fee Related CN101506970B (zh)

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