CN101465336A - 具有含硅铜布线层的半导体器件及其制造方法 - Google Patents
具有含硅铜布线层的半导体器件及其制造方法 Download PDFInfo
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- CN101465336A CN101465336A CNA2009100034702A CN200910003470A CN101465336A CN 101465336 A CN101465336 A CN 101465336A CN A2009100034702 A CNA2009100034702 A CN A2009100034702A CN 200910003470 A CN200910003470 A CN 200910003470A CN 101465336 A CN101465336 A CN 101465336A
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- copper
- silicon
- insulating interlayer
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- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02167—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon carbide not containing oxygen, e.g. SiC, SiC:H or silicon carbonitrides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/312—Organic layers, e.g. photoresist
- H01L21/3121—Layers comprising organo-silicon compounds
- H01L21/3122—Layers comprising organo-silicon compounds layers comprising polysiloxane compounds
- H01L21/3124—Layers comprising organo-silicon compounds layers comprising polysiloxane compounds layers comprising hydrogen silsesquioxane
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
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Abstract
Description
Claims (13)
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JP2002132780 | 2002-05-08 | ||
JP132780/2002 | 2002-05-08 | ||
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JP302841/2002 | 2002-10-17 |
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CNB021513066A Division CN100464417C (zh) | 2002-05-08 | 2002-11-15 | 具有含硅铜布线层的半导体器件及其制造方法 |
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CN101465336A true CN101465336A (zh) | 2009-06-24 |
CN101465336B CN101465336B (zh) | 2011-12-07 |
Family
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CNB021513066A Expired - Fee Related CN100464417C (zh) | 2002-05-08 | 2002-11-15 | 具有含硅铜布线层的半导体器件及其制造方法 |
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CNB021513066A Expired - Fee Related CN100464417C (zh) | 2002-05-08 | 2002-11-15 | 具有含硅铜布线层的半导体器件及其制造方法 |
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US (1) | US20030209738A1 (zh) |
KR (1) | KR100542644B1 (zh) |
CN (2) | CN101465336B (zh) |
TW (1) | TW559999B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103681470A (zh) * | 2012-09-05 | 2014-03-26 | 瑞萨电子株式会社 | 半导体器件及其制造方法 |
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US7727881B1 (en) | 2004-11-03 | 2010-06-01 | Novellus Systems, Inc. | Protective self-aligned buffer layers for damascene interconnects |
US7727880B1 (en) | 2004-11-03 | 2010-06-01 | Novellus Systems, Inc. | Protective self-aligned buffer layers for damascene interconnects |
US7704873B1 (en) | 2004-11-03 | 2010-04-27 | Novellus Systems, Inc. | Protective self-aligned buffer layers for damascene interconnects |
US7396759B1 (en) | 2004-11-03 | 2008-07-08 | Novellus Systems, Inc. | Protection of Cu damascene interconnects by formation of a self-aligned buffer layer |
JP5180426B2 (ja) * | 2005-03-11 | 2013-04-10 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
JP5204370B2 (ja) * | 2005-03-17 | 2013-06-05 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
FR2891084A1 (fr) * | 2005-07-07 | 2007-03-23 | St Microelectronics Sa | REALISATION D'UNE BARRIERE CuSiN AUTO ALIGNEE |
KR100771370B1 (ko) * | 2005-12-29 | 2007-10-30 | 동부일렉트로닉스 주식회사 | 반도체 장치의 금속 배선 및 그 형성 방법 |
US7557447B2 (en) * | 2006-02-06 | 2009-07-07 | Nec Electronics Corporation | Semiconductor device and method for manufacturing same |
KR100818108B1 (ko) * | 2007-02-06 | 2008-03-31 | 주식회사 하이닉스반도체 | 다마신 공정을 이용한 반도체 소자의 다층 금속배선형성방법 |
JP5175059B2 (ja) * | 2007-03-07 | 2013-04-03 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
US7858510B1 (en) | 2008-02-28 | 2010-12-28 | Novellus Systems, Inc. | Interfacial layers for electromigration resistance improvement in damascene interconnects |
US7648899B1 (en) | 2008-02-28 | 2010-01-19 | Novellus Systems, Inc. | Interfacial layers for electromigration resistance improvement in damascene interconnects |
US7737029B2 (en) * | 2008-03-18 | 2010-06-15 | Samsung Electronics Co., Ltd. | Methods of forming metal interconnect structures on semiconductor substrates using oxygen-removing plasmas and interconnect structures formed thereby |
JP5501586B2 (ja) * | 2008-08-22 | 2014-05-21 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
US8268722B2 (en) * | 2009-06-03 | 2012-09-18 | Novellus Systems, Inc. | Interfacial capping layers for interconnects |
CN102468224A (zh) * | 2010-11-17 | 2012-05-23 | 中芯国际集成电路制造(北京)有限公司 | 半导体互连结构的制作方法 |
JP5782279B2 (ja) | 2011-01-20 | 2015-09-24 | 株式会社Screenホールディングス | 基板処理方法および基板処理装置 |
TWI541938B (zh) | 2011-06-03 | 2016-07-11 | 諾菲勒斯系統公司 | 用於互連的含金屬及矽覆蓋層 |
JP5898549B2 (ja) * | 2012-03-29 | 2016-04-06 | 株式会社Screenホールディングス | 基板処理方法および基板処理装置 |
KR101950867B1 (ko) * | 2012-08-27 | 2019-04-26 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
CN104465499A (zh) * | 2014-11-26 | 2015-03-25 | 上海华力微电子有限公司 | 一种改善电迁移特性的方法 |
US9633896B1 (en) | 2015-10-09 | 2017-04-25 | Lam Research Corporation | Methods for formation of low-k aluminum-containing etch stop films |
US10651080B2 (en) | 2016-04-26 | 2020-05-12 | Lam Research Corporation | Oxidizing treatment of aluminum nitride films in semiconductor device manufacturing |
US10049869B2 (en) * | 2016-09-30 | 2018-08-14 | Lam Research Corporation | Composite dielectric interface layers for interconnect structures |
US9859153B1 (en) | 2016-11-14 | 2018-01-02 | Lam Research Corporation | Deposition of aluminum oxide etch stop layers |
EP3643495B1 (en) * | 2017-06-21 | 2023-11-01 | AGC Inc. | Article having water- and oil-repellent layer formed thereon, and method for manufacturing same |
CN108054136A (zh) * | 2017-11-16 | 2018-05-18 | 上海华力微电子有限公司 | 铜互连工艺方法 |
CN110571189B (zh) * | 2018-06-05 | 2022-04-29 | 中芯国际集成电路制造(上海)有限公司 | 导电插塞及其形成方法、集成电路 |
US10734308B2 (en) * | 2018-11-20 | 2020-08-04 | Nanya Technology Corporation | Semiconductor device and method for manufacturing the same |
CN113327888B (zh) * | 2020-02-28 | 2022-11-22 | 长鑫存储技术有限公司 | 半导体结构的制造方法 |
CN114695224A (zh) * | 2020-12-29 | 2022-07-01 | 联华电子股份有限公司 | 芯片键合对准结构与键合芯片结构及其制作方法 |
CN117524980B (zh) * | 2024-01-04 | 2024-04-30 | 合肥晶合集成电路股份有限公司 | 顶层金属的制备方法及半导体结构 |
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KR19980084723A (ko) * | 1997-05-24 | 1998-12-05 | 김영환 | 반도체 소자의 다층 금속배선 및 그 형성방법 |
KR100274339B1 (ko) * | 1997-06-30 | 2001-01-15 | 김영환 | 반도체소자의금속배선형성방법 |
JP3191759B2 (ja) * | 1998-02-20 | 2001-07-23 | 日本電気株式会社 | 半導体装置の製造方法 |
JP2000114374A (ja) * | 1998-10-08 | 2000-04-21 | Toshiba Corp | 半導体装置およびその製造方法 |
US6255217B1 (en) * | 1999-01-04 | 2001-07-03 | International Business Machines Corporation | Plasma treatment to enhance inorganic dielectric adhesion to copper |
US6251775B1 (en) * | 1999-04-23 | 2001-06-26 | International Business Machines Corporation | Self-aligned copper silicide formation for improved adhesion/electromigration |
-
2002
- 2002-10-24 TW TW091124869A patent/TW559999B/zh not_active IP Right Cessation
- 2002-10-28 US US10/281,321 patent/US20030209738A1/en not_active Abandoned
- 2002-11-08 KR KR1020020069151A patent/KR100542644B1/ko not_active IP Right Cessation
- 2002-11-15 CN CN2009100034702A patent/CN101465336B/zh not_active Expired - Fee Related
- 2002-11-15 CN CNB021513066A patent/CN100464417C/zh not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103681470A (zh) * | 2012-09-05 | 2014-03-26 | 瑞萨电子株式会社 | 半导体器件及其制造方法 |
CN103681470B (zh) * | 2012-09-05 | 2018-05-15 | 瑞萨电子株式会社 | 半导体器件及其制造方法 |
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TW559999B (en) | 2003-11-01 |
KR100542644B1 (ko) | 2006-01-11 |
CN101465336B (zh) | 2011-12-07 |
KR20030087518A (ko) | 2003-11-14 |
CN1457095A (zh) | 2003-11-19 |
CN100464417C (zh) | 2009-02-25 |
US20030209738A1 (en) | 2003-11-13 |
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