CN101421920B - 用于改进密封电子器件中的散热的方法以及密封电子器件 - Google Patents
用于改进密封电子器件中的散热的方法以及密封电子器件 Download PDFInfo
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- CN101421920B CN101421920B CN2004800406541A CN200480040654A CN101421920B CN 101421920 B CN101421920 B CN 101421920B CN 2004800406541 A CN2004800406541 A CN 2004800406541A CN 200480040654 A CN200480040654 A CN 200480040654A CN 101421920 B CN101421920 B CN 101421920B
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Abstract
一种用于改进在通常被称作芯片尺寸的SAW封装的密封电子封装中的散热的方法。该封装包括制作在管芯上的一个或更多声波部件,该管芯布置在通过导电凸点分开的非导电载体上。封装的顶部被叠层和密闭密封层覆盖。通过去除叠层的一部分以及然后在封装上淀积一层导热材料,并且通过提供通过载体的一个或更多导热路径,可以改进散热。
Description
技术领域
本发明一般地涉及密封电子部件,并且更特别地,涉及芯片尺寸的SAW封装。
背景技术
已知体声波(BAW)器件一般由在两个用作电极的导电层之间夹一个压电层而组成。当射频(RF)信号施加穿过该器件时,它在压电层中产生机械波。当(由RF信号产生的)机械/声波的波长约为压电层的厚度的两倍时,发生基频谐振。尽管BAW器件的谐振频率也依赖于其他因素,但压电层的厚度是确定谐振频率的主导因素。随着压电层的厚度减小,谐振频率增加。传统地,BAW器件被制作在石英晶体片上。通常,使用该制作方法难以实现高谐振频率的器件。在通过在无源衬底材料上淀积薄膜层来制作BAW器件中,可以将共振频率扩展为0.5-10GHz的范围。这些类型的BAW器件通常被称作薄膜体声谐振器或FBAR。主要有两种类型的FBAR,即BAW谐振器和叠置晶体滤波器(SCF)。这两种类型的器件之间的不同之处主要在于它们的结构。SCF通常具有两个或更多压电层以及三个或更多电极,其中一些电极接地。FBAR通常组合使用以产生带通或带阻滤波器。一个串联FBAR和一个并联FBAR的组合构成所谓的梯型滤波器的一部分。梯型滤波器的描述可以在例如Ella(美国专利No.6,081,171)中得到。正如在Ella中公开的,基于FBAR的器件可以具有一个或更多保护层,通常称作钝化层。在图1中示出了一种典型的基于FBAR的器件。如图1所示,该FBAR器件1包括衬底2、底部电极4、压电层6、顶部电极8、调谐层20和钝化层10。FBAR器件1可以附加地包括声学反射镜(acoustic mirror)12,其 由在两个低声学阻抗层14和18之间夹一个高声学阻抗层16而组成。该反射镜通常但并不总是包括成对的高阻抗层和低阻抗层(偶数层)。一些反射镜包括两对这样的层,以例如SiO2,W,SiO2,W这样的序列设置。代替该反射镜,FBAR器件可以附加地包括一个或更多SiO2和牺牲层的膜层。衬底2可以由硅(Si)、二氧化硅(SiO2)、砷化镓(GaAs)、玻璃或陶瓷材料制成。底部电极4和顶部电极8可以由金(Au)、钼(Mo)、钨(W)、铜(Cu)、镍(Ni)、铌(Nb)、银(Ag)、钽(Ta)、钴(Co)、铝(Al)、钛(Ti)或其他导电材料制成。压电层6可以由氧化锌(ZnO)、硫化锌(ZnS)、氮化铝(AlN)、钽酸锂(LiTaO3)或所谓锆钛酸铅镧族的其他成员制成。钝化层可以由SiO2、Si3N4或聚酰亚胺制成。低声学阻抗层14和18可以由Si、SiO2、多晶硅、Al或聚合物制成。高声学阻抗层16可以由Au、Mo或钨(W)制成,并且在某些情况下,可以由诸如AlN的介电层制成多个成对的层。通常设计FBAR梯型滤波器使得串联谐振器在一个大致等于或接近所期望的或设计的相应滤波器的中心频率的频率下产生串联谐振。类似地,并联或平行的谐振器在离串联FBAR谐振略微有所偏移的频率下产生并联谐振。串联谐振器通常设计为在中心频率具有其传输中的最大峰值,所以信号通过串联谐振器被传输。相反地,并联谐振器设计为具有其传输中的最小值,使得信号不被短路为接地。FBAR在这样一些频率下产生并联谐振和串联谐振,即这些频率之间相差一个量,除了诸如在器件内采用的层或其他材料的类型的其他因素之外,该量是用于制作该器件的压电材料的压电系数的函数。特别地,FBAR梯型滤波器产生具有这样带宽的带通,该带宽是例如用于形成谐振器的压电层的材料的类型以及器件中各种层的厚度的函数。
在密封封装中,倒装芯片技术已经被用于组装FBAR滤波器。倒装芯片是描述将管芯(die)电连接到封装载体的方法的术语。管芯基本上是在其上制作有诸如FBAR滤波器的一个或更多有源部件的衬底,如图2中所示。如所示,管芯30包括衬底2和两个有源部件 或芯片1。衬底通常是硅晶片的一部分。封装载体是由低温共烧陶瓷(LTCC)或高温共烧陶瓷(HTCC)制成的电路板。在制作倒装芯片封装的工艺中,将管芯面向下放置,使得芯片1面向封装载体。通过键合到管芯和封装载体的多个导线,实现管芯和封装载体之间的电接触。更普遍地,在管芯和封装载体之间布置导电“凸点”。
在图3a至图3d中示出了倒装芯片工艺。如图3a所示,在封装载体50上安装多个管芯30,通过多个凸点52电连接。在该封装的顶部上淀积一层叠层材料40,覆盖整个管芯30和相邻管芯30之间的区域,如图3b所示。该叠层40通常由诸如EspandexTM无粘性聚酰亚胺(Adhesiveless Polyimide)的聚酰亚胺制成。尽管叠层40可以向芯片1和管芯30提供机械保护,但它不是密闭的。随着时间流逝,水汽会渗入叠层40,对芯片造成损坏。因而,使用一种不同的材料来密闭地密封该封装以抵抗污染。为此,将覆盖相邻管芯30之间的区域的叠层40的部分去除,以露出封装载体50的一部分,如图3c所示。将密闭密封层42施加在叠层40的顶部以及封装载体50的部分上,如图3d所示。密闭密封层42通常由铜等制成。随后,将封装载体切割成单独的封装60,如图4所示。
在图4中示出了单独的封装60。该封装通常被称作芯片尺寸的SAW封装(CSSP)。如图中所示,封装内部的芯片1通过多个凸点52和互连过孔54电连接到外部电路70。该电路70还被称为表面安装器件(SMD)焊盘,并且该互连过孔54被称作通孔接触(through-contacting)。
在典型的FBAR滤波器中,特别是在高功率水平下,在滤波器芯片内部的内部热分布会成为问题。对于FBAR滤波器或复用器,不均匀的内部热分布限制了最高的可用功率水平。特别地,当FBAR滤波器和复用器布置在一个密封封装中时,散热是主要关心的问题。改进这种封装中的散热以便提高功率持久性是有利的并且是所期望的。
发明内容
本发明的主要目的在于改进密封电子封装中的散热,其中该封装包括制作在一个管芯上的一个或更多电子部件,该管芯布置在非导电载体上。经由在管芯与载体的上表面之间的多个导电凸点以及将载体的上表面连接到下表面的多个互连过孔,管芯被电连接到外部电路。在封装的顶部上,使用覆盖管芯的背侧的叠层和密闭密封金属层来密封其中的电子部件。该目的可以通过以下来实现:
1)减少或除去覆盖封装的顶部的叠层的一部分;
2)在封装的顶部上淀积一层导热材料,其中导热材料还用作密闭密封的部分,以及
3)提供通过载体的一条或更多条热路径,将载体上表面上的密闭密封热连接到载体下表面上的导热元件。
因而,本发明的第一方面提供一种用于改进密封电子器件中的散热的方法,该密封器件包括:
载体,具有第一表面和相对的第二表面;
多个导电凸点,布置在载体的第一表面上;
多个导电部分,布置在载体的第二表面上;
多个导电路径,提供在载体的第一表面和第二表面之间,用于将凸点电连接到导电部分;
管芯,布置在凸点的顶部上,经由导电路径和凸点,电连接到导电部分;
叠层,提供在管芯的顶部以及至少载体的第一表面的一部分上;以及
密闭密封层,覆盖叠层以及载体的第一表面的另一部分。该方法包括:
去除在管芯顶部上的叠层的一部分,用于提供清除区域;以及
在该清除区域上提供导热层,使得通过该导热层来改进密封器件的散热。
该方法进一步包括:
提供通过载体的至少一个导热路径,将在载体的第一表面上的密闭密封层热连接到载体的第二表面。
该导热层可以包括金属层和另外的密闭密封层。
导热层可以延伸到清除区域之外以覆盖剩余叠层部分的至少一部分。
根据本发明,管芯包括一个或更多声波器件,包括FBAR器件。FBAR器件可以包括声学反射镜、衬底和布置在声学反射镜与衬底之间的诸如氮化铝的导热介电层。
本发明的第二方面提供一种密封电子器件,其包括:
载体,具有第一表面和相对的第二表面;
多个导电凸点,布置在第一表面上;
多个导电部分,布置在第二表面上;
多个导电路径,提供在载体的第一表面和第二表面之间,用于将凸点电连接到在第二表面上的导电部分;
管芯,具有第一表面和第二表面,该管芯布置在凸点的顶部上,通过导电路径和凸点,将管芯的第一表面电连接到载体的第二表面上的导电部分,其中管芯的第二表面具有内区域和围绕内区域的外区域;
叠层,至少提供在管芯的第二表面的外区域以及载体的第一表面的至少一部分上;以及
密闭密封层,覆盖叠层、管芯的第二表面的内区域以及载体的第一表面的另一部分,其中密闭密封层包括导热层。
覆盖管芯的第二表面的内区域的密闭密封层比覆盖叠层的密闭密封层厚。
叠层还可以提供在管芯的第二表面与密闭密封层之间的内区域上,并且其中提供在内区域上的叠层比覆盖第二表面的外区域的叠层薄。
该器件可以进一步包括通过载体的至少一个导热路径,将载体的第一表面上的密闭密封层热传导到载体的第二表面。
通过阅读结合图5至图10所作出的详细描述,本发明将变得明显。
附图说明
图1是示出了薄膜体声谐振器的示意性表示。
图2是示出了管芯的示意性表示。
图3a是示出了在倒装芯片封装工艺中安装在载体上的多个管芯的示意性表示。
图3b是示出了在载体和安装于其上的管芯的顶部上涂覆的叠层的示意性表示。
图3c是示出了被去除的叠层的部分的示意性表示。
图3d是示出了涂覆在叠层的顶部上的密闭密封层的示意性表示。
图4是示出了单独的芯片尺寸的SAW封装(CSSP)的示意性表示。
图5是示出了根据本发明去除了在CSSP的顶部上的叠层的示意性表示。
图6a是示出了在倒装芯片封装工艺期间去除了在CSSP的顶部上的叠层的示意性表示。
图6b是示出了在倒装芯片封装工艺期间在另一个步骤中去除了在CSSP的顶部上的叠层的示意性表示。
图7是示出了根据本发明为改进散热而在改型CSSP的顶部上淀积的一层厚的密闭密封材料的示意性表示。
图8是示出了根据本发明在CSSP的载体中提供的热路径的示意性表示。
图9是示出了本发明的另一个实施例的示意性表示。
图10是示出了为进一步改进散热而在密闭密封材料的顶部上布置的导热层的示意性表示。
图11是示出了根据本发明的具有在声学反射镜和衬底之间布置 的导热介电层的FBAR器件的示意性表示。
具体实施方式
在诸如图4所示的芯片尺寸的SAW封装(CSSP)的密封封装中,通过叠层40和密闭密封层42以及部分地通过载体50和互连过孔54,可以使密封封装内部产生的热部分地耗散掉。叠层40通常由聚酰亚胺制成。在典型的CSSP中,叠层约为40μm厚,以便为封装中的电子部件提供充足的机械保护。密闭密封层42通常是约10μm的非常薄的铜涂层。该密闭密封层本身不足以提供充足的机械保护。此外,在没有叠层的情况下,不能直接在封装的顶部上淀积薄铜层来密封在管芯30与封装载体50的上表面之间的间隙。叠层40提供从管芯30到载体50的上表面的较平滑的过渡。然而,叠层40是较差的热导体,并且CSSP中的层结构在热去除上不是有效的。
根据本发明,通过减小或除去在封装60的顶部上的叠层40的区域,可以改进热去除。在部分地去除或减小叠层40之后,在封装60的顶部上产生清除区域44。可以以多种不同的方式去除叠层40。例如,可以使用激光切割机来去除单独的封装60中叠层的部分,如图5所示。
可选地,在叠层40的顶部上淀积密闭密封层42之前(图3c),可以连同在封装之间的叠层区域一起去除封装60的顶部上的叠层的部分,如图6a所示。当在倒装芯片封装工艺中在叠层40的顶部上淀积密闭密封层42时,密闭密封层42的部分填入清除部分44。同样地,密闭密封层42也直接与管芯30接触,或者通过薄层的叠层材料而与管芯30分开。
在叠层40的顶部上淀积密闭密封层42之后,也可以连同密闭密封层的部分一起去除在封装60的顶部上的叠层区域,如图6b所示。
为了增加密闭密封层的热去除功能,优选地在清除部分44的顶部上淀积较厚的密闭密封层42’,如图7所示。例如,在封装顶部上的密闭密封层的厚度可以为100μm。
通过提供多个热过孔80,还可以进一步改进封装60的散热,如图8所示。热过孔80提供从载体的上表面上的密闭密封层42到载体50的下表面的热路径。例如,在下表面上,热路径可以连接到SMD(表面安装器件)的接地平面。
应注意到,覆盖叠层40的密闭密封部分42和覆盖管芯30上方的清除区域44的密闭密封部分42’(见图5-图6b,图7和图8)可以由相同材料制成,所以在制成清除区域44之后可以同时淀积二者(见图6a)。可选地,部分42和部分42’可以不同。密闭密封部分42’也可以覆盖部分42,或甚至覆盖整个封装60′,如图9所示。此外,可以在密闭密封部分42’的顶部上淀积附加的导热层43(密闭的或者不密闭的),以进一步改进散热,如图10所示。而且,清除区域44不一定没有叠层材料,只要剩余的足够薄使得它不成为热阻挡层即可。
通过在FBAR器件1’中的声学反射镜和衬底之间布置热分布层45,可以进一步改进CSSP内的热分布,如图11所示。层45可以由氮化铝(AlN)或者任何良导热电介质制成。
因而,尽管已经关于本发明的优选实施例描述了本发明,但本领域技术人员将会理解到,在不脱离本发明的范围的情况下,可以做出其形式或细节上的上述以及各种其他改变、省略和异化。
Claims (17)
1.一种用于改进密封电子器件中的散热的方法,所述密封器件的特征在于:
载体,具有第一表面和相对的第二表面;
多个导电凸点,布置在所述载体的所述第一表面上;
多个导电部分,布置在所述载体的所述第二表面上;
多个导电路径,提供在所述载体的所述第一表面和所述第二表面之间,用于将所述凸点电连接到所述导电部分;
管芯,布置在所述凸点的顶部上,经由所述导电路径和所述凸点,电连接到所述导电部分;
叠层,提供在所述管芯的顶部以及所述载体的所述第一表面的至少一部分上;
密闭密封层,覆盖所述叠层以及所述载体的所述第一表面的另一部分,所述方法包括:
去除在所述管芯的顶部上的所述叠层的一部分,用于提供清除区域;以及
在所述清除区域上提供导热层,使得通过所述导热层改进所述密封器件的散热。
2.根据权利要求1的方法,其特征在于,所述导热层包括金属层。
3.根据权利要求2的方法,进一步的特征在于:
提供通过所述载体的至少一个导热路径,将所述载体的所述第一表面上的所述密闭密封层热连接到所述载体的所述第二表面。
4.根据权利要求1至3中任一项的方法,其特征在于,所述导热层包括另外的密闭密封层。
5.根据权利要求1至3中任一项的方法,其特征在于,所述导热层还延伸到所述清除区域之外,以覆盖剩余叠层部分的至少一部分。
6.根据权利要求1至3中任一项的方法,其特征在于,所述管芯包括一个或更多声波器件。
7.根据权利要求1至3中任一项的方法,其特征在于,所述管芯包括一个或更多FBAR器件。
8.根据权利要求7的方法,其特征在于,FBAR器件包括声学反射镜和衬底,所述方法进一步的特征在于:
在所述声学反射镜和所述衬底之间提供导热介电层。
9.一种密封电子器件,其特征在于:
载体,具有第一表面和相对的第二表面;
多个导电凸点,布置在所述第一表面上;
多个导电部分,布置在所述第二表面上;
多个导电路径,提供在所述载体的所述第一表面和所述第二表面之间,用于将所述凸点电连接到所述第二表面上的所述导电部分;
管芯,具有第一表面和第二表面,所述管芯布置在所述凸点的顶部上,通过所述导电路径和所述凸点,将所述管芯的所述第一表面电连接到所述载体的所述第二表面上的所述导电部分,其中所述管芯的所述第二表面具有内区域和围绕所述内区域的外区域;
叠层,至少提供在所述管芯的所述第二表面的所述外区域以及所述载体的所述第一表面的至少一部分上;以及
密闭密封层,覆盖所述叠层、所述管芯的所述第二表面的所述内区域以及所述载体的所述第一表面的另一部分,其中所述密闭密封层包括导热层。
10.根据权利要求9的器件,其特征在于,覆盖所述管芯的所述第二表面的所述内区域的所述密闭密封层比覆盖所述叠层的所述密闭密封层厚。
11.根据权利要求9的器件,其特征在于,所述叠层还提供在所述管芯的所述第二表面与所述密闭密封层之间的所述内区域上,并且提供在所述内区域上的所述叠层比覆盖所述管芯的所述第二表面的所述外区域的所述叠层薄。
12.根据权利要求9的器件,其特征在于,所述导热层包括金属层。
13.根据权利要求9的器件,进一步的特征在于,通过所述载体的至少一个导热路径,将所述载体的所述第一表面上的所述密闭密封层热传导到所述载体的所述第二表面。
14.根据权利要求9的器件,其特征在于,所述管芯包括一个或更多声波部件。
15.根据权利要求9的器件,其特征在于,所述管芯包括一个或更多FBAR器件。
16.根据权利要求15的器件,其特征在于,所述FBAR器件包括声学反射镜和衬底,并且在所述声学反射镜和所述衬底之间布置有导热介电层。
17.根据权利要求16的器件,其特征在于,所述导热介电层包括氮化铝层。
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Application Number | Priority Date | Filing Date | Title |
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US10/769,460 US6992400B2 (en) | 2004-01-30 | 2004-01-30 | Encapsulated electronics device with improved heat dissipation |
US10/769,460 | 2004-01-30 | ||
PCT/IB2004/003383 WO2005081618A2 (en) | 2004-01-30 | 2004-10-15 | Method for improving heat dissipation in encapsulated electronic components |
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CN101421920A CN101421920A (zh) | 2009-04-29 |
CN101421920B true CN101421920B (zh) | 2011-08-10 |
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CN2004800406541A Expired - Fee Related CN101421920B (zh) | 2004-01-30 | 2004-10-15 | 用于改进密封电子器件中的散热的方法以及密封电子器件 |
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US (1) | US6992400B2 (zh) |
EP (1) | EP1766679B1 (zh) |
JP (1) | JP2007535230A (zh) |
KR (1) | KR100825108B1 (zh) |
CN (1) | CN101421920B (zh) |
WO (1) | WO2005081618A2 (zh) |
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KR100825108B1 (ko) | 2008-04-25 |
EP1766679A4 (en) | 2010-02-24 |
KR20070000459A (ko) | 2007-01-02 |
EP1766679A2 (en) | 2007-03-28 |
US6992400B2 (en) | 2006-01-31 |
WO2005081618A2 (en) | 2005-09-09 |
EP1766679B1 (en) | 2019-05-01 |
US20050167854A1 (en) | 2005-08-04 |
JP2007535230A (ja) | 2007-11-29 |
WO2005081618A3 (en) | 2009-04-09 |
CN101421920A (zh) | 2009-04-29 |
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