CN101409223B - 半导体装置的制造方法 - Google Patents

半导体装置的制造方法 Download PDF

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Publication number
CN101409223B
CN101409223B CN2008101698903A CN200810169890A CN101409223B CN 101409223 B CN101409223 B CN 101409223B CN 2008101698903 A CN2008101698903 A CN 2008101698903A CN 200810169890 A CN200810169890 A CN 200810169890A CN 101409223 B CN101409223 B CN 101409223B
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China
Prior art keywords
layer
semiconductor
substrate
semiconductor substrate
semiconductor device
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Expired - Fee Related
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CN2008101698903A
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English (en)
Chinese (zh)
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CN101409223A (zh
Inventor
山崎舜平
志知武司
铃木直树
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon

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  • Thin Film Transistor (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
CN2008101698903A 2007-10-10 2008-10-10 半导体装置的制造方法 Expired - Fee Related CN101409223B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2007264409 2007-10-10
JP2007264409 2007-10-10
JP2007-264409 2007-10-10

Publications (2)

Publication Number Publication Date
CN101409223A CN101409223A (zh) 2009-04-15
CN101409223B true CN101409223B (zh) 2013-06-12

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CN2008101698903A Expired - Fee Related CN101409223B (zh) 2007-10-10 2008-10-10 半导体装置的制造方法

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US (1) US8455331B2 (enExample)
JP (1) JP5511172B2 (enExample)
CN (1) CN101409223B (enExample)

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JP2010114431A (ja) * 2008-10-10 2010-05-20 Semiconductor Energy Lab Co Ltd Soi基板の作製方法
EP2513966B1 (en) * 2009-12-18 2020-09-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US8476147B2 (en) * 2010-02-03 2013-07-02 Semiconductor Energy Laboratory Co., Ltd. SOI substrate and manufacturing method thereof
CN110718557B (zh) * 2010-03-08 2023-12-26 株式会社半导体能源研究所 半导体装置及半导体装置的制造方法
TWI463233B (zh) * 2011-04-13 2014-12-01 Color electronic paper structure and manufacturing method thereof
JP6083150B2 (ja) * 2012-08-21 2017-02-22 富士通セミコンダクター株式会社 半導体装置の製造方法
KR101476747B1 (ko) * 2013-05-30 2014-12-26 전북대학교산학협력단 갈륨함유 반도체 소자의 제조방법
TWI696023B (zh) * 2014-02-28 2020-06-11 日商半導體能源研究所股份有限公司 顯示裝置的製造方法及電子裝置的製造方法
US9548371B2 (en) * 2014-04-23 2017-01-17 Globalfoundries Singapore Pte. Ltd. Integrated circuits having nickel silicide contacts and methods for fabricating the same
KR102426960B1 (ko) * 2015-10-15 2022-08-01 주식회사 테스 플라즈마를 이용하여 실리콘 산화막을 형성하는 방법
US11426818B2 (en) 2018-08-10 2022-08-30 The Research Foundation for the State University Additive manufacturing processes and additively manufactured products
US10553474B1 (en) 2018-08-29 2020-02-04 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming a semiconductor-on-insulator (SOI) substrate
JP7669643B2 (ja) * 2020-09-17 2025-04-30 日亜化学工業株式会社 画像表示装置の製造方法および画像表示装置
CN114795222B (zh) * 2022-05-05 2025-08-29 苏州博志金钻科技有限责任公司 一种具有绝缘薄膜的微针阵列电极及其制备方法
CN120600622B (zh) * 2025-05-29 2025-12-02 西安电子科技大学 基于倒置转移技术的N面GaN基外延结构及其制备方法

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US8455331B2 (en) 2013-06-04
US20090098674A1 (en) 2009-04-16
JP2009111371A (ja) 2009-05-21
JP5511172B2 (ja) 2014-06-04
CN101409223A (zh) 2009-04-15

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