CN101395486A - 层叠保护结构 - Google Patents

层叠保护结构 Download PDF

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Publication number
CN101395486A
CN101395486A CNA2007800081897A CN200780008189A CN101395486A CN 101395486 A CN101395486 A CN 101395486A CN A2007800081897 A CNA2007800081897 A CN A2007800081897A CN 200780008189 A CN200780008189 A CN 200780008189A CN 101395486 A CN101395486 A CN 101395486A
Authority
CN
China
Prior art keywords
signal
substrate
conductive
structures
protection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA2007800081897A
Other languages
English (en)
Chinese (zh)
Inventor
B·N·埃尔德里奇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
FormFactor Inc
Original Assignee
FormFactor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by FormFactor Inc filed Critical FormFactor Inc
Publication of CN101395486A publication Critical patent/CN101395486A/zh
Pending legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/073—Multiple probes
    • G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07364—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch
    • G01R1/07378—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch using an intermediate adapter, e.g. space transformers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G01R31/2889—Interfaces, e.g. between probe and tester
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/0929—Conductive planes
    • H05K2201/093—Layout of power planes, ground planes or power supply conductors, e.g. having special clearance holes therein
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09663—Divided layout, i.e. conductors divided in two or more parts
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09672—Superposed layout, i.e. in different planes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electromagnetism (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Measuring Leads Or Probes (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Transmission And Conversion Of Sensor Element Output (AREA)
CNA2007800081897A 2006-03-06 2007-02-22 层叠保护结构 Pending CN101395486A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/308,094 US7956633B2 (en) 2006-03-06 2006-03-06 Stacked guard structures
US11/308,094 2006-03-06

Publications (1)

Publication Number Publication Date
CN101395486A true CN101395486A (zh) 2009-03-25

Family

ID=38470927

Family Applications (1)

Application Number Title Priority Date Filing Date
CNA2007800081897A Pending CN101395486A (zh) 2006-03-06 2007-02-22 层叠保护结构

Country Status (7)

Country Link
US (1) US7956633B2 (enExample)
EP (1) EP1996954A2 (enExample)
JP (1) JP5189995B2 (enExample)
KR (1) KR20080100458A (enExample)
CN (1) CN101395486A (enExample)
TW (1) TWI430411B (enExample)
WO (1) WO2007102998A2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104347320A (zh) * 2013-07-31 2015-02-11 亚德诺半导体集团 Mems开关设备和制造方法

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7724004B2 (en) * 2005-12-21 2010-05-25 Formfactor, Inc. Probing apparatus with guarded signal traces
US8130005B2 (en) * 2006-12-14 2012-03-06 Formfactor, Inc. Electrical guard structures for protecting a signal trace from electrical interference
US8362797B2 (en) * 2009-08-25 2013-01-29 Advanced Inquiry Systems, Inc. Maintaining a wafer/wafer translator pair in an attached state free of a gasket disposed therebetween
US9176186B2 (en) 2009-08-25 2015-11-03 Translarity, Inc. Maintaining a wafer/wafer translator pair in an attached state free of a gasket disposed
TW201122493A (en) * 2009-12-24 2011-07-01 Premtek Int Inc Microprobe structure and method of making the same
ITMI20120453A1 (it) * 2012-03-22 2013-09-23 Technoprobe Spa Struttura di connessione di tipo ibrido
KR20140110443A (ko) * 2013-03-08 2014-09-17 삼성전자주식회사 프로브 카드
JP6548849B1 (ja) * 2018-08-27 2019-07-24 三菱電機株式会社 光モジュール

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4189825A (en) * 1975-06-04 1980-02-26 Raytheon Company Integrated test and assembly device
JPS6032401A (ja) * 1983-08-03 1985-02-19 Nec Corp 帯域濾波器
JPS617101U (ja) * 1984-06-18 1986-01-17 ティーディーケイ株式会社 ストリツプライン型フイルタ
JPS61114601A (ja) * 1984-11-08 1986-06-02 Matsushita Electric Ind Co Ltd フイルタ装置
US5103557A (en) * 1988-05-16 1992-04-14 Leedy Glenn J Making and testing an integrated circuit using high density probe points
DE69416200T2 (de) * 1993-06-16 1999-06-02 Nitto Denko Corp., Ibaraki, Osaka Sondenkonstruktion
US5416429A (en) * 1994-05-23 1995-05-16 Wentworth Laboratories, Inc. Probe assembly for testing integrated circuits
US5621333A (en) * 1995-05-19 1997-04-15 Microconnect, Inc. Contact device for making connection to an electronic circuit device
US6034533A (en) * 1997-06-10 2000-03-07 Tervo; Paul A. Low-current pogo probe card
US6292003B1 (en) * 1998-07-01 2001-09-18 Xilinx, Inc. Apparatus and method for testing chip scale package integrated circuits
US6215320B1 (en) * 1998-10-23 2001-04-10 Teradyne, Inc. High density printed circuit board
US6268015B1 (en) * 1998-12-02 2001-07-31 Formfactor Method of making and using lithographic contact springs
US6351133B1 (en) * 1999-03-31 2002-02-26 Adoamtest Corp. Packaging and interconnection of contact structure
JP2000307312A (ja) * 1999-04-15 2000-11-02 Nec Corp 回路特性の調整方法
JP2001007525A (ja) * 1999-06-24 2001-01-12 Kyocera Corp 多層配線基板
JP3710652B2 (ja) * 1999-08-03 2005-10-26 三菱電機株式会社 ストリップライン給電装置
DE10023736A1 (de) * 2000-05-15 2001-11-22 Harting Elektrooptische Bauteile Gmbh & Co Kg Leiterplatte sowie Verfahren zur Herstellung einer Leiterplatte
US20050068054A1 (en) * 2000-05-23 2005-03-31 Sammy Mok Standardized layout patterns and routing structures for integrated circuit wafer probe card assemblies
JP3487283B2 (ja) * 2000-10-31 2004-01-13 三菱電機株式会社 差動ストリップ線路垂直変換器および光モジュール
US6657130B2 (en) * 2001-09-20 2003-12-02 International Business Machines Corporation Electrical and physical design integration method and apparatus for providing interconnections on first level ceramic chip carrier packages
TW565529B (en) * 2002-01-24 2003-12-11 Scs Hightech Inc Probe card and method for testing the proceed function or speed of electronic devices
US7724004B2 (en) * 2005-12-21 2010-05-25 Formfactor, Inc. Probing apparatus with guarded signal traces
US8130005B2 (en) * 2006-12-14 2012-03-06 Formfactor, Inc. Electrical guard structures for protecting a signal trace from electrical interference

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104347320A (zh) * 2013-07-31 2015-02-11 亚德诺半导体集团 Mems开关设备和制造方法

Also Published As

Publication number Publication date
TWI430411B (zh) 2014-03-11
JP5189995B2 (ja) 2013-04-24
US20070205780A1 (en) 2007-09-06
KR20080100458A (ko) 2008-11-18
TW200739858A (en) 2007-10-16
US7956633B2 (en) 2011-06-07
WO2007102998A2 (en) 2007-09-13
JP2009529238A (ja) 2009-08-13
EP1996954A2 (en) 2008-12-03
WO2007102998A3 (en) 2008-04-10

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Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication

Open date: 20090325