TWI220932B - Modular probe head - Google Patents

Modular probe head Download PDF

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Publication number
TWI220932B
TWI220932B TW92113905A TW92113905A TWI220932B TW I220932 B TWI220932 B TW I220932B TW 92113905 A TW92113905 A TW 92113905A TW 92113905 A TW92113905 A TW 92113905A TW I220932 B TWI220932 B TW I220932B
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Taiwan
Prior art keywords
holes
probe head
modular
probe
scope
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TW92113905A
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Chinese (zh)
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TW200426380A (en
Inventor
Shr-Jia Jeng
John Liu
Yeong-Her Wang
Noty Tseng
Yau-Rung Li
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Chipmos Technologies Inc
Chipmos Technologies Bermuda
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Priority to TW92113905A priority Critical patent/TWI220932B/en
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Publication of TW200426380A publication Critical patent/TW200426380A/en

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  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Measuring Leads Or Probes (AREA)

Abstract

A modular probe head for modularly assembling on a probe card is configured for probing a semiconductor wafer under test. The probe head includes a silicon substrate having a probing surface and a mounting surface. A plurality of electrical vias in grid array are formed between the probing surface and the mounting surface, which have silica layers in the via laterals. The probing surface forms a plurality of contact elements. The mounting surface forms a plurality of connect terminals. The connect terminals are electrically connected to the contact elements by the electrical vias, so that the mounting surface of the probe head enables to be modularly mounted and electrically connected to an interface board of the probe card.

Description

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【發明所屬之技術領域】 本發明係有關於一種探測半導 〔probe card〕,特別係有關於一 測試之模組化探測頭。 【先前技術】 體晶圓之探測卡 種小尺寸且適用於高 頻 習知探測卡係組配於一半導體測試設備之測試 〔te= head〕,以供探觸待測半導體晶圚,習知探 $匕3有一探測頭〔probe head〕及一具多層線路之圓 ^ P刷電路板,由於該探測頭 < 探觸以牛〔如•針 鬼=要求料探觸待測半導體之料或凸塊 Ϊ卡:Ϊ2:精準度與熱膨脹係數匹配度係遠高於該探 介面;te 、2冓牛如印刷電路板材質用以與測試頭結合之 门面板,故該探測頭係為探測卡之關鍵零組件。 卡」我國專利公告第493 756號「晶圓通用探測 種探測卡,其包含有-探測…介面 個探針,S Ϊ :該探測頭係為可替換式,•具有複數 間,以供丨面卡係裝配於該印刷電路板與該探測頭之 連接該:护:化裝配該探測頭’❻未揭露出該探測頭内部 材:ϊίΐΐ 路設計與探測頭之材質,習知探測頭之 MU: Λ夕 是電路板〔mUlti-layer ceramic board,讀 導體贺户I 了、形成微間距電路,且其係無法運用目前的半 高。主〇以製造,使得該多層陶瓷電路板之製造成本甚 卜美國專利第6,3 5 9,4 5 6號則揭示有一種探測[Technical field to which the invention belongs] The present invention relates to a probe card, and more particularly to a modular probe head for testing. [Prior technology] The size of the probe card for the body wafer is small and suitable for high-frequency conventional probe cards. The test card is equipped with a semiconductor test equipment [te = head] for probing the semiconductor wafer to be tested. Probe $ 3 has a probe head and a circle with multiple layers. P brushes the circuit board. Because the probe head < probes with cattle [such as • needle ghost = required to probe the semiconductor to be tested or Bump Ϊcard: Ϊ2: The accuracy and thermal expansion coefficient match are much higher than the probe interface; te, 2 yak, such as the printed circuit board material used to combine the door panel with the test head, so the probe head is a probe card Key components. Card "Chinese Patent Bulletin No. 493 756" Wafer universal detection type detection card, which contains-detection ... interface probes, S Ϊ: the detection head is replaceable, has a plurality of rooms for 丨 surface The card is assembled on the printed circuit board and the connection of the probe head: protect: assemble the probe head '❻ did not expose the internal material of the probe head: ϊ ΐΐ ΐΐ road design and material of the probe head, the MU of the probe head is known: Λ Xi is a circuit board [mUlti-layer ceramic board, which reads the conductor Hedo I and forms a micro-pitch circuit, and it cannot use the current half-height. It is mainly manufactured to make the manufacturing cost of this multilayer ceramic circuit board very difficult. U.S. Patent No. 6,3,59,4,56, reveals a detection

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卡’其探測頭包含有一具有突起接觸元件〔raised contact substrate〕之互連基板〔interc〇nnect member〕,該互連基板係由矽製成,依半導體製程,由該 矽材質之互連基板之顯露表面形成導接線路及該些突起接 觸元件,作為探測頭之探觸表面,且該互連基板之對應 面無法形成有電性連接端,故該互連基板之導接線路係形 成於具有接觸元件之顯露表面並延伸至該顯露表面之周 邊,利用銲線連接該互連基板之導接線路至一接合板 〔mount ing plate〕,再以軟性電路板或TAB〔 Tape Automated Bonding,捲帶自動接合〕弓丨線連接該接合板 3探測卡之多層印刷電路板,該矽材質之互連基板須預. 有在其顯露表面周邊之區塊,以供銲線或軟板之連接, =石夕材質之互連基板之尺寸應比在待測晶圓上探測晶片’ 之面積更大’並且該些銲線或軟板在該石夕材質之互連 之連接處係較凸起於該互連基板之顯露表面,以該顯 2面上突起接觸元件探觸待測晶圓之晶片電極時,該些 ^線或軟板亦有可能接觸摩擦至該待測晶圓, 之測試性能。 【發明内容】 二發明之主要目的係在於提供一種模組化探測頭,利· 斤之個具有—氧化石夕孔壁之電十生貫通孔電十生導通一石夕基 ί=觸表面與結合表面’使得複數個導接端子可設於該 :口=面而取代習知設於矽基板探觸表面周邊之導接端 ’藉由該些導接端子之反面接合避免影響該矽基板探觸 1220932 五、發明說明(3) 表面之接觸元件與待測半導體晶圓。 本發明之次一目的係在於提供一種模組化探測頭,利 複,個具有二氧化矽孔壁之電性貫通孔電性導通一矽基 ==抓觸表面與結合表面,使得複數個設於結合表面之導 鳊子肖b電性連接至探測卡之介面板,取代習知電性連接 :土,與介面板之銲線或軟性電路板,藉由電性貫通孔與 端子達到較短之電性傳導路徑,適用於高頻測試。 & f發明之再一目的係在於提供一種模組化探測頭之製 利用雷射鑽孔〔或電襞蝕刻〕、氧化與化學電鍍 頻 2製作複數個具有二氧化石夕孔壁之電性貫通孔,其電 測1 μ H ί之探觸表面與、结合表面,以達到*尺寸高 ’則试模組化探測頭之製造。 個接莫組化探測頭,丨包含有-石夕基板、複數 面、一=人矣複數個導接端子,該碎基板係具有一探觸表 係貫通;二ί2以及複數個電性貫通孔,該些電性貫通孔 電Ή該結合表面’較佳為矩陣排列,該些 質,ϋϊ係形成有二氧化矽層並填充有導電物 賈,邊些接觸元件係設於該矽基板二 _ 接踹早:!貫通孔以探觸待測半導體晶®,該些導 # ί ϋ f t切基板之該結合表面並電性連n f 【生貫通孔,用以組合成一探測卡。 耵颸电 【實施方式】 所附圖式’本發明將列舉以下之實 模組 ^具體貫施例,請參閱第1及2圖,一The probe of the card includes an interconnecting member with a raised contact substrate. The interconnecting substrate is made of silicon. According to a semiconductor process, the interconnecting substrate of the silicon material is used. The exposed surface forms a conductive line and the protruding contact elements, which are used as the contact surface of the probe head, and the corresponding surface of the interconnect substrate cannot be formed with an electrical connection end. Therefore, the conductive line of the interconnect substrate is formed with The exposed surface of the component is contacted and extends to the periphery of the exposed surface. The bonding wire is used to connect the conductive line of the interconnect substrate to a mounting plate, and then a flexible circuit board or TAB (Tape Automated Bonding) is used. [Automatic bonding] The bow is connected to the multilayer printed circuit board of the bonding board 3 detection card, and the interconnect substrate of the silicon material must be pre-prepared. There are blocks around its exposed surface for bonding wires or flexible boards, = The size of the Shi Xi material interconnect substrate should be larger than the area of the detection chip on the wafer to be tested. When protruding on the exposed surface of the interconnect substrate, and touching the wafer electrode of the wafer under test with the protruding contact elements on the two sides of the display, the wires or flexible boards may also contact and rub against the wafer under test. Test performance. [Summary of the invention] The main purpose of the two inventions is to provide a modular probe head, which has an electric stone through the hole on the wall of the oxidized stone, a through hole, and a stone on the ground. The surface allows a plurality of lead terminals to be provided on the interface: instead of the conventional lead terminals provided around the touch surface of the silicon substrate, which is conventionally used to avoid affecting the touch of the silicon substrate by the opposite sides of the lead terminals. 1220932 V. Description of the invention (3) The contact elements on the surface and the semiconductor wafer to be tested. A second object of the present invention is to provide a modular probe head, which is electrically conductive and has a silicon dioxide hole wall electrically connected to a silicon base == a gripping surface and a bonding surface, so that a plurality of devices are provided. The guide wire on the bonding surface is electrically connected to the dielectric panel of the detection card, instead of the conventional electrical connection: soil, the solder wire to the dielectric panel or the flexible circuit board. The electrical through-holes and terminals are short. The electrical conduction path is suitable for high frequency testing. & f Another purpose of the invention is to provide a modular probe head system that uses laser drilling (or electro-etching), oxidation and electroless plating to produce a plurality of holes with the walls of dioxide holes. Through-holes, which measure the contact surface and the combined surface of 1 μ H to achieve the highest size, test the manufacture of modular probes. Each of the contact probes includes a Shi Xi substrate, a plurality of surfaces, and a plurality of conductive terminals. The broken substrate is provided with a contact surface penetrating through; two 2 and a plurality of electrical through holes. The electrical through-holes and the bonding surfaces are preferably arranged in a matrix. For these materials, a silicon dioxide layer is formed and filled with a conductive material, and some contact elements are provided on the silicon substrate. Early morning :! The through-holes are used to probe the semiconductor crystal under test. The guides # ί ϋ f t cut the bonding surface of the substrate and electrically connect the f-through holes to form a detection card.耵 飔 电 [Embodiment] The attached drawings ‘the present invention will enumerate the following practical modules ^ For specific implementation examples, please refer to FIGS. 1 and 2, a

1220932 五、發明說明(4) 化探測頭係包含有一石夕基板1 〇、複數個接觸元件4 〇及複數 個導接端子5 0,該矽基板1 〇係具有一探觸表面丨1、一結合 表面1 2以及複數個電性貫通孔1 3,該些電性貫通孔1 3係貫 通該探觸表面11與該結合表面1 2,較佳地,該些電性貫通 孔1 3係為矩陣排列,該些電性貫通孔1 3之孔壁係形成有二 氧化石夕層1 4並填充有導電物質1 5,該探觸表面1 1係作為該 探測頭之顯露正面’其形成有半導體製程形成之金屬線路 2 1,並以一防護層6 1覆蓋該探觸表面1丨上之金屬線路2 i, 僅露出該些金屬線路2 1之接觸墊2 2,以接合該些接觸元件 40,該些接觸元件40係可為懸空結線探針〔sUSpending馨 wire-bonding pin〕並形成有一電鍍層41,該些接觸元件 40係設於該石夕基板1 〇之該探觸表面丨丨並電性連接至對應電 性貫通孔1 3,用以探觸待測半導體晶圓,該些接觸元件4〇 之排列分配型態係對應於待測半導體晶圓之晶片電極位 置’如晶片之中央或周邊或矩陣排列位置,該結合表面j 2 係作為该探測頭之結合背面,用以組合成一探測卡,該結 合表面12係形成有複數個連接墊31,其係接合有該些導接 端子5 0 ’如銲球或插針,在本實施例中,該些連接塾3 1係 直接裝設於該些電性貫通孔丨3上並顯露於該結合表面丨2上 之防護層62 ’故該些導接端子5〇係經由該些連接墊3丨電性· 連接至對應電性貫通孔丨3,用以結合並電性連接至一探測 卡之介面板。 因此’在上述之模組化探測頭中,利用該些具有二氧 化矽層1 4於孔壁之電性貫通孔丨3電性導通該矽基板丨〇之該1220932 V. Description of the invention (4) The chemical probe head includes a stone substrate 10, a plurality of contact elements 4 0, and a plurality of lead terminals 50. The silicon substrate 1 0 has a contact surface. The bonding surface 12 and the plurality of electrical through-holes 13 are connected to the probe surface 11 and the bonding surface 12. Preferably, the electrical through-holes 13 are In a matrix arrangement, the hole walls of the electrical through holes 13 are formed with a dioxide layer 14 and filled with a conductive material 15. The touch surface 11 is used as the exposed front side of the probe head. The metal lines 21 formed by the semiconductor process are covered with a protective layer 6 1 on the metal lines 2 i on the contact surface 1 丨, and only the contact pads 2 2 of the metal lines 2 1 are exposed to join the contact elements. 40. The contact elements 40 may be sUSpending wire-bonding pins and a plating layer 41 is formed. The contact elements 40 are provided on the contact surface of the Shixi substrate 10 丨 丨And is electrically connected to the corresponding electrical through-holes 13 to probe the semiconductor wafer to be tested The arrangement and distribution pattern of the contact elements 40 corresponds to the wafer electrode position of the semiconductor wafer to be tested, such as the center or periphery of the wafer or the matrix arrangement position. The bonding surface j 2 is used as the bonding back surface of the probe head. To form a detection card, the connection surface 12 is formed with a plurality of connection pads 31, which are connected with the lead terminals 5 0 ′ such as solder balls or pins. In this embodiment, the connections 塾 3 1 The protective layer 62 is directly installed on the electrical through holes 3 and exposed on the bonding surface 62. Therefore, the lead terminals 50 are electrically connected to the corresponding via the connection pads 3 The electrical through hole 3 is used for combining and electrically connecting to a dielectric panel of a detection card. Therefore, in the above-mentioned modular probe, the electrical through-holes with silicon dioxide layer 14 in the hole wall are used to electrically conduct the silicon substrate.

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二上表面11與該結合表面12,使得該些導接端子5〇可配置 杜違結合表面12,而不影響該探觸表面丨丨上形成之接觸元 〇,且在測試過程,避免該些導接端子50不當接觸待測 體晶圓,故該矽基板i 0之尺寸可更縮小地對應待測半 3:晶圓之〔一或多個預定數量〕晶片尺寸,且該矽基板 主探測卡之介面板之電性連接元件,不再需要接合在探 面11周邊之銲線或軟性電路板,而是隱藏地設置於非 顯露之結合表面12,藉由該些電性貫通孔13與導接端子5〇 達到較紐之電性傳導路徑,適用於高頻測試。 關於上述模組化探測頭之矽基板丨〇製造方法亦詳述如_ 后,,參閱第3A圖,一半導體材質之矽基板1〇係被提供 之,該矽基板1 0在製造過程係一體形成於一晶圓,與積體 電路製作之晶圓可共用製程與設備,在高溫腔室内氧化該 石夕基板10 ’使其探觸表面11與結合表面12形成有二氧化矽 層〔si 1 icon dioxide〕;請再參閱第3B圖,以濺鍍 〔sputtering〕技術在該石夕基板1〇之探觸表面I〗形成有一 金屬層20 ’並將一光阻層70覆蓋在該金屬層2〇上,該光阻 層7 0係已曝光顯影有複數個開孔71,對應於該石夕基板1 〇預The upper surface 11 and the bonding surface 12 allow the conductive terminals 50 to be configured with the bonding surface 12 without affecting the contact elements formed on the probing surface. During the test process, avoid these The lead terminal 50 improperly contacts the wafer of the object under test, so the size of the silicon substrate i 0 can be more reduced to correspond to the half of the wafer under test 3: [one or more predetermined number of wafers], and the silicon substrate mainly detects The electrical connection elements of the card's dielectric panel no longer need to be bonded with solder wires or flexible circuit boards around the probe surface 11, but are concealed on the non-exposed bonding surface 12, and through these electrical through holes 13 and The lead terminal 50 reaches a relatively electrically conductive path, which is suitable for high-frequency testing. The manufacturing method of the silicon substrate of the above-mentioned modular probe head is also described in detail below. Referring to FIG. 3A, a silicon substrate 10 of a semiconductor material is provided, and the silicon substrate 10 is integrated in the manufacturing process. Formed on a wafer, the process and equipment can be shared with the wafer produced by the integrated circuit, and the silicon substrate 10 'is oxidized in a high-temperature chamber so that a silicon dioxide layer is formed on the touch surface 11 and the bonding surface 12 [si 1 icon dioxide]; please refer to FIG. 3B again, a metal layer 20 ′ is formed on the touch surface I of the Shixi substrate 10 by sputtering technology, and a photoresist layer 70 is covered on the metal layer 2 〇, the photoresist layer 70 is exposed and developed with a plurality of openings 71, corresponding to the Shi Xi substrate 1

定形成貫通孔1 3之位置;請再參閱第3 C圖,利用雷射鑽孔 或反應離子蝕刻〔reactive ion etching, RIC〕技術對 應於該光阻層70之開孔71在該矽基板1〇上形成複數個貫通 孔1 3 ’清再參閱第3 D圖’氧化處理該碎基板1 〇,使得該此 貫通孔1 3之孔壁形成有二氧化矽層1 4,之後,在該矽基板 1 0之結合表面1 2貼設一如銅箔之金屬箔3 0 ;請參閱第3£The positions of the through holes 13 are determined; please refer to FIG. 3C again, and use laser drilling or reactive ion etching (RIC) technology to correspond to the openings 71 of the photoresist layer 70 in the silicon substrate 1. A plurality of through-holes 1 3 are formed on the surface ′, and referring to FIG. 3D ′, the broken substrate 1 is oxidized, so that a silicon dioxide layer 14 is formed on the hole wall of the through-holes 13. The bonding surface 12 of the substrate 10 is attached with a metal foil 30 such as copper foil; please refer to section 3.

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五、發明說明(6) 圖,以化學電鍍或印刷方式將導電物質1 5填充於該些貫通 孔1 3,使得該些貫通孔1 3電性導通該石夕基板1 〇之探觸表面 11與結合表面12〔即金屬層20與金屬箔30〕,之後,餘刻 該金屬層20成為上述該些金屬線路21,與蝕刻該金屬箱3〇 成為上述該些連接墊31,以供分別接合接觸元件4〇與導接 端50於該矽基板10之不同表面,較佳地,在該石夕基板丨〇之 探觸表面1 1與結合表面1 2分別再覆蓋有一防護層6丨、6 2, =保護内層線路,因此,本發明之製造方法係能製造小尺 寸且適用高頻測試之模組化探測頭。 本發 為準,任 圍内所作 明之保護範圍當視後附之申請專利範圍所界定者鲁 何熟知此項技藝者,在不脫離本發明之精神和範 之任何變化與修改,均屬於本發明之保護範圍。V. Description of the invention (6) In the figure, a conductive substance 15 is filled in the through-holes 13 by chemical plating or printing, so that the through-holes 13 are electrically connected to the contact surface 11 of the Shixi substrate 10. And the bonding surface 12 (that is, the metal layer 20 and the metal foil 30), and thereafter, the metal layer 20 becomes the above-mentioned metal circuits 21, and the etching of the metal box 30 becomes the above-mentioned connection pads 31 for separate bonding The contact element 40 and the lead-in terminal 50 are on different surfaces of the silicon substrate 10. Preferably, the touch surface 11 and the bonding surface 12 of the stone substrate 1 are covered with a protective layer 6 and 6 respectively. 2, = Protect the inner layer circuit. Therefore, the manufacturing method of the present invention is capable of manufacturing a modular probe head with a small size and suitable for high frequency testing. This issue shall prevail. The scope of protection stated in Ren Wei shall be deemed to be defined by the scope of the appended patent application. Those who are familiar with this technology, and any changes and modifications that do not depart from the spirit and scope of the invention belong to the invention. protected range.

第11頁 1220932 圖式簡單說明 - 【圖式簡單說明】 第 1 圖:本發明之模組化探測頭之截面示意圖。 ‘ 第 2 圖:本發明之模組化探測頭之探觸表面示意圖。 - 第3A至3F圖:本發明之模組化探測頭在製造過程中其矽基 板之截面圖。 元件符號簡單說明: 10 矽 基 板 11 探觸 表 面 12 結 合 表 面 13 貫 通 孔 14 — 氧 化 矽層 15 導 電 物 質 20 金屬 層 21 金 屬 線 路 22 接 觸 墊 30 金 屬 箔 31 連 接 墊 40 接 觸 元 件 41 電 鍍 層 50 導 接 端 子 61 防 護 層 62 防 護 層 70 光 阻 層 71 開 孔Page 11 1220932 Schematic description-[Schematic description] Fig. 1: Schematic sectional view of the modularized probe head of the present invention. ‘Figure 2: Schematic diagram of the touch surface of the modular probe head of the present invention. -Figures 3A to 3F: cross-sectional views of the silicon substrate of the modular probe of the present invention during the manufacturing process. Brief description of component symbols: 10 silicon substrate 11 contact surface 12 bonding surface 13 through hole 14 — silicon oxide layer 15 conductive material 20 metal layer 21 metal circuit 22 contact pad 30 metal foil 31 connection pad 40 contact element 41 electroplated layer 50 conductive connection Terminal 61 protective layer 62 protective layer 70 photoresist layer 71 opening

第12頁Page 12

Claims (1)

A220932 六、申請專利範圍 【申請專利範圍 、一種模組化探測頭,包含: 矽基板,具有一探觸表面、一結合表面以及複數個 $性貫通孔,該些電性貫通孔係貫通該探觸表面與該結 合表面,該些電性貫通孔之孔壁係形成有二氧化矽 ^ 填充有導電物質; 複數個接觸元件,設於該矽基板之該探觸表面並電性 連接至對應電性貫通孔,用以探觸待測半導體晶圓;及 、複數個導接端子,設於該矽基板之該結合表面並電性 連接至對應電性貫通孔,用以組合成一探測卡。 丨 士申吻專利範圍第1項所述之模組化探測頭,其中該 些電性貫通孔係為矩陣排列。 3 a如申清專利範圍第1或2項所述之模組化探測頭,其中 忒些導接端子係結合於該些電性貫通孔上。 4三如申凊專利範圍第3項所述之模組化探測頭,其中在 每一電f貫通孔與對應導接端子之間形成有一連接墊。 5、如申晴專利範圍第丨項所述之模組化探測頭,其中該 些接觸元件係為懸空結線探針〔suspending、 wire-bonding pin 〕。 6 7 μ ^ Ϊ吻專利範圍第5項所述之模組化探測頭,其中 些結線探針係形成有一電鍍層。A220932 6. Scope of patent application [Scope of patent application, a modular probe head, including: a silicon substrate with a touch surface, a bonding surface, and a plurality of through-holes, the electrical through-holes are through the probe The contact surface and the bonding surface, the hole walls of the electrical through holes are formed with silicon dioxide ^ filled with a conductive substance; a plurality of contact elements are provided on the contact surface of the silicon substrate and are electrically connected to the corresponding electrical A through-hole is used to probe the semiconductor wafer to be tested; and, a plurality of lead terminals are provided on the bonding surface of the silicon substrate and are electrically connected to the corresponding electric through-holes to form a detection card.丨 The modular probe head described in item 1 of the Shishen kiss patent scope, wherein the electrical through-holes are arranged in a matrix. 3 a The modular probe head as described in item 1 or 2 of the patent application scope, wherein some of the lead terminals are combined with the electrical through holes. 43. The modular probe head as described in item 3 of the scope of the patent application, wherein a connection pad is formed between each electrical f-through hole and a corresponding lead terminal. 5. The modular probe head as described in item 丨 of Shenqing's patent scope, wherein the contact elements are suspending, wire-bonding pins. 6 7 μ ^ The modular probe head described in item 5 of the patent scope, in which some of the junction probes are formed with a plating layer. & i Γ吻專利知4圍第1項所述之模組化探測頭,其中 石土 2 2探觸表面與結合表面分別形成有一防護層, 、-種模組化探測頭之製造方法,包含:& i Γ kiss the modular probe described in the first paragraph of Patent Knowledge 4, wherein a protective layer is formed on the contact surface of the rock and soil 2 and the bonding surface, a manufacturing method of the modular probe, contain: 第13頁 ^20932 申凊專利範圍 提供一矽基板,該矽基板係具有一探觸表面及一結合 表面,以供分別形成接觸元件與導接端子; 形成複數個貫通孔,以貫通該探觸表面與該結合表 面; 氧化該矽基板,使得該些貫通孔之孔壁形成有二氧化 石夕層;及 填充導電物質於該些貫通孔,以電性貫通該探觸表面 與該結合表面。 9、如申請專利範圍第8項所述之模組化探測頭之製造方 iff二其該石夕基板之探觸表面係濺鍍形成有一金屬層。· i ϋ凊專利範圍第8項所述之模組化探測頭之製造方 '、中該些貫通孔係以雷射鑽設或反應離子蝕刻形 成0 11、;如=專利範圍第8項所·之模組化探測頭之製造方 二、„亥導電物質係以化學電鍍方法或印刷方式形 12 項所述之模組化探測頭之製造 之前’該矽基板之結合表面係 、如申請專利範圍第11 方法,其中在化學電鍍 貼設有一金屬箔。Page 13 ^ 20932 The scope of the Shenyang patent provides a silicon substrate with a probe surface and a bonding surface for forming contact elements and lead terminals, respectively; forming a plurality of through holes to penetrate the probe The surface and the bonding surface; oxidizing the silicon substrate, so that a layer of stone dioxide is formed in the hole walls of the through holes; and filling conductive holes in the through holes to electrically penetrate the probe surface and the bonding surface. 9. According to the manufacturer of the modular probe head described in item 8 of the scope of the patent application, the contact surface of the Shixi substrate was sputtered to form a metal layer. I ϋ 凊 The manufacturer of the modular probe head described in item 8 of the patent scope ', these through holes are formed by laser drilling or reactive ion etching. · Manufacturing of modular probes II. „Hai conductive material is formed by chemical plating method or printing method before the manufacture of the modular probes described in Item 12. 'The bonding surface of the silicon substrate is as patented The eleventh method, wherein a metal foil is provided on the electroless plating.
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