JP4960854B2 - Wiring board for electronic component inspection equipment - Google Patents

Wiring board for electronic component inspection equipment Download PDF

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JP4960854B2
JP4960854B2 JP2007336152A JP2007336152A JP4960854B2 JP 4960854 B2 JP4960854 B2 JP 4960854B2 JP 2007336152 A JP2007336152 A JP 2007336152A JP 2007336152 A JP2007336152 A JP 2007336152A JP 4960854 B2 JP4960854 B2 JP 4960854B2
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layer
base substrate
wiring board
wiring
pad
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JP2009158761A (en
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一哉 野津
俊寿 野村
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NGK Spark Plug Co Ltd
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本発明は、プローブカードなどの電子部品検査装置に用いられ、特に薄膜形成工程において製造し易く、且つ比較的安価に製作し得る電子部品検査装置用配線基板に関する。   The present invention relates to a wiring board for an electronic component inspection apparatus that is used in an electronic component inspection apparatus such as a probe card, and that is particularly easy to manufacture in a thin film forming process and can be manufactured at a relatively low cost.

例えば、Siウェハなどに形成された多数の半導体素子などの電子部品の電気的特性を、効率良く検査するため、プローブカードなどの電子部品検査装置が用いられている。かかる検査装置には、検査用の信号を発信し、且つ検査情報を受信するために、内部に各種の配線層を有する多層配線基板が用いられている。
一方、最近における半導体素子の開発期間の短縮化に対応するため、製造納期を短縮でき、副電源用接続配線の電気的特性を向上させた多層配線基板、およびこれを用いたプローブが提案されている(例えば、特許文献1参照)。
特開2005−79144号公報(第1〜9頁、図1〜3)
For example, an electronic component inspection device such as a probe card is used to efficiently inspect the electrical characteristics of electronic components such as a large number of semiconductor elements formed on a Si wafer or the like. In such an inspection apparatus, a multilayer wiring board having various wiring layers therein is used in order to transmit an inspection signal and receive inspection information.
On the other hand, in order to cope with the recent shortening of the development period of semiconductor elements, a multilayer wiring board capable of shortening the manufacturing delivery time and improving the electrical characteristics of the sub power connection wiring, and a probe using the same have been proposed. (For example, refer to Patent Document 1).
Japanese Patent Laying-Open No. 2005-79144 (pages 1 to 9, FIGS. 1 to 3)

特許文献1の多層配線基板は、複数の絶縁層およびこれらの間に形成された配線導体層を有するベース基板と、複数の樹脂絶縁層およびこれらの間に形成された薄膜配線層を有する薄膜多層部と、を一体に積層した積層体である(特許文献1の図2参照)。かかる多層配線基板は、ベース基板の裏面に形成した接続パッドを介して、中継基板の配線と導通することで、かかる中継基板と共にプローブカードを構成すると共に、薄膜多層部の表面に形成した複数の電極パッドごとに接続したプローブを介して、検査対象の半導体素子と導通している(特許文献1の図3参照)。尚、上記プローブカードは、上記中継基板を介して、プリント基板などの表面に実装される。   The multilayer wiring board of Patent Document 1 includes a base substrate having a plurality of insulating layers and a wiring conductor layer formed therebetween, a thin film multilayer having a plurality of resin insulating layers and a thin film wiring layer formed therebetween. Is a laminated body obtained by integrally laminating a portion (see FIG. 2 of Patent Document 1). Such a multilayer wiring board is electrically connected to the wiring of the relay board via a connection pad formed on the back surface of the base board, thereby forming a probe card together with the relay board, and a plurality of layers formed on the surface of the thin film multilayer part. It is electrically connected to the semiconductor element to be inspected through a probe connected to each electrode pad (see FIG. 3 of Patent Document 1). The probe card is mounted on the surface of a printed circuit board or the like via the relay board.

ところで、電子部品検査装置に用いる多層配線基板は、プリント基板などの表面に実装されるが、両者間の電気的接続を、例えば、多層配線基板の裏面に設けたピンと、プリント基板などの表面に設けたソケットとによるメカニカル・コンタクトで行うと、プリント基板側のソケットが非常に高価となって、実用的ではない。
このため、多層配線基板の側面に上方と側方とに開口した段部を形成し、かかる段部の底面に形成した外部接続用パッドと、プリント基板などの表面に設けた外部接続用パッドとを、ボンディングワイヤーで接続する方法が検討されている。
しかしながら、側面に上記段部を有する多層配線基板においては、かかる多層配線基板の表面に検査用パッドを製作する際、段部にマスキングを施すことが困難となる場合がある。しかも、仮にマスキングがし得たとしても、上記段部の壁面に不用意に付着したレジストやメッキを研磨して除去するための煩雑な工程が必要となって、工数が増大するため、納期が長期化し、更にはコスト高になる、という問題があった。
By the way, a multilayer wiring board used for an electronic component inspection apparatus is mounted on the surface of a printed circuit board or the like. For example, electrical connection between the two is performed on a pin provided on the back surface of the multilayer wiring board and the surface of the printed circuit board or the like. When the mechanical contact with the provided socket is performed, the socket on the printed circuit board side becomes very expensive and is not practical.
For this reason, a step part opened upward and laterally is formed on the side surface of the multilayer wiring board, an external connection pad formed on the bottom surface of the step part, and an external connection pad provided on the surface of the printed circuit board, etc. A method of connecting these with a bonding wire is being studied.
However, in a multilayer wiring board having the step portion on the side surface, it may be difficult to mask the step portion when manufacturing a test pad on the surface of the multilayer wiring substrate. Moreover, even if masking can be performed, a complicated process for polishing and removing the resist or plating that has inadvertently adhered to the wall surface of the stepped portion is required, which increases the number of man-hours. There was a problem that it was prolonged and the cost was increased.

本発明は、背景技術において説明した問題点を解決し、実装すべきプリント基板などとの電気的接続をボンディングワイヤーを介して行え、特に薄膜形成工程において製造し易く、ひいては比較的安価に製作できる電子部品検査装置用配線基板を提供する、ことを課題とする。   The present invention solves the problems described in the background art, and can be electrically connected to a printed circuit board or the like to be mounted via a bonding wire, particularly easy to manufacture in a thin film forming process, and thus relatively inexpensive to manufacture. It is an object to provide a wiring board for an electronic component inspection apparatus.

課題を解決するための手段および発明の効果Means for Solving the Problems and Effects of the Invention

本発明は、前記課題を解決するため、多層配線基板を、検査用パッドを表面に形成した実装基板と、側面に外部接続用のパッドを底面に有する段部を形成したベース基板とに分割し、かかる2つの基板を電気的に接続させる、ことに着想して成されたものである。
即ち、本発明の電子部品検査装置用配線基板(請求項1)は、複数の絶縁層からなり、表面、裏面、およびこれらの周辺間に位置する側面を有し、上記絶縁層間に形成された配線層、および上記側面に形成され且つ底面に外部接続用のパッドが形成された段部を有するベース基板と、かかるベース基板の表面上方に実装され、複数の絶縁層からなり、検査用パッドが形成された表面、裏面、および上記複数の絶縁層間に形成された配線層を有し、上記裏面と上記ベース基板の表面との間が電気的に接続されている実装基板と、を備える、ことを特徴とする。
In order to solve the above-described problems, the present invention divides a multilayer wiring board into a mounting board on which a testing pad is formed on the surface and a base board on which a step portion having a pad for external connection on the bottom surface is formed on the side surface. The idea is to connect the two substrates electrically.
That is, the wiring board for an electronic component inspection apparatus according to the present invention (Claim 1) includes a plurality of insulating layers, and has a front surface, a back surface, and a side surface located between these surfaces, and is formed between the insulating layers. A base substrate having a wiring layer and a step portion formed on the side surface and having a pad for external connection formed on the bottom surface, and a plurality of insulating layers mounted on the surface of the base substrate. A mounting substrate having a formed surface, a back surface, and a wiring layer formed between the plurality of insulating layers, wherein the back surface and the surface of the base substrate are electrically connected to each other. It is characterized by.

これによれば、複数の絶縁層からなり、表面、裏面、および側面を有し、上記複数の絶縁層間に形成された配線層を備える実装基板において、上記表面に対してマスキングを容易に施せ、且つ側面にメッキが不用意に付着したとしても、これを容易に除去できる。このため、かかる表面に検査用パッドを精度良く形成した実装基板となる。しかも、プリント基板と接続するためのボンディングワイヤーとは、ベース基板の側面に設けた段部の底面に位置する外部接続用のパッドによって、容易に接続することができる。従って、プリント基板などとの電気的接続は、ボンディングワイヤーを介して行え、特に薄膜形成工程において製造し易く比較的安価に製作できる電子部品検査装置用配線基板を提供することができる。
更に、実装基板とベース基板とに分割したため、両基板を平行して同時または随時に製造することもできる。このため、半導体素子などの電子部品の開発期間の短縮化に対応して、表面における所要の位置に検査用パッドを形成した実装基板をニーズに応じて迅速に提供できる。一方、ベース基板は、実装すべきプリント基板などに応じてレイアウトなどを維持したり、これを適時に変更することが可能となる。従って、従来の一体物(例えば、前記特許文献1の多層配線基板)に比べて、製作納期を短縮し易く、且つ種々の納期に対してもフレキシブルに対処することが可能となる。
According to this, in a mounting substrate comprising a plurality of insulating layers, having a front surface, a back surface, and a side surface and including a wiring layer formed between the plurality of insulating layers, the surface can be easily masked, Even if the plating is inadvertently attached to the side surface, it can be easily removed. For this reason, it becomes a mounting board | substrate which formed the pad for a test | inspection with sufficient precision in this surface. In addition, the bonding wire for connecting to the printed circuit board can be easily connected by an external connection pad located on the bottom surface of the step portion provided on the side surface of the base substrate. Therefore, electrical connection with a printed circuit board or the like can be performed via the bonding wire, and it is possible to provide a wiring board for an electronic component inspection apparatus that can be manufactured easily and relatively inexpensively in the thin film formation process.
Further, since the mounting substrate and the base substrate are divided, both the substrates can be manufactured in parallel or at the same time. For this reason, in response to shortening of the development period of electronic components such as semiconductor elements, it is possible to quickly provide a mounting substrate in which inspection pads are formed at required positions on the surface according to needs. On the other hand, the base substrate can maintain a layout or the like according to a printed circuit board to be mounted, or can change it in a timely manner. Therefore, compared with the conventional integrated object (for example, the multilayer wiring board of the said patent document 1), it becomes easy to shorten manufacture delivery time, and it becomes possible to cope with various delivery dates flexibly.

尚、前記絶縁層は、後述するようなセラミックあるいは樹脂からなる。
また、前記ベース基板の側面に形成する段部は、該基板における四辺の側面ごとに形成するほか、任意の側面のみに形成しても良い。
更に、前記実装基板の裏面と前記ベース基板の表面との間における電気的接続は、例えば、両基板ごとに対向して形成したパッドとこれらの間を接続するハンダボールによる形態のほか、一方に設けたピンと、かかるピンを受け入れるように他方に設けたソケットとによる形態などが含まれる。
加えて、前記実装基板の表面に形成される検査用パッドは、例えば、該表面に隣接するTi薄膜層およびCu薄膜層と、該Cu薄膜層の上に形成されるCuメッキ層と、これらの頂面ないし周面を覆うNiメッキ層およびAuメッキ層からなる。該Auメッキ層の頂面に電子部品の電極と接触するプローブが追って接続される。
The insulating layer is made of ceramic or resin as described later.
Further, the step portion formed on the side surface of the base substrate may be formed only on any side surface in addition to being formed for each side surface of the four sides of the substrate.
Furthermore, the electrical connection between the back surface of the mounting substrate and the front surface of the base substrate is, for example, in the form of a pad formed opposite to each of the substrates and a solder ball connecting between them, and The form by the pin provided and the socket provided in the other so that this pin may be received is included.
In addition, the inspection pads formed on the surface of the mounting substrate include, for example, a Ti thin film layer and a Cu thin film layer adjacent to the surface, a Cu plating layer formed on the Cu thin film layer, and these It consists of a Ni plating layer and an Au plating layer covering the top surface or the peripheral surface. A probe that contacts the electrode of the electronic component is connected to the top surface of the Au plating layer later.

また、本発明には、前記ベース基板の段部は、当該ベース基板の表面および裏面と平行な底面と、かかる底面と直交する垂直面とを含み、当該底面に前記配線層と導通する外部接続用の前記パッドが形成されている、電子部品検査装置用配線基板(請求項2)も含まれる。
これによれば、当該ベース基板を形成する複数の絶縁層を、セラミックによって製造する際に、例えば、上層側のグリーンシートの側面に凹部を形成したり、上層側のグリーンシートの縦および横寸法の少なくとも一方を、積層すべき下層側のグリーンシートより小さくすることで、側面に段部を有するベース基板を容易に製作することができる。更に、複数の絶縁層が樹脂からなる場合には、例えば、樹脂フィルムに対し、上記同様の方法を施すことで、側面に段部を有するベース基板を容易に製作可能となる。
尚、段部の前記底面は、1つの平坦な底面に限らず、ベース基板の厚み方向および平面方向の位置が異なる複数の底面からなり、かかる底面ごとに外部接続用のパッドを形成しても良い。
Further, according to the present invention, the step portion of the base substrate includes a bottom surface parallel to the front surface and the back surface of the base substrate, and a vertical surface orthogonal to the bottom surface, and the bottom surface is electrically connected to the wiring layer. Also included is a wiring board for an electronic component inspection apparatus in which the pad is formed.
According to this, when the plurality of insulating layers forming the base substrate are made of ceramic, for example, a concave portion is formed on the side surface of the upper green sheet, or the vertical and horizontal dimensions of the upper green sheet are measured. By making at least one of these smaller than the green sheet on the lower layer side to be laminated, a base substrate having a stepped portion on the side surface can be easily manufactured. Further, when the plurality of insulating layers are made of a resin, for example, a base substrate having a stepped portion on the side surface can be easily manufactured by applying the same method to the resin film.
The bottom surface of the step portion is not limited to one flat bottom surface, and includes a plurality of bottom surfaces having different positions in the thickness direction and the planar direction of the base substrate, and pads for external connection may be formed for each bottom surface. good.

更に、本発明には、前記実装基板は、当該実装基板の表面および裏面の周辺間に、かかる表・裏面と直交し、且つ当該実装基板の厚み方向に沿って平坦な側面を有する、電子部品検査装置用配線基板(請求項3)も含まれる。
これによれば、セラミックまたは樹脂からなる複数の絶縁層の表面を研磨して平坦面とし、かかる表面における所要の位置を除いてマスキングを容易に施せ、且つ平坦な側面にメッキなどが不用意に付着しても、これを研磨などによって容易に除去できる。従って、表面に検査用のパッドを精度良く形成された実装基板を、簡単な工程と少ない工数とによって、安価に製作し且つ提供することが可能となる。
Furthermore, in the present invention, the mounting board has an electronic component between the periphery of the front and back surfaces of the mounting board, and has a flat side surface perpendicular to the front and back surfaces and along the thickness direction of the mounting board. A wiring board for an inspection apparatus (Claim 3) is also included.
According to this, the surface of a plurality of insulating layers made of ceramic or resin is polished to be a flat surface, masking can be easily performed except for a required position on the surface, and plating on the flat side surface is inadvertent Even if it adheres, it can be easily removed by polishing or the like. Therefore, it is possible to manufacture and provide a mounting substrate having a testing pad formed on the surface with high accuracy at a low cost by a simple process and a small number of steps.

また、本発明には、前記実装基板の表面に形成される検査用パッドは、当該表面と隣接する金属薄膜層を含む、電子部品検査装置用配線基板(請求項4)も含まれる。
これによれば、平坦に研磨された実装基板の表面に、例えば、Ti薄膜層およびCu薄膜層が所要のレベルで形成されているため、該Cu薄膜層の上に形成されるCuメッキ層と、これらの頂面ないし周面を覆うNiメッキ層およびAuメッキ層とからなる検査用パッドを、位置、形状、および寸法にて精度良く配設できる。
Further, the present invention includes an electronic component inspection device wiring substrate (Claim 4) in which the inspection pad formed on the surface of the mounting substrate includes a metal thin film layer adjacent to the surface.
According to this, since, for example, a Ti thin film layer and a Cu thin film layer are formed at a required level on the surface of the mounting substrate polished flat, a Cu plating layer formed on the Cu thin film layer In addition, it is possible to arrange the inspection pads made of the Ni plating layer and the Au plating layer covering the top surface or the peripheral surface with high accuracy in position, shape, and dimensions.

更に、本発明には、前記ベース基板および前記実装基板ごとに形成される配線層は、信号層、電源層、および接地層をそれぞれ含んでいる、電子部品検査装置用配線基板(請求項5)も含まれる。
これによれば、ベース基板および実装基板ごとの電源層を通じて、所要の電流を給電でき、ベース基板および実装基板ごとの信号層によって、検査用の電流などを発信できると共に、ベース基板および実装基板ごとの接地層によって、任意の位置でアースを取ることが容易に可能となる。従って、検査すべき電子部品の検査を正確且つ効率良く行うことが確実となる。
尚、前記ベース基板および実装基板ごとに複数の配線層が形成される場合には、個々の配線層ごとに信号層、電源層、および接地層をそれぞれ含む形態のほか、各配線層が信号層、電源層、または接地層の何れかのみとなる形態も含まれる。
Further, according to the present invention, the wiring layer formed for each of the base substrate and the mounting substrate includes a signal layer, a power supply layer, and a ground layer, respectively. Is also included.
According to this, a required current can be supplied through the power supply layer for each base board and mounting board, and a current for inspection can be transmitted by the signal layer for each base board and mounting board, and for each base board and mounting board. With this grounding layer, it is possible to easily ground at an arbitrary position. Therefore, it is ensured that the electronic component to be inspected is accurately and efficiently inspected.
In the case where a plurality of wiring layers are formed for each of the base substrate and the mounting substrate, each wiring layer includes a signal layer, a power supply layer, and a ground layer. , A configuration in which only one of the power supply layer and the ground layer is included.

加えて、本発明には、前記ベース基板および前記実装基板を形成する前記複数の絶縁層は、同種または異種のセラミック、あるいは同種または異種の樹脂からなる、電子部品検査装置用配線基板(請求項6)も含まれる。
これによれば、ベース基板を構成する複数の絶縁層を、同種または異種のセラミック、あるいは同種または異種の樹脂によって形成したり、実装基板を構成する複数の絶縁層を、同種または異種のセラミック、あるいは同種または異種の樹脂によって形成できる。従って、前記ベース基板および実装基板ごとの仕様に応じて、最適且つ安価な材料のセラミックまたは樹脂を自在に活用することが可能となる。
尚、前記セラミックには、アルミナなどの高温焼成セラミック、およびガラス成分を約50wt%程度含む低温焼成セラミックが含まれ、高温焼成セラミックの場合、前記各配線層や外部接続のパッドなどの導体にWやMoなどが用いられ、低温焼成セラミックの場合、AgやCuなどが用いられる。
また、前記セラミックには、マシナブルセラミック、AlN、またはムライトの何れかからなるものとしても良く、上記マシナブルセラミックは、SiOとAlとの混合物、あるいは、AlNとBNとの混合物からなり、熱膨張係数が約3.0×10−6/℃のSiウェハと、熱膨張係数がほぼ近似している。
更に、前記樹脂には、エポキシ系のほか、前記検査用パッドにプローブを取り付けるプローフビング時の熱に耐える耐熱性のポリイミドなどが用いられる。
In addition, according to the present invention, the plurality of insulating layers forming the base substrate and the mounting substrate are made of the same kind or different kinds of ceramics, or the same kind or different kinds of resins. 6) is also included.
According to this, a plurality of insulating layers constituting the base substrate are formed of the same kind or different kinds of ceramics, or the same kind or different kinds of resins, or a plurality of insulating layers constituting the mounting board are formed of the same kind or different kinds of ceramics, Or it can form with the same kind or different kind of resin. Accordingly, it is possible to freely utilize an optimal and inexpensive material ceramic or resin according to the specifications of the base substrate and the mounting substrate.
The ceramic includes a high-temperature fired ceramic such as alumina, and a low-temperature fired ceramic containing about 50 wt% of a glass component. In the case of the high-temperature fired ceramic, the conductors such as the wiring layers and pads for external connection are provided with W. Or Mo is used. In the case of a low-temperature fired ceramic, Ag, Cu, or the like is used.
The ceramic may be made of any of machinable ceramic, AlN, or mullite, and the machinable ceramic is a mixture of SiO 2 and Al 2 O 3 , or a mixture of AlN and BN. The thermal expansion coefficient is approximately similar to that of a Si wafer having a thermal expansion coefficient of about 3.0 × 10 −6 / ° C.
In addition to the epoxy resin, heat-resistant polyimide that can withstand heat during probing for attaching a probe to the inspection pad is used as the resin.

以下において、本発明を実施するための最良の形態について説明する。
図1は、本発明の電子部品検査装置用配線基板(以下、単に配線基板と言う)1を構成する実装基板2およびベース基板20を示す斜視図、図2は、当該配線基板1を示す垂直断面図である。
配線基板1は、図1,図2に示すように、ベース基板20と、かかるベース基板20の表面21上方に実装され、且つ該表面21と裏面4との間が電気的に接続される実装基板2と、を備えている。
ベース基板20は、複数のセラミック層(絶縁層)s6〜s9からなり、平面視がほぼ正方形の表面21、裏面22、これらの四辺(周辺)間に位置する側面23、および側面23ごとに形成された4つの細長い段部24を有している。かかる段部24は、表面21および裏面22と平行な底面26と、かかる底面26と直交する垂直面25と、これらの両端に位置する一対の端壁27とからなる。
In the following, the best mode for carrying out the present invention will be described.
FIG. 1 is a perspective view showing a mounting board 2 and a base board 20 constituting a wiring board (hereinafter simply referred to as a wiring board) 1 for an electronic component inspection apparatus according to the present invention, and FIG. 2 is a vertical view showing the wiring board 1. It is sectional drawing.
As shown in FIGS. 1 and 2, the wiring board 1 is mounted on the base board 20 and above the front surface 21 of the base board 20, and the front surface 21 and the back surface 4 are electrically connected. And a substrate 2.
The base substrate 20 includes a plurality of ceramic layers (insulating layers) s6 to s9, and is formed for each of a front surface 21 and a rear surface 22 that are substantially square in plan view, a side surface 23 positioned between these four sides (periphery), and the side surfaces 23. 4 elongated stepped portions 24 are formed. The step portion 24 includes a bottom surface 26 parallel to the front surface 21 and the back surface 22, a vertical surface 25 orthogonal to the bottom surface 26, and a pair of end walls 27 located at both ends thereof.

図2に示すように、前記セラミック層s6〜s9間には、配線層32,34,36が形成され、これらは、信号層、電源層、接地層の全てを含んでいる。また、最下層の配線層36は、その一部が各段部24の底面26に延出した外部接続用のパッド28とも接続されている。また、ベース基板20の表面21には、複数のパッド(LGAパッド)30が格子状に形成されている。かかるパッド30、および配線層32,34,36の相互間は、セラミック層s6〜s8を貫通するビア導体vを介して導通可能とされている。
尚、前記セラミック層s6〜s9は、例えば、アルミナやAlNなどを主成分とする高温焼成セラミック、または、ガラス成分を約50wt%程度含む低温焼成セラミックからなり、前者の場合、パッド30、配線層32,34,36、およびビア導体vの導体には、WまたはMoなどが用いられ、後者の場合、AgまたはCuなどが用いられる。
As shown in FIG. 2, wiring layers 32, 34, and 36 are formed between the ceramic layers s6 to s9, and these include all of the signal layer, the power supply layer, and the ground layer. The lowermost wiring layer 36 is also connected to a pad 28 for external connection, a part of which extends to the bottom surface 26 of each step portion 24. A plurality of pads (LGA pads) 30 are formed on the surface 21 of the base substrate 20 in a lattice pattern. The pad 30 and the wiring layers 32, 34, and 36 can be electrically connected to each other through a via conductor v penetrating the ceramic layers s6 to s8.
The ceramic layers s6 to s9 are made of, for example, a high-temperature fired ceramic mainly composed of alumina, AlN, or the like, or a low-temperature fired ceramic containing about 50 wt% of a glass component. For the conductors 32, 34, and 36 and the via conductor v, W or Mo is used. In the latter case, Ag or Cu is used.

実装基板2は、図1,図2に示すように、複数のセラミック層(絶縁層)s1〜s5からなり、平面視がほぼ正方形の表面3、裏面4、これらの四辺(周辺)間に位置する側面5、表面3に格子状にて形成された複数の検査用パッド6、および、裏面4に同様に形成された複数のパッド(LGAパッド)7を有する。
各側面5は、表面3および裏面4と直交し、且つ当該実装基板2の厚み方向に沿った平坦面である。また、セラミック層s1〜s5間には、電源層の配線層14,接地層である一対の配線層16,18、およびこれら挟まれた信号層の配線層17が形成されている。かかる配線層14,16〜18、検査用パッド6、およびパッド7の相互間は、貫通孔thを含むセラミック層s1〜s5を貫通するビア導体vを介して導通可能とされている。
尚、セラミック層s1〜s5も、前記同様の高温焼成セラミック、または、低温焼成セラミックからなり、これらに応じて、配線層14,16〜18、およびパッド7の導体にも、WまたはMo、あるいは、AgまたはCuなどが用いられる。
As shown in FIGS. 1 and 2, the mounting substrate 2 is composed of a plurality of ceramic layers (insulating layers) s1 to s5, and is located between a front surface 3 and a rear surface 4 that are substantially square in plan view, and between these four sides (periphery). And a plurality of test pads 6 formed in a lattice pattern on the front surface 3 and a plurality of pads (LGA pads) 7 formed in the same manner on the back surface 4.
Each side surface 5 is a flat surface orthogonal to the front surface 3 and the back surface 4 and along the thickness direction of the mounting substrate 2. Between the ceramic layers s1 to s5, a wiring layer 14 as a power supply layer, a pair of wiring layers 16 and 18 as a ground layer, and a wiring layer 17 as a signal layer sandwiched therebetween are formed. The wiring layers 14, 16 to 18, the inspection pad 6, and the pad 7 can be connected to each other through via conductors v that penetrate the ceramic layers s 1 to s 5 including the through holes th.
The ceramic layers s1 to s5 are also made of the same high-temperature fired ceramic or low-temperature fired ceramic, and the conductors of the wiring layers 14 and 16 to 18 and the pad 7 are also made W, Mo, or , Ag or Cu is used.

図2中の一点鎖線の枠内に部分拡大図で模式的に示すように、検査用パッド6は、当該実装基板2の表面3に隣接して、全体がほぼ円柱形を呈するように、Ti薄膜層8、Cu薄膜層9、Cuメッキ層10が順次積層され、これらの周面および頂面にNiメッキ層11を介して、Auメッキ層12が形成されている。
図2に示すように、ベース基板20の表面21に形成されたパッド30ごとと、実装基板2の裏面4に形成されたパッド7ごととの間には、後述するハンダボールを加熱・凝固したハンダhが形成され、かかるハンダhを介して、ベース基板20の表面21上方に実装基板2が実装される。これにより、本発明の配線基板1が構成される。同時に、上記パッド7,30、およびハンダhを介して、実装基板2の配線層14,16〜18、ビア導体v、および検査用パッド6と、ベース基板20の配線層32,34,36、ビア導体v、および外部接続用のパッド28とが、相互に導通可能とされている。
As schematically shown in the partial enlarged view in the frame of the alternate long and short dash line in FIG. 2, the inspection pad 6 is adjacent to the surface 3 of the mounting substrate 2 so that the whole has a substantially cylindrical shape. A thin film layer 8, a Cu thin film layer 9, and a Cu plating layer 10 are sequentially laminated, and an Au plating layer 12 is formed on the peripheral surface and the top surface with a Ni plating layer 11 interposed therebetween.
As shown in FIG. 2, a solder ball described later is heated and solidified between each pad 30 formed on the front surface 21 of the base substrate 20 and each pad 7 formed on the back surface 4 of the mounting substrate 2. Solder h is formed, and the mounting substrate 2 is mounted above the surface 21 of the base substrate 20 through the solder h. Thereby, the wiring board 1 of this invention is comprised. At the same time, the wiring layers 14 and 16 to 18 of the mounting substrate 2, the via conductor v and the inspection pad 6, and the wiring layers 32, 34 and 36 of the base substrate 20, via the pads 7 and 30 and the solder h. The via conductor v and the external connection pad 28 can be electrically connected to each other.

図3は、本発明の配線基板1の使用状態を示す模式的な垂直断面図である。
図3に示すように、プリント基板(マザーボード)40の表面41に配線基板1を載置し、かかる表面41に平面視でほぼ矩形枠状に配設された複数の電極パッド42と、ベース基板20の各段部24の底面26に位置する複数の外部接続用のパッド28との間を、個別にワイヤーwをボンディングすることで導通する。
尚、配線基板1の位置決めは、例えば、プリント基板40の表面41に、図示しない複数のピンを立設し、かかるピンをペース基板20に設けた図示しないピン挿入用孔に挿入することで成される。
図3に示すように、実装基板2の表面3に形成された複数の検査用パッド6の頂面には、複数のプローブpが個別に取り付けられる。かかるプローブpは、例えば、配線基板1に対して相対的に移動するSiウェハ44に形成された多数の半導体素子などの電子部品ごとの電極パッド46と個別に接触することで、個々の電子部品の電気的特性を検査することに活用される。尚、該プローブpが取り付けられた配線基板1は、プローブカードとなる。
FIG. 3 is a schematic vertical sectional view showing a usage state of the wiring board 1 of the present invention.
As shown in FIG. 3, the wiring board 1 is placed on a surface 41 of a printed circuit board (motherboard) 40, a plurality of electrode pads 42 arranged on the surface 41 in a substantially rectangular frame shape in plan view, and a base substrate The plurality of external connection pads 28 located on the bottom surface 26 of each of the 20 step portions 24 are electrically connected by individually bonding wires w.
The wiring board 1 is positioned by, for example, standing a plurality of pins (not shown) on the surface 41 of the printed board 40 and inserting the pins into pin insertion holes (not shown) provided on the pace board 20. Is done.
As shown in FIG. 3, a plurality of probes p are individually attached to the top surfaces of the plurality of inspection pads 6 formed on the surface 3 of the mounting substrate 2. Such a probe p is individually contacted with an electrode pad 46 for each electronic component such as a large number of semiconductor elements formed on a Si wafer 44 that moves relative to the wiring substrate 1. It is used to inspect the electrical characteristics of. The wiring board 1 to which the probe p is attached serves as a probe card.

即ち、図3に示すように、プリント基板40内からパッド42、ボンディングワイヤーw、外部接続用のパッド28を介して、ベース基板20において、例えば、配線層36内の電源層に給電された電流は、ビア導体v、配線層34および配線層32内の信号層や接地層を経た後、パッド30、ハンダh、パッド7を介して、実装基板2に送信される。かかる電流は、実装基板2内のビア導体v、接地層の配線層18,16、信号層の配線層17、あるいは電源層の配線層14、更には検査用パッド6を経て、プローブpからSiウェハ44の各電極パッド46に送信され、各電子部品ごとの電気的機能を実行させて、その電気的特性を発現させる。
そして、得られた電気的特性の信号電流は、上記と逆の経路でプリント基板40に送信される。その結果、Siウェハ44に形成された多数の電子部品ごとの電気的特性を、正確且つ迅速に検出することが可能となる。
That is, as shown in FIG. 3, for example, the current supplied from the printed circuit board 40 to the power supply layer in the wiring layer 36 in the base substrate 20 through the pad 42, the bonding wire w, and the external connection pad 28. Is transmitted to the mounting substrate 2 via the pad 30, the solder h, and the pad 7 after passing through the via conductor v, the signal layer and the ground layer in the wiring layer 34 and the wiring layer 32. Such current flows from the probe p to Si via the via conductor v in the mounting substrate 2, the wiring layers 18 and 16 of the ground layer, the wiring layer 17 of the signal layer, the wiring layer 14 of the power supply layer, and the inspection pad 6. It is transmitted to each electrode pad 46 of the wafer 44, and an electrical function for each electronic component is executed to develop its electrical characteristics.
Then, the obtained signal current having the electrical characteristics is transmitted to the printed circuit board 40 through the reverse path. As a result, it is possible to accurately and quickly detect the electrical characteristics of each of a large number of electronic components formed on the Si wafer 44.

前記配線基板1は、以下のように、実装基板2およびベース基板20を平行して製造し、両基板2,20を前記ハンダhで接続することで製作した。
先ず、図4〜図7に沿って、前記実装基板2の製造方法を説明する。
予め、アルミナ粉末、所要の有機バインダ、および溶剤などを、所要量ずつ瓶量・混合してセラミックスラリを製作し、これをドクターブレード法によって、シート状を呈する複数のグリーンシートs1〜s5に成形した。
次に、上記グリーンシートs1〜s5における所定の位置ごとに、打ち抜き加工を施して、図4の左側に示すように、貫通孔vhを穿孔した。次いで、各貫通孔vhごとに、W粉末またはMo粉末を含む導電性ペーストを充填して、図4の中央付近および右側に示すように、未焼成のビア導体vを形成した。
The wiring substrate 1 was manufactured by manufacturing the mounting substrate 2 and the base substrate 20 in parallel and connecting the substrates 2 and 20 with the solder h as follows.
First, a method for manufacturing the mounting substrate 2 will be described with reference to FIGS.
A ceramic slurry is prepared by mixing and mixing required amounts of alumina powder, required organic binder, and solvent in advance, and this is formed into a plurality of green sheets s1 to s5 that have a sheet shape by the doctor blade method. did.
Next, punching was performed for each predetermined position in the green sheets s1 to s5, and a through hole vh was formed as shown on the left side of FIG. Next, each through hole vh was filled with a conductive paste containing W powder or Mo powder to form an unfired via conductor v as shown in the vicinity of the center and on the right side of FIG.

更に、グリーンシートs2〜s5の表面とグリーンシートs5の裏面とに、上記同様の導電性ペーストをスクリーン印刷して、図4の中央付近および右側に示すように、所要のパターンを有する未焼成の配線層14,16〜18、およびパッド7を形成した。これらは、前記ビア導体vの何れかと接続されている。
そして、以上のようなグリーンシートs1〜s5を厚み方向に沿って積層・圧着した後、所定の温度帯で焼成した。
その結果、図5に示すように、セラミック層s1〜s5からなり、表面3、裏面4、および側面5を有し、焼成された配線層14,16〜18、ビア導体v、およびパッド7を備え、且つ検査用パッド6のない実装基板2が形成された。
Furthermore, the same conductive paste as described above is screen-printed on the front surface of the green sheets s2 to s5 and the back surface of the green sheet s5, and as shown in the vicinity of the center and on the right side of FIG. Wiring layers 14 and 16 to 18 and a pad 7 were formed. These are connected to any one of the via conductors v.
And after laminating | stacking and crimping | bonding the above green sheets s1-s5 along the thickness direction, it baked in the predetermined | prescribed temperature range.
As a result, as shown in FIG. 5, the wiring layers 14, 16 to 18, the via conductors v, and the pads 7 including the ceramic layers s 1 to s 5, the front surface 3, the back surface 4, and the side surface 5 The mounting substrate 2 that is provided and has no inspection pad 6 was formed.

次に、前記実装基板2の表面3を研磨して平坦面とした後、ビア導vの端面が露出する表面3上に、図6の左側に示すように、Ti薄膜層(金属薄膜層)8とCu薄膜層(金属薄膜層)9とを、順次スパッタリングによって形成した。この際、側面5が平坦な垂直面であるため、スパッタリング時におけるマスキング材の一部が回り込む事態を容易に阻止できた。
次いで、上記Cu薄膜層9の上に感光性樹脂からなるレジスト層rを形成した後、かかるレジスト層rに対しフォトリソグラフィー技術を施すことによって、図6の中央に示すように、ビア導体vごとの上方に円柱形の貫通孔13を形成した。この際、側面5が平坦な垂直面であるため、上記レジスト材の一部が回り込む事態を回避することが容易であった。
Next, after the surface 3 of the mounting substrate 2 is polished to a flat surface, a Ti thin film layer (metal thin film layer) is formed on the surface 3 where the end face of the via conductor v is exposed, as shown on the left side of FIG. 8 and a Cu thin film layer (metal thin film layer) 9 were sequentially formed by sputtering. At this time, since the side surface 5 is a flat vertical surface, it was possible to easily prevent a part of the masking material from turning around during sputtering.
Next, after forming a resist layer r made of a photosensitive resin on the Cu thin film layer 9, by applying a photolithography technique to the resist layer r, as shown in the center of FIG. A cylindrical through-hole 13 was formed above the. At this time, since the side surface 5 is a flat vertical surface, it is easy to avoid a situation in which a part of the resist material wraps around.

次に、図6の右側に示すように、各貫通孔13の底面に露出するCu薄膜層9の上に、電解Cuメッキによって、Cuメッキ層10を形成した。この際、側面5が平坦な垂直面であるため、Cuメッキの一部の不用意な付着を容易に阻止できた。
かかる状態で、図7の左側に示すように、上記レジスト層rを現像液によって溶解・除去した。
次いで、図7の中央に示すように、Ti薄膜層8、Cu薄膜層9、およびCuメッキ層10の周面と、Cuメッキ層10の頂面とに対し、Niメッキ層11を形成した。更に、図7の右側に示すように、かかるNiメッキ層11の表面全体にAuメッキ層12を形成した。その結果、表面3に複数の検査用パッド6が精度良く形成されることで、前記図1〜図3に示した実装基板2が製造された。
尚、かかる実装基板2は、多数個取りの方法によって製造しても良い。
Next, as shown on the right side of FIG. 6, a Cu plating layer 10 was formed on the Cu thin film layer 9 exposed on the bottom surface of each through hole 13 by electrolytic Cu plating. At this time, since the side surface 5 is a flat vertical surface, inadvertent adhesion of a part of the Cu plating can be easily prevented.
In this state, as shown on the left side of FIG. 7, the resist layer r was dissolved and removed with a developer.
Next, as shown in the center of FIG. 7, the Ni plating layer 11 was formed on the peripheral surfaces of the Ti thin film layer 8, the Cu thin film layer 9, and the Cu plating layer 10 and the top surface of the Cu plating layer 10. Further, as shown on the right side of FIG. 7, an Au plating layer 12 was formed on the entire surface of the Ni plating layer 11. As a result, the mounting substrate 2 shown in FIGS. 1 to 3 was manufactured by forming the plurality of test pads 6 on the surface 3 with high accuracy.
The mounting substrate 2 may be manufactured by a multi-cavity method.

一方、前記ベース基板20は、図8,図9に示す工程によって製造した。
予め、前記同様に平面視が正方形のグリーンシートs6〜s9を製作した。
次に、グリーンシートs6〜s8の四辺(周辺)ごとの両端付近を除く位置を、平面視で細長い長方形に切り欠いて、図7に示すように、それぞれ四辺ごとに凹部kを形成した。更に、グリーンシートs6〜s8における所定の位置を打ち抜き加工して、図8の左側に示すように、貫通孔vhを穿孔した。次いで、各貫通孔vhごとに、W粉末またはMo粉末を含む導電性ペーストを充填して、図7の中央付近および右側に示すように、未焼成のビア導体vを形成した。
On the other hand, the base substrate 20 was manufactured by the steps shown in FIGS.
Similarly to the above, green sheets s6 to s9 having a square plan view were manufactured in advance.
Next, the positions excluding the vicinity of both ends of each of the four sides (periphery) of the green sheets s6 to s8 were cut out into a long and narrow rectangle in plan view, and a recess k was formed on each of the four sides as shown in FIG. Further, predetermined positions in the green sheets s6 to s8 were punched out, and through holes vh were formed as shown on the left side of FIG. Next, each through hole vh was filled with a conductive paste containing W powder or Mo powder to form an unfired via conductor v as shown in the vicinity of the center and on the right side of FIG.

更に、グリーンシートs6〜s9の表面に、上記同様の導電性ペーストをスクリーン印刷して、図8の中央付近および右側に示すように、所要のパターンを有する未焼成のパッド30、および配線層32,34.36を形成した。これらは、前記ビア導体vの何れかと接続されている。
次いで、以上のようなグリーンシートs6〜s9を、前記各凹部kが連続するように、厚み方向に沿って積層・圧着した。その結果、図9に示すように、表面21、裏面22、側面23、および四辺の段部24を有し、パッド30、配線層32,34,36、ビア導体v、および外部接続用のパッド28を備えた未焼成のベース基板20が得られた。そして、かかるベース基板20を所定の温度帯で焼成することで、前記図1〜図3に示したベース基板20が得られた。
尚、かかるベース基板20は、多数個取りの方法によって製造しても良い。
Furthermore, the same conductive paste as described above is screen-printed on the surfaces of the green sheets s6 to s9, and as shown in the vicinity of the center and on the right side of FIG. , 34.36 were formed. These are connected to any one of the via conductors v.
Next, the green sheets s6 to s9 as described above were laminated and pressure-bonded along the thickness direction so that the concave portions k were continuous. As a result, as shown in FIG. 9, it has a front surface 21, a back surface 22, a side surface 23, and a step 24 on four sides, a pad 30, wiring layers 32, 34, 36, a via conductor v, and a pad for external connection. An unfired base substrate 20 with 28 was obtained. The base substrate 20 shown in FIGS. 1 to 3 was obtained by firing the base substrate 20 in a predetermined temperature range.
The base substrate 20 may be manufactured by a multi-cavity method.

更に、図10に示すように、ベース基板20の表面21に形成された各パッド30ごとの上にハンダボールhbをセットし、かかるハンダボールhbごとの上に、実装基板2の裏面4に形成された各パッド7を載置した後、各ハンダボールhbの融点直上付近の温度に加熱した。その結果、表層を溶融・凝固させたハンダボールhbがパッド7,30を接続することで、ベース基板20の表面21上方に実装基板2が実装され、前記図1〜図3に示した配線基板1が得られた。   Further, as shown in FIG. 10, a solder ball hb is set on each pad 30 formed on the front surface 21 of the base substrate 20, and formed on the back surface 4 of the mounting substrate 2 on each solder ball hb. After placing each pad 7, it was heated to a temperature near the melting point of each solder ball hb. As a result, the solder ball hb whose surface layer is melted and solidified connects the pads 7 and 30, whereby the mounting substrate 2 is mounted above the surface 21 of the base substrate 20, and the wiring substrate shown in FIGS. 1 was obtained.

以上のような配線基板1によれば、複数のセラミック層s1〜s5からなり、表面3、裏面4、および側面5を有し、セラミック層s1〜s5間に形成された配線層14,16〜18を有する実装基板2では、表面3に対しマスキングが容易に施せ、且つ側面5に付着し得る不用意なメッキやマスキングを容易に除去できる。このため、かかる表面3に検査用パッド6を精度良く形成した実装基板2となる。しかも、プリント基板40と接続するためのボンディングワイヤーwとは、ベース基板20の側面23に設けた段部24の底面26に位置する外部接続用のパッド28によって、容易に接続することができる。   According to the wiring board 1 as described above, the wiring layers 14, 16 to 16 are formed of a plurality of ceramic layers s 1 to s 5, have a front surface 3, a back surface 4, and side surfaces 5 and are formed between the ceramic layers s 1 to s 5. In the mounting substrate 2 having 18, the surface 3 can be easily masked, and inadvertent plating and masking that can adhere to the side surface 5 can be easily removed. For this reason, the mounting substrate 2 is formed with the inspection pads 6 formed on the surface 3 with high accuracy. In addition, the bonding wire w for connecting to the printed circuit board 40 can be easily connected by the external connection pad 28 located on the bottom surface 26 of the step portion 24 provided on the side surface 23 of the base substrate 20.

従って、プリント基板40との電気的接続をボンディングワイヤーwを介して行え、特に薄膜形成工程において製造し易く比較的安価に製作できる配線基板1を提供することができる。
更に、実装基板2とベース基板20とに分割したため、両基板2,20を平行して同時に、または随時に製造することもできる。このため、半導体素子などの電子部品の開発期間の短縮化に対応して、表面3における所要の位置に検査用パッド6を形成した実装基板2を迅速に提供できる。一方、ベース基板20は、実装すべきプリント基板40に応じて、レイアウトや仕様を維持したり、これらを適時に変更することが可能となる。よって、従来の一体構造の配線基板に比べて、製作納期を短縮し易く、且つ種々の納期に対してもフレキシブルに対処することが可能となる。
Accordingly, it is possible to provide the wiring board 1 which can be electrically connected to the printed board 40 via the bonding wire w, and can be manufactured easily at a relatively low cost, particularly in the thin film forming process.
Furthermore, since the mounting substrate 2 and the base substrate 20 are divided, both the substrates 2 and 20 can be manufactured in parallel or at the same time. For this reason, the mounting substrate 2 in which the inspection pads 6 are formed at the required positions on the surface 3 can be quickly provided in response to the shortening of the development period of electronic components such as semiconductor elements. On the other hand, according to the printed circuit board 40 to be mounted, the base substrate 20 can maintain the layout and specifications, or change them in a timely manner. Therefore, it is easy to shorten the production delivery time compared to the conventional integrated wiring board, and it is possible to flexibly cope with various delivery dates.

図11は、異なる形態の配線基板1aを構成する実装基板2およびベース基板50を示す斜視図、図12は、当該配線基板1aを示す垂直断面図である。
配線基板1aは、ベース基板50と、かかるベース基板50の表面51上方に実装され、且つ該表面51と裏面4との間が電気的に接続される前記同様の実装基板2と、を備えている。
図11,図12に示すように、ベース基板50は、前記同様のセラミック層(絶縁層)s6〜s9からなり、平面視がほぼ正方形の表面51、裏面52、これらの四辺(周辺)間に位置する側面53、および側面53ごとに形成された4つの細長い段部54を有している。かかる段部54は、表面51および裏面52と平行で且つ側面53ごとの全長に沿った底面56と、かかる底面56と直交する垂直面55とからなる。
FIG. 11 is a perspective view showing a mounting board 2 and a base board 50 constituting a wiring board 1a of a different form, and FIG. 12 is a vertical sectional view showing the wiring board 1a.
The wiring substrate 1a includes a base substrate 50 and the same mounting substrate 2 that is mounted above the front surface 51 of the base substrate 50 and electrically connected between the front surface 51 and the back surface 4. Yes.
As shown in FIGS. 11 and 12, the base substrate 50 is composed of the same ceramic layers (insulating layers) s6 to s9 as described above, and has a front surface 51 and a back surface 52 that are substantially square in plan view, and between these four sides (periphery). It has the side surface 53 located, and the four elongate step part 54 formed for every side surface 53. As shown in FIG. The step portion 54 includes a bottom surface 56 parallel to the front surface 51 and the back surface 52 and along the entire length of each side surface 53, and a vertical surface 55 orthogonal to the bottom surface 56.

図12に示すように、セラミック層s6〜s9間には、信号層、電源層、接地層の全てを含む配線層32,34,36が形成されている。最下層の配線層36は、その一部が各段部54の底面56に延出した外部接続用のパッド58と接続している。また、ベース基板50の表面51には、前記同様の30が格子状に形成されている。かかるパッド30、および配線層32,34,36の相互間は、セラミック層s6〜s8を貫通するビア導体vを介して導通可能である。
図12に示すように、ベース基板50の表面51に形成されたパッド30ごとと、実装基板2の裏面4に形成されたパッド7ごととの間には、前記ハンダボールhbを加熱・凝固したハンダhが形成され、かかるハンダhを介して、ベース基板50の表面51上方に実装基板2が実装されることで、配線基板1aが構成される。
As shown in FIG. 12, wiring layers 32, 34, and 36 including all of the signal layer, the power supply layer, and the ground layer are formed between the ceramic layers s6 to s9. A part of the lowermost wiring layer 36 is connected to an external connection pad 58 extending to the bottom surface 56 of each step 54. Further, the same 30 as described above is formed in a lattice shape on the surface 51 of the base substrate 50. The pad 30 and the wiring layers 32, 34, and 36 can be electrically connected to each other through a via conductor v that penetrates the ceramic layers s6 to s8.
As shown in FIG. 12, the solder balls hb are heated and solidified between each pad 30 formed on the front surface 51 of the base substrate 50 and each pad 7 formed on the back surface 4 of the mounting substrate 2. Solder h is formed, and the mounting substrate 2 is mounted above the surface 51 of the base substrate 50 through the solder h, whereby the wiring substrate 1a is configured.

同時に、前記パッド7,30、およびハンダhを介して、実装基板2の配線層14,16〜18、ビア導体v、および検査用パッド6と、ベース基板50の配線層32,34,36、ビア導体v、および外部接続用のパッド58とが、相互に導通可能とされている。
以上のような配線基板1aは、前記同様の方法によって製造され、前記配線基板1と同様な作用を発揮できると共に、同様な効果を奏することが可能である。
At the same time, the wiring layers 14 and 16 to 18 of the mounting substrate 2, the via conductor v and the inspection pad 6, and the wiring layers 32, 34 and 36 of the base substrate 50, via the pads 7 and 30 and the solder h. The via conductor v and the external connection pad 58 can be electrically connected to each other.
The wiring board 1a as described above is manufactured by the same method as described above, and can exhibit the same effects as the wiring board 1 and can exhibit the same effects.

本発明は、以上において説明した各形態に限定されるものではない。
例えば、前記絶縁層は、各種のエポキシ樹脂、あるいはポリイミドなどの耐熱性樹脂からなるものとしても良い。
また、前記ベース基板の配線層は、前記実装基板内の配線層と同様に、信号層、電源層、あるいは接地層の何れか専用のレイアウトとしても良い。一方、これと反対に、実装基板内の各配線層を、それぞれ信号層、電源層、および接地層の全てを含む形態としても良い。
更に、前記段部は、ベース基板における四辺の1辺、対向または隣接する2辺、あるいは3辺に形成しても良い。このうち、前記底面および垂直面の両端に一対の端壁を有する形態の段部は、ベース基板の同じ側面に2つ以上形成しても良い。
また、前記段部ごとの底面は、ベース基板の厚み方向および平面方向に沿って内外2段以上とし、各底面ごとに前記外部接続用のパッドを形成しても良い。
加えて、前記実装基板の表面に形成する検査用パッドは、かかる表面において前記格子状の配置に限らず、検査すべき電子部品における複数の電極パッドの位置に対向した任意の位置に配設しても良い。
The present invention is not limited to the embodiments described above.
For example, the insulating layer may be made of various epoxy resins or heat resistant resins such as polyimide.
Further, the wiring layer of the base substrate may have a dedicated layout for any one of the signal layer, the power supply layer, and the ground layer, similarly to the wiring layer in the mounting substrate. On the other hand, each wiring layer in the mounting substrate may include all of the signal layer, the power supply layer, and the ground layer.
Further, the step portion may be formed on one side of the four sides of the base substrate, two sides facing or adjacent to each other, or three sides. Of these, two or more stepped portions having a pair of end walls at both ends of the bottom surface and the vertical surface may be formed on the same side surface of the base substrate.
The bottom surface of each step portion may be two or more steps inside and outside along the thickness direction and the planar direction of the base substrate, and the external connection pad may be formed for each bottom surface.
In addition, the inspection pads formed on the surface of the mounting substrate are not limited to the lattice-like arrangement on the surface, and are arranged at arbitrary positions facing the positions of the plurality of electrode pads in the electronic component to be inspected. May be.

本発明の一形態の配線基板を構成する実装基板とベース基板とを示す斜視図。The perspective view which shows the mounting board | substrate and base board which comprise the wiring board of 1 form of this invention. 実装後の上記配線基板を示す垂直断面図およびその部分拡大図。The vertical sectional view which shows the said wiring board after mounting, and its partial enlarged view. 上記配線基板の使用状態を示す模式的な垂直断面図。The typical vertical sectional view which shows the use condition of the said wiring board. 上記実装基板の製造工程を示す概略図。Schematic which shows the manufacturing process of the said mounting board | substrate. 図4に続く実装基板の製造工程を示す概略図。Schematic which shows the manufacturing process of the mounting board following FIG. 図5に続く実装基板の製造工程を示す概略図。Schematic which shows the manufacturing process of the mounting substrate following FIG. 図6に続く実装基板の製造工程を示す概略図。Schematic which shows the manufacturing process of the mounting board following FIG. 上記ベース基板の製造工程を示す概略図。Schematic which shows the manufacturing process of the said base substrate. 図8に続くベース基板の製造工程を示す概略図。Schematic which shows the manufacturing process of the base substrate following FIG. 上記配線基板の製造工程を示す概略図。Schematic which shows the manufacturing process of the said wiring board. 異なる形態の配線基板を構成する実装基板とベース基板とを示す斜視図。The perspective view which shows the mounting board | substrate and base board which comprise the wiring board of a different form. 実装後の上記配線基板を示す垂直断面図。FIG. 4 is a vertical sectional view showing the wiring board after mounting.

符号の説明Explanation of symbols

1,1a………………………………配線基板(電子部品検査装置用配線基板)
2………………………………………実装基板
3,21,51………………………表面
4,22,52………………………裏面
5,23,53………………………側面
6………………………………………検査用パッド
8………………………………………Ti薄膜層(金属薄膜層)
9………………………………………Cu薄膜層(金属薄膜層)
14,16〜18,32,34,36…配線層
24,54……………………………段部
25,55……………………………垂直面
26,56……………………………底面
28,58……………………………外部接続用のパッド
s1〜s9……………………………セラミック層(絶縁層)
1,1a ……………………………… Wiring board (wiring board for electronic component inspection equipment)
2 ………………………………………… Mounting board 3, 21, 51 ……………………… Front side 4, 22, 52 ……………………… Back side 5, 23, 53 ……………………… Side 6 ……………………………………… Inspection pad 8 ………………………………………… Ti thin film Layer (metal thin film layer)
9 ……………………………………… Cu thin film layer (metal thin film layer)
14,16-18,32,34,36 ... wiring layers 24,54 .................................... Steps 25,55 ...................................................... Vertical surfaces 26,56 ... ………………………… Bottom 28, 58 …………………………… Pads for external connection s1 to s9 …………………………… Ceramic layer (insulating layer)

Claims (6)

複数の絶縁層からなり、表面、裏面、およびこれらの周辺間に位置する側面を有し、上記絶縁層間に形成された配線層、および上記側面に形成され且つ底面に外部接続用のパッドが形成された段部を有するベース基板と、
上記ベース基板の表面上方に実装され、複数の絶縁層からなり、検査用パッドが形成された表面、裏面、および上記複数の絶縁層間に形成された配線層を有し、上記裏面と上記ベース基板の表面との間が電気的に接続されている実装基板と、を備える、
ことを特徴とする電子部品検査装置用配線基板。
Consists of a plurality of insulating layers, having a front surface, a back surface, and a side surface located between these, a wiring layer formed between the insulating layers, and a pad for external connection formed on the side surface and formed on the bottom surface A base substrate having a stepped portion;
Mounted above the front surface of the base substrate, comprising a plurality of insulating layers, having a front surface and a back surface on which an inspection pad is formed, and a wiring layer formed between the plurality of insulating layers, the back surface and the base substrate A mounting substrate electrically connected to the surface of
A wiring board for an electronic component inspection apparatus.
前記ベース基板の段部は、当該ベース基板の表面および裏面と平行な底面と、かかる底面と直交する垂直面とを含み、当該底面に前記配線層と導通する外部接続用の前記パッドが形成されている、
ことを特徴とする請求項1に記載の電子部品検査装置用配線基板。
The step portion of the base substrate includes a bottom surface parallel to the front surface and the back surface of the base substrate, and a vertical surface orthogonal to the bottom surface, and the pad for external connection that is electrically connected to the wiring layer is formed on the bottom surface. ing,
The wiring board for an electronic component inspection apparatus according to claim 1.
前記実装基板は、当該実装基板の表面および裏面の周辺間に、かかる表・裏面と直交し、且つ当該実装基板の厚み方向に沿って平坦な側面を有する、
ことを特徴とする請求項1または2に記載の電子部品検査装置用配線基板。
The mounting substrate has a side surface that is perpendicular to the front and back surfaces, and is flat along the thickness direction of the mounting substrate, between the front and back surfaces of the mounting substrate.
The wiring board for an electronic component inspection apparatus according to claim 1 or 2.
前記実装基板の表面に形成される検査用パッドは、当該表面と隣接する金属薄膜層を含む、
ことを特徴とする請求項1乃至3の何れか一項に記載の電子部品検査装置用配線基板。
The inspection pad formed on the surface of the mounting substrate includes a metal thin film layer adjacent to the surface.
The wiring board for an electronic component inspection apparatus according to any one of claims 1 to 3.
前記ベース基板および前記実装基板ごとに形成される配線層は、信号層、電源層、および接地層をそれぞれ含んでいる、
ことを特徴とする請求項1乃至4の何れか一項に記載の電子部品検査装置用配線基板。
The wiring layer formed for each of the base substrate and the mounting substrate includes a signal layer, a power supply layer, and a ground layer,
The wiring board for an electronic component inspection apparatus according to any one of claims 1 to 4, wherein:
前記ベース基板および前記実装基板を形成する前記複数の絶縁層は、同種または異種のセラミック、あるいは同種または異種の樹脂からなる、
ことを特徴とする請求項1乃至5の何れか一項に記載の電子部品検査装置用配線基板。
The plurality of insulating layers forming the base substrate and the mounting substrate are made of the same kind or different kind of ceramic, or the same kind or different kind of resin.
The wiring board for an electronic component inspection apparatus according to any one of claims 1 to 5.
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