1271528 16093twf.doc/g 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種電性測試的方法，且特別是有關 於一種以錫球接合面（ball bonding side)之接點及其線路 進行電性測試的方法。 【先前技術】1271528 16093twf.doc/g IX. Description of the Invention: [Technical Field] The present invention relates to a method of electrical testing, and in particular to a contact of a ball bonding side and The method of conducting electrical tests on its lines. [Prior Art]
近年來，隨著電子技術的日新月異，高科技電子產業 的相繼問世，使得更人性化、功能更佳的電子產品不斷地 推陳出新，並朝向輕、薄、短、小的趨勢設計。目前在半 導體製程當中，線路基板（circuit substrate)是經常使用的 構裴元件，其主要包括堆疊㈣扣幻壓合式及積層式(buiid叩) 二大類型之基板。其中，線路基板之外表面具有多數個上、 下接點（contact)，可分別連接打線接合（wire b〇nding) 或覆晶接合（flip chip bonding)之晶片與對外電性連接之 接腳或銲球。一般而言，在未組裝晶片與對外電性連接之 接腳或銲球之前，這些接點可作為線路基板電性測試之 用，以判斷經由微影蝕刻所完成之圖案化線路是否 帝 性測試之標準。 才口兒 =考圖1，其繪示習知一種線路基板之電性測試的 Γ首先’將完成上、下接點120、130之線路基 電性測試機台（切示）上，並以多數個 =占〇、12對應接觸線路基板1〇〇之上、下接點ΐ2〇、ι%。 二，上接點120例如是晶片接合端之接點，而下接點13〇 歹如疋杯球接合端之接點，且上接點12() $密排列於線路 5 1271528 16093twf.doc/g 基板100之表面，使得上接點12〇之 接點130之間的間距。相對地，測/ ^吊小於下 點120的數量、間距一致的探針1〇，二測接與上接 及其::的:ΐ要ί是否符合短路/斷路_之4^^ 的數量、_補财歧^路^⑽之上接點120 試機台或以不同的探針1〇予以;=同日守變更不同的測 性太低’探針Η)的成本居高不^使夕= 式機台之共用 在不改變線路基板丨00之線路^_。因此’如何 的共用性，實為業界—致努°，又能提南測試機台 【發明内容】 ^ ° 本發明的目的就是在楹一 法’藉由單邊賴接點的:4路電性測試的方 的設備及成本。 里/則方法，以簡化測試機台 本發明提出一種線路電 以 以 之 驟：首先，提供—基材，並於的方法，包括下列步 二表面分別形成-第-金屬二j之—[表面及一第 鍍通孔，且該鍍通孔導通於;从一f二金屬層以及至少一 性連接第一與第二金屬層。、之弟—與第二表面，並電 形成多數個第-接點；以^ ’圖案化第—金屬層’ 對這些第—接點純通孔二'難觸這些第-接點， 後，圖案化第二金屬層，仃弟一次斷路電性測試。之 第二接點分別與第—接點^成多數個第二接點，而這些 針分別接觸這此第一招^/、之一電性連接。最後，以探 一接上叫第-接點、第二接點以及 6 1271528 16093twf.d〇c/g 鍍通孔進行第二次電性測試。 依知本發明的較佳實施 有二表面鋪狀介電基^絲材可選自具 路基材，包括由多數個介電^外，基材亦可選自多層線 互堆疊而成。 心％如及多數個_化線路層交 依如本發明的較佳實施In recent years, with the rapid development of electronic technology, the high-tech electronics industry has emerged, making electronic products that are more user-friendly and functionally better, and designed toward light, thin, short, and small trends. At present, in the semi-conducting process, a circuit substrate is a commonly used structural element, which mainly includes two types of substrates: a stack (four), a snap-fit type, and a laminated type (buiid). Wherein, the outer surface of the circuit substrate has a plurality of upper and lower contacts, and the wires of the wire b〇nding or the flip chip bonding and the external electrical connection pins or Solder balls. In general, these contacts can be used as electrical test for the circuit board before the electrodes or externally connected pins or solder balls are assembled, to determine whether the patterned circuit completed by lithography is tested. The standard.才口儿=考图1, which shows that the electrical test of a circuit substrate firstly 'will complete the line-based electrical test machine (cut) of the upper and lower contacts 120, 130, and Most of them correspond to 〇, 12 correspond to contact circuit substrate 1 、 above, and lower contact ΐ 2 〇, ι%. Second, the upper contact 120 is, for example, the junction of the wafer bonding end, and the lower contact 13 is, for example, the junction of the cup ball bonding end, and the upper contact 12 () $ is densely arranged on the line 5 1271528 16093twf.doc/ g The surface of the substrate 100 such that the spacing between the contacts 130 of the upper contacts 12 turns. In contrast, the measurement / ^ hang is smaller than the number of the lower point 120, the pitch of the probe 1 〇, the second measurement connection and the upper connection and its:: ΐ ί ί 符合 符合 符合 符合 符合 符合_ 补财歧^路^(10) above the contact point 120 test machine or with different probes 1 ;; = the same day change the different measurement is too low 'probe Η) the cost is not high ^ 夕 = The sharing of the type of machine is not changing the line of the circuit board 丨00. Therefore, 'how to share, it is the industry-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- The equipment and cost of the party to the test. In order to simplify the test machine, the present invention proposes a line of electricity for the first step: first, providing a substrate, and the method comprising the following steps: forming a surface - a metal - a surface - a first plated through hole, and the plated through hole is electrically connected to; and the first and second metal layers are connected from at least one metal layer and at least one. Brother, and the second surface, and electrically form a plurality of first contacts; ^ 'patterning the first metal layer' to these first contacts pure through holes two 'difficult to touch these first contacts, then Patterning the second metal layer, the younger brother once broke the electrical test. The second contact is respectively formed with a plurality of second contacts with the first contact, and the pins are respectively in contact with the first one. Finally, a second electrical test is performed by first detecting the first contact, the second contact, and the 6 1271528 16093twf.d〇c/g plated through hole. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A two-surface dielectric dielectric wire may be selected from a substrate comprising a plurality of dielectric layers, and the substrate may be selected from the group consisting of multilayer wires. Heart% as and a plurality of _ circuit layer interactions as in the preferred embodiment of the present invention
球接::本而，二表面例二’=面例如是一錫 與弟二金屬層的方式例如包括電鑛或堡合屬層 ^照本發明的較佳實施例 後，更可包括形成-抗氧化芦純一拉〜械#接點之 氧化層亦可在圖案化第一金』層成此= =第=屬，〜形成具二 接”、、占。另外，上述形成第—Ball joint:: </ RTI> </ RTI> </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> </ RTI> <RTIgt; The oxidation-resistant ruthenium pull-to-machine # contact oxide layer can also be formed in the patterned first gold layer ==================================
抗氧化層於第二接點上，：中；包:形成另-二屬層之雨預先形成，再同時圖案化第二金屬層與抗氧 如為-鎳/金層。Λ匕層之弟一接點。上述抗氧化層例 ，本發明的触實施繼述，上述進行第二次電性 切或之後，更可包括以光學檢·二接點，以進行 —斷路檢測。此外’亦可於第二次電性測試之時，對第二 接點進行一斷路電性測試。 μ本發明因採用單邊接觸第一接點的電性測試方法，以 間化習知雙邊測試上、下接點及其線路所產生的諸多問 7 1271528 16093twf.doc/g 題，例如測試機台的共用性太低、測試的成本居高不下等 等。因此’本發明之測試方法可適用於不同第二接點數量、 間距及排列方式的線路基板，以提高測試機台的共用性， 並降低測試的成本。 為讓本發明之上述和其他目的、特徵和優點能更明顯 易懂，下文特舉較佳貫施例，並配合所附圖式，作詳細說 明如下。 【實施方式】 圖2〜圖6分別、％示本發明一較佳實施例之一種線路 電性測試的方法流程圖。請參考圖2，先提供一基材2〇〇， 並於基材200之一第一表面2〇2及一第二表面2〇4上分別 形成一第一金屬層206、一第二金屬層2〇8以及至少一鍍 通孔210，且鍍通孔21〇導通於基材2〇〇之第一與第二表 面2=、204，並電性連接第一與第二金屬層2〇6、2〇8。其 中，第一與第一金屬層206、208例如是以一背膠銅箔壓合 =’丨屯材貝之基材200表面所形成，或是以電解電鍍所沈 積之金屬所形成。此外，鍍通孔21〇例如以機械或雷射鑽 孔所形成之貫孔，加以電鍍金屬所形成。 接著，請參考圖3，製作多數個第一接點220或一圖 木化線路222於基材2⑽的第-表面2G2上。此圖案化線 ^例士以曝光、顯影等微影製程，先形成所要求的線路圖 二或接點圖案於第_金屬層施上，再以濕式侧的方式 — =、、表路/接_案以外的金屬，即可形成單邊圖案化的第 至屬層206於基材200的第一表面202上。其中，圖案 8 1271528 16093twf.doc/g 化弟-金屬層206例如包括多數個第一接點22()及其線路 222 ’以作為電性傳輪之線路層。此外，形成第—接點2別 之後，更可形成-抗氧化層224於第一接點22〇上。當铁， 此抗氧化層224亦可在圖案化第一金屬層施之前預先形 成，再同時圖案化第一金屬層2〇6與抗氧化層⑽，以形 成具有抗氧化層224之第—接點22〇。 接著，請參考圖4，進行第一次電性測試。測試流程 如下i將此完成單邊線路化的基材200放置於一測試機台 (未=不）上，並以多數個探針2〇分別接觸第一表面2⑽ 上的第一接點220，以對第一接點22〇及鍍通孔21〇進行 斷路電性測試。值得注意的是，由於第二金屬層細未細 過上述圖案化的製程，故第二金屬層期與所有鍍通孔^ 之一端相導通，因而通過第一接點22〇及鍍通孔21〇的電 性測試訊號只需經由第一接點220上的探針2〇即可測得， §邛刀第一接點220所測得的訊號不相同時，表示有斷路 或接觸不良的情況發生，即可得知第一接點22〇及其線路 與鍍通孔210的電性是否符合斷路測試之標準。 接著，請參考圖5，製作多數個第二接點230或另— 圖案化線路232於基材200的第二表面2〇4上。有關圖案 化弟一金屬層208的製程請參考上述之說明，同時在形^ 第二接點230之後，更可形成一抗氧化層234於第二接點 230上。當然，此抗氧化層234亦可在圖案化第二金屬層 208之前預先形成，再同時圖案化第二金屬層2〇8與抗氧 化層234’以形成具有抗氧化層234之第二接點230。其中， 9 1271528 16093twf.doc/g 與第二接點23G上之抗氧化層224、234例如 第二完: 路而彼此電性連接σ =目训或其他線 一接點同的探針2〇分別接觸第 針職本斷路檢測， :=:本且線路基板的線路設計也不需則 -接本剌故轉邊瞧化的線路及第 π測試及/或第二=第= 第尸例如是銲球接合面的射 ς二 之，t接適合作為電性試測的接點，反 作為電性賴的接點^Γ,ΐϊ；，r積較大，很適合 的數量、間距以及排列方气不門泉路基板之第一接點， 二接點23。及其線路以=仍可_ 貝施例中除了以探針2Q檢測通過第—接點⑽ 1271528 16093twf.d〇c/s 與^二接點230之訊號外，還可在第二次電性測試之前或 自動光學檢測（Aut〇 0ptical InsPecti〇n，AOI)的 2第二接點23G進行斷路檢測。此外，完成第二次電 =成之後，暴露於基材表面的線路224、234例如以 =:(S〇ldermasklayer)(未繪示）保護或進行另— ='Ϊ路的製程，以形成多層線路結構的基板。因此， 雁用、jr之圖式以二層線路基材綱作為說明，但仍可 f用^數個介電層以及錄個_化線 成的線路基板上。 床且阳 續方、述，本發明因採用單邊接觸第一接點的電性測 口' [ L間化習知雙邊測試上、下接點的 電性測試機台。 疋，錫球接合面的第-接點的面積較大、且間距較寬， α有效減少試測時探針偏移所造成的測試誤判 發明之測試方法及測試機台可適麟不同第二接點^旦本 排财摘鱗基板，轉高測賴纟 並降低測試的成本。 Γ ，然本發明[以触實侧揭露如上， 和範圍内，當可勢者，在不脫離本發明之精神 r p, ^ 二斗之更動與潤飾’因此本發明之伴婼 耗圍當視_之申請專利範圍所衫者為準。 又 【圖式簡單說明】 圖1繪示習知一種線路基板之電性測試的方法示音 圖2圖6分別繪示本發明一較佳實施例之_種線路 圖 1271528 16093twf.doc/g 電性測試的方法流程圖。 【主要元件符號說明】 100 :線路基板 10、12、20 :探針 120 :上接點 130 :下接點 200 :基材 202 :第一表面 • 204 :第二表面 206 :第一金屬層 208 ·•第二金屬層 210 :鍍通孔 220 :第一接點 222 :圖案化線路 224 :抗氧化層 230 :第二接點 • 232 :圖案化線路 234 ··抗氧化層 12The oxidation resistant layer is on the second contact, in the middle; the package: the rain forming the other-two-layer layer is preformed, and the second metal layer is patterned simultaneously with the anti-oxidation such as a nickel/gold layer. The brother of the squat layer is a contact. For the above-mentioned anti-oxidation layer, the touch implementation of the present invention is described above, and after the second electrical cut or the above, the optical contact and the second contact may be further included to perform the open circuit detection. In addition, a second-circuit electrical test can be performed on the second contact at the second electrical test. μ The invention adopts the electrical test method of the first contact of the single-side contact, and the problem of the two-way test of the upper and lower contacts and the lines thereof is known, such as the test machine. The sharing of the station is too low, the cost of testing is high, and so on. Therefore, the test method of the present invention can be applied to circuit substrates of different second contacts in number, pitch and arrangement to improve the commonality of the test machine and reduce the cost of testing. The above and other objects, features and advantages of the present invention will become more <RTIgt; [Embodiment] Figs. 2 to 6 respectively show a flow chart of a method for electrical testing of a line according to a preferred embodiment of the present invention. Referring to FIG. 2, a substrate 2 is first provided, and a first metal layer 206 and a second metal layer are respectively formed on the first surface 2〇2 and the second surface 2〇4 of the substrate 200. 2〇8 and at least one plated through hole 210, and the plated through hole 21〇 is electrically connected to the first and second surfaces 2=, 204 of the substrate 2, and electrically connected to the first and second metal layers 2〇6 2〇8. The first and first metal layers 206, 208 are formed, for example, by a backing of a backing copper foil = 'the surface of the substrate 200 of the coffin, or by a metal deposited by electrolytic plating. Further, the plated through holes 21 are formed by, for example, plating holes formed by mechanical or laser drilling holes. Next, referring to Fig. 3, a plurality of first contacts 220 or a patterned circuit 222 are formed on the first surface 2G2 of the substrate 2 (10). The patterning line is formed by exposure, development and other lithography processes, first forming the required wiring pattern 2 or the contact pattern on the _ metal layer, and then on the wet side - =,, table / A unilaterally patterned first subordinate layer 206 is formed on the first surface 202 of the substrate 200 by a metal other than the case. Among them, the pattern 8 1271528 16093twf.doc / g chemistry-metal layer 206 includes, for example, a plurality of first contacts 22 () and their lines 222 ' as a circuit layer of an electrical transfer wheel. Further, after forming the first contact 2, the anti-oxidation layer 224 is formed on the first contact 22A. When iron, the oxidation resistant layer 224 may also be formed before the patterned first metal layer is applied, and the first metal layer 2〇6 and the oxidation resistant layer (10) are simultaneously patterned to form a first interface having the oxidation resistant layer 224. Point 22〇. Next, please refer to Figure 4 for the first electrical test. The test procedure is as follows: i. The unilaterally patterned substrate 200 is placed on a test machine (not = not), and the plurality of probes 2 〇 are respectively contacted with the first contacts 220 on the first surface 2 (10). The breaking electrical property test was performed on the first contact 22 〇 and the plated through hole 21 。. It should be noted that since the second metal layer is finer than the above-mentioned patterned process, the second metal layer is electrically connected to one end of all the plated through holes, and thus passes through the first contact 22 and the plated through hole 21 The electrical test signal of 〇 can be measured only by the probe 2 第一 on the first contact 220. § When the signals measured by the first contact 220 of the boring tool are different, it indicates that there is an open circuit or poor contact. When it occurs, it can be known whether the electrical properties of the first contact 22 and its line and the plated through hole 210 meet the standards of the open circuit test. Next, referring to FIG. 5, a plurality of second contacts 230 or other patterned lines 232 are formed on the second surface 2〇4 of the substrate 200. For the process of patterning a metal layer 208, please refer to the above description, and after forming the second contact 230, an anti-oxidation layer 234 may be formed on the second contact 230. Of course, the anti-oxidation layer 234 may also be formed before the second metal layer 208 is patterned, and the second metal layer 2 〇 8 and the oxidation resistant layer 234 ′ are simultaneously patterned to form a second contact having the anti-oxidation layer 234 . 230. Wherein, 9 1271528 16093twf.doc / g and the anti-oxidation layer 224, 234 on the second contact 23G, for example, the second end: the road is electrically connected to each other σ = the same probe or other line one contact probe 2〇 Contact the first needle job disconnection test, :=: This is not necessary for the circuit design of the circuit board - the line and the π test and/or the second = the first corpse are The joint of the solder ball joint is two, the t connection is suitable as the contact point for the electrical test, and the reverse is used as the contact point of the electrical circuit. The r product is large, and the suitable number, spacing and arrangement are suitable. The first contact of the substrate of Qiquanquan Road, the second contact 23. And the line can still be _ in the case of the second embodiment, in addition to the probe 2Q detection through the first contact (10) 1271528 16093twf.d 〇 c / s and ^ two contacts 230 signal, but also in the second electrical The second contact 23G before the test or automatic optical detection (AOI) performs the open circuit detection. In addition, after the second electrical=finishing, the lines 224, 234 exposed to the surface of the substrate are protected by, for example, =: (S〇ldermasklayer) (not shown) or a further process of '=' circuit to form a plurality of layers. The substrate of the circuit structure. Therefore, the pattern of geese and jr is described by a two-layer circuit substrate, but it can still be used on a circuit substrate formed by a plurality of dielectric layers and recording lines. The invention is based on the electrical test of the first contact of the first contact.疋, the area of the first joint of the solder ball joint surface is larger and the spacing is wider. α effectively reduces the test error caused by the probe offset during the test. The test method and the test machine can be different. The contact point is used to pick up the scale substrate, turn the high test and reduce the cost of the test. Γ 然 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本The scope of the patent application shall prevail. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram showing a method for electrically testing a circuit substrate. FIG. 6 is a schematic diagram showing a circuit diagram of a preferred embodiment of the present invention. 1271528 16093twf.doc/g Flow chart of the method of sex testing. [Description of main component symbols] 100: circuit substrate 10, 12, 20: probe 120: upper contact 130: lower contact 200: substrate 202: first surface • 204: second surface 206: first metal layer 208 • Second metal layer 210: plated through hole 220: first contact 222: patterned line 224: oxidation resistant layer 230: second contact • 232: patterned line 234 • anti-oxidation layer 12