JP4131137B2 - Interposer substrate continuity inspection method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an interposer substrate continuity inspection method for inspecting a continuity state of a wiring layer of an interposer substrate used as a member of a semiconductor package for mounting a semiconductor element on a printed wiring board.
[0002]
[Prior art]
In electronic devices such as personal computers, OA equipment, home appliances, audio equipment, and game machines, it is difficult to mount semiconductor elements directly on a printed wiring board. In most cases, semiconductor elements are placed on a substrate called an interposer. The semiconductor package is mounted on an electronic device after being in the form of a mounted semiconductor package.
In recent years, these electronic devices have been continuously reduced in size and performance, and the demand for further downsizing of semiconductor packages and higher density of wiring has been increased.
[0003]
In a semiconductor package, an electronic circuit board on which a semiconductor element is mounted is provided with a wiring layer for electrically conducting on the surface of an insulating base. An electronic circuit board starts with a wiring layer formed on one side of an insulating base, and as the wiring layer density increases, double-sided wiring boards, or multilayer wiring boards in which insulating layers and wiring layers are alternately stacked Has been created.
As a typical electronic circuit board, there is a wiring board having an insulating material tape or plate material represented by polyimide as a core material, and in recent years a tape-like double-sided wiring board (interposer board) in which wiring layers exist on both sides, The demand for the so-called 2-metal TAB is increasing.
[0004]
The double-sided wiring board is characterized in that it has a structure for electrically connecting the front and back wiring layers called via holes as well as wiring layers on both sides as compared to the single-sided wiring board.
When forming a wiring layer on a double-sided copper foil laminate with copper foil pasted on both sides of an insulating base material, via holes are first formed in the insulating base material and copper foil by laser processing or the like. The via holes are formed by embedding a conductor layer by electrolytic copper plating or the like, and the copper foils on the front and back of the insulating base material are electrically connected. Thereafter, the copper foils on the front and back sides are patterned to form a wiring layer and electrodes, whereby a two-metal interposer substrate is obtained.
[0005]
The wiring layer of the interposer substrate electrically connects the substrate connection electrode for mounting on the printed wiring substrate and the IC chip connection electrode. Usually, from the mounting form, an IC chip connection electrode and a wiring layer are formed on one surface of the insulating base material, and a substrate connection electrode is formed on the other surface of the insulating base material. The connection electrode is electrically connected via a via hole. If this wiring layer is disconnected in the middle, or if it is short-circuited with an adjacent wiring layer, its value as a product is lost. Therefore, an appearance inspection and an electrical inspection are performed before shipment.
[0006]
[Problems to be solved by the invention]
In a wiring layer continuity inspection method, generally, a needle-like inspection probe is brought into contact with both ends of a wiring layer to measure and determine electric resistance.
In the case of a one-metal BGA substrate with only one side of the wiring layer, the substrate connection electrode and the IC chip connection electrode are on the same surface, so the inspection probe is placed on one surface side and brought into contact with each electrode. In many cases, electrical inspection is performed.
On the other hand, in the case of a 2-metal BGA substrate, in the case of a fan-out type in which an IC chip is mounted at the center of the interposer substrate and the substrate connection electrodes are arranged outside the IC chip, the number of wiring layers is increased as much as possible. In many cases, the substrate connection electrode is arranged on the side opposite to the connection electrode.
[0007]
In the case of such a configuration, it is necessary to place inspection probes on both sides and press them against the respective electrodes. At this time, if the thickness of the interposer substrate is 100 μm or less, it becomes difficult to accurately press the inspection probe to the front and back electrodes due to flexibility. This complicates the device and is very expensive.
[0008]
Further, as a recent trend, the size of the semiconductor package is reduced, while the number of electrodes is increased. For this reason, the IC chip connection electrode has become 30-100 μm square, and there is a problem that it is difficult to contact the inspection probe with high accuracy.
In addition, in order to efficiently and accurately inspect the continuity inspection of interposer substrates that have an increasing number of electrodes and miniaturization, many inspection electrodes are arranged on the insulating base material from the continuity inspection using a conventional inspection probe. A method of conducting a continuity test using an inspection jig has been introduced. Also in this case, there is a problem that it is difficult to accurately align the inspection electrodes with the front and back electrodes.
[0009]
The present invention has been devised in view of the above problems, and an object of the present invention is to provide a continuity inspection method for an interposer substrate that enables a continuity inspection of a wiring layer of an interposer substrate such as a two-metal BGA to be inspected on the same surface. .
[0010]
[Means for Solving the Problems]
In order to achieve the above-mentioned object in the present invention, first, in claim 1, a wiring layer and an IC in which a substrate connection electrode is connected to one surface of an insulating base and the other surface is via-connected to the substrate connection electrode A method for inspecting the continuity of the wiring layer of the interposer substrate in which a chip connection electrode is formed and the substrate connection electrode is disposed outside the IC chip mounting region , wherein the insulating base material is used for the substrate connection A common measurement electrode via-connected to the wiring layer is provided in the IC chip mounting region on the same surface as the electrode, and a measurement inspection probe is pressed against the substrate connection electrode and the common measurement electrode, and the conduction state of the wiring layer is determined. This is a continuity inspection method for an interposer substrate characterized by being inspected.
[0011]
According to claim 2, there is provided the interposer substrate continuity inspection method according to claim 1, wherein at least two or more common measurement electrodes are provided.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
In the interposer substrate continuity inspection method of the present invention, a common measurement electrode is provided on the IC chip mounting portion of the interposer substrate for continuity inspection, which is an intermediate product, and the measurement inspection probe is pressed on the same surface of the interposer substrate for continuity inspection, and wiring It enables to check the conduction state of the layer.
In the continuity test of the interposer substrate for continuity test, the ends of multiple wiring layers are connected to a common measurement electrode to determine the continuity of each wiring layer and the short circuit between the wiring layers. Any number is acceptable, but in order to detect a short circuit between wiring layers efficiently and accurately, it is necessary to determine whether adjacent wiring layers are short-circuited by connecting adjacent wiring layers to different common measurement electrodes. It is preferable to provide two common measuring electrodes that can be used.
When the above-mentioned common measurement electrode is completed, the IC chip mounting area and the common measurement electrode are removed from the die when the continuity test is completed to create a device hole, or the common measurement electrode is removed by etching or the like. An interposer substrate in the product state is obtained.
[0013]
The interposer substrate continuity inspection method will be described below.
First, via holes are formed by laser processing or the like at predetermined positions on a copper foil of a copper-clad laminate in which a copper foil having a thickness of 12 μm is adhered to both surfaces of an insulating base material 11 made of a polyimide substrate having a thickness of 50 μm. Plating is performed to form a conductor layer and filled via 22 having a predetermined thickness, and a photoresist is applied on the conductor layer to form a photosensitive layer, and a series of patterning processes such as pattern exposure and development are performed to connect the substrate. The electrode 23, the common measurement electrodes 51 and 52, the wiring layer 21, the IC chip connection electrode 24, and the measurement wiring lead 25 are respectively formed, and after forming the solder resist pattern, nickel and gold plating are performed, and the insulating substrate 11 is formed. A two-metal BGA continuity test interposer substrate 50 having a substrate connection electrode 23 and common measurement electrodes 51 and 52 provided on the same surface is prepared (FIGS. 1A and 1B). And (c)).
Here, the common measurement electrodes 51 and 52 are formed in the IC chip mounting region, and the common measurement electrodes 51 and 52 are electrically connected to the IC chip connection electrode 24 via the measurement wiring lead 25 and the filled via 22. ing.
[0014]
Next, the measurement test probe 101 a substrate connection electrode 23 of the conductivity test for the interposer substrate 50 is pressed against the measurement test probe 102a and 102b to a common measuring electrode 51 and 52, the conduction of the wiring layer 21, the wiring layer 21 A short circuit is determined by the inspection apparatus 100 (see FIG. 2). Here, the measurement test probe 102a and 102b as it is, by sequentially moving the measurement test probe 101 a inspecting the continuity of all wiring layers.
[0015]
Hereinafter, a continuity inspection method for determining normality / abnormality of the continuity of the wiring layer and the short circuit between the wiring layers using two common measurement electrodes of the interposer substrate 50 for continuity inspection will be described.
Figure 3 is a disconnection in the wiring layers 21a and 21b, illustrates a case of the absence of a short circuit, the measurement test probe 101 a connected to the substrate connection electrode 23a, the measurement test probe 102a to a common measuring electrode 51, measured When the inspection probe 102b is connected to the common measurement electrode 52 and the continuity test is performed, the wiring layers 21a and 21b are not disconnected or short-circuited. Therefore, the short-circuit indicator lamp is turned off and the continuity indicator lamp is turned on, and the wiring layer 21a is displayed. The inspection device 100 determines that the continuity state is normal and the short circuit between the wiring layer 21a and the wiring layer 21b is normal (see FIG. 3). Furthermore, by sequentially moving the measurement test probe 101 a, performs a continuity test of the entire wiring layer.
[0016]
4, there is disconnection in the wiring layer 21a, shows the case of the absence of short circuit between the wiring layers 21a and and the wiring layer 21b, and connect the measurement test probe 101 a substrate connection electrode 23a, the measurement When the inspection probe 102a is connected to the common measurement electrode 51 and the measurement inspection probe 102b is connected to the common measurement electrode 52 to conduct the continuity test, the continuity indicator lamp is turned OFF, the short-circuit indicator lamp is turned OFF, and the wiring layer 21a is conductive. The inspection apparatus 100 determines that the state is abnormal and the short circuit between the wiring layer 21a and the wiring layer 21b is normal (see FIG. 4).
[0017]
Figure 5 is a short circuit between the wiring layers 21a and the wiring layer 21b, shows the wiring layers 21a and and examples of the absence of disconnection in the wiring layer 21b, the measurement test probe 101 a connected to the substrate connection electrode 23a When the measurement / inspection probe 102a is connected to the common measurement electrode 51 and the measurement / inspection probe 102b is connected to the common measurement electrode 52 to conduct the continuity test, the continuity indicator lamp is turned on and the short-circuit indicator lamp is turned on, and the wiring layer 21a is displayed. However, the inspection apparatus 100 determines that the conduction state is normal and the short circuit between the wiring layer 21a and the wiring layer 21b is abnormal (see FIG. 5).
[0018]
In this way, with respect to the continuity test interposer substrate 50 that has been determined to be non-defective after conducting the continuity test on all the wiring layers of the continuity test interposer substrate 50, the common measurement electrodes 51 and 52 in the IC chip mounting area, and the measurement wiring lead 25 The insulating base material formed with is punched with a mold to produce an interposer substrate 60 having a device hole 41 at the center as shown in FIGS. 6 (a), 6 (b) and 6 (c).
[0019]
【The invention's effect】
By applying the interposer substrate continuity inspection method of the present invention, it becomes possible to perform continuity inspection using a measurement probe on the same surface, and by providing a plurality of common measurement electrodes, the wiring layer of the interposer substrate It is possible to efficiently and accurately inspect the continuity and the short-circuit state between the wiring layers, and exhibit an excellent practical effect in the continuity inspection field.
[Brief description of the drawings]
FIG. 1A is a schematic plan view showing the surface of an example of an interposer substrate for continuity testing used in the interposer substrate continuity testing method of the present invention.
(B) is a schematic cross-sectional view of (a) cut along line AA ′.
(C) is a schematic top view which shows the back surface of an example of the interposer board | substrate for continuity inspection used for the continuity inspection method of the interposer board | substrate of this invention.
FIG. 2 is an explanatory diagram showing a state in which a continuity test is performed using a continuity test interposer substrate.
FIG. 3 is an explanatory diagram showing a state in which a continuity test is performed using a common measurement electrode and a substrate connection electrode.
FIG. 4 is an explanatory diagram showing a state in which a continuity test is performed using a common measurement electrode and a substrate connection electrode.
FIG. 5 is an explanatory diagram showing a state in which a continuity test is performed using a common measurement electrode and a substrate connection electrode.
FIG. 6A is a schematic plan view showing the surface of the interposer substrate in a state where the continuity test is completed and the common measurement electrode and the measurement wiring lead are removed.
(B) is a schematic cross-sectional view of (a) cut along line AA ′.
(C) is a schematic top view which shows the back surface of the interposer board | substrate which shows the state which complete | finished the conduction | electrical_connection test and removed the common measurement electrode and the measurement wiring lead.
[Explanation of symbols]
11 ... Insulating base material 21, 21a, 21b ... Wiring layer 22 ... Filled via 23, 23a, 23b ... Substrate connection electrode 24 ... IC chip connection electrode 25 ... Measurement wiring lead 41 ... Device hole 50 .. Interposer substrates 51 and 52 for continuity inspection... Common measurement electrode 60... Interposer substrate 100... Inspection devices 101 a , 102 a and 102 b.

Claims (2)

A substrate connection electrode is formed on one surface of the insulating base, a wiring layer and an IC chip connection electrode connected to the substrate connection electrode and vias are formed on the other surface , and the substrate connection electrode is an IC chip A method for inspecting the continuity of the wiring layer of the interposer substrate disposed outside the mounting region, wherein the wiring layer and the via are connected to the IC chip mounting region on the same surface as the substrate connecting electrode of the insulating base. A method for inspecting the continuity of an interposer substrate, characterized in that a common measurement electrode is provided, a measurement inspection probe is pressed against the substrate connection electrode and the common measurement electrode, and the continuity state of the wiring layer is inspected.   The interposer substrate continuity inspection method according to claim 1, wherein at least two of the common measurement electrodes are provided.

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