CN101305356A - 用于使内核之间的通信同步的具有标志寄存器的控制装置 - Google Patents
用于使内核之间的通信同步的具有标志寄存器的控制装置 Download PDFInfo
- Publication number
- CN101305356A CN101305356A CNA2006800415183A CN200680041518A CN101305356A CN 101305356 A CN101305356 A CN 101305356A CN A2006800415183 A CNA2006800415183 A CN A2006800415183A CN 200680041518 A CN200680041518 A CN 200680041518A CN 101305356 A CN101305356 A CN 101305356A
- Authority
- CN
- China
- Prior art keywords
- kernel
- value
- address
- statistical indicant
- control device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004891 communication Methods 0.000 title description 8
- 238000003860 storage Methods 0.000 claims description 39
- 230000005540 biological transmission Effects 0.000 claims description 6
- 230000005055 memory storage Effects 0.000 claims description 6
- 230000008859 change Effects 0.000 description 4
- 230000006870 function Effects 0.000 description 3
- 230000005039 memory span Effects 0.000 description 3
- 230000001360 synchronised effect Effects 0.000 description 3
- 102100033922 Synapse differentiation-inducing gene protein 1 Human genes 0.000 description 1
- 101710106386 Synapse differentiation-inducing gene protein 1 Proteins 0.000 description 1
- 239000008186 active pharmaceutical agent Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000000644 propagated effect Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000011664 signaling Effects 0.000 description 1
- 230000005236 sound signal Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Microcomputers (AREA)
- Information Transfer Systems (AREA)
- Static Random-Access Memory (AREA)
- Storage Device Security (AREA)
- Communication Control (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
Description
Claims (9)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP05300900 | 2005-11-08 | ||
EP05300900.7 | 2005-11-08 | ||
PCT/IB2006/054104 WO2007054871A2 (en) | 2005-11-08 | 2006-11-03 | Control device with flag registers for synchronization of communications between cores |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101305356A true CN101305356A (zh) | 2008-11-12 |
CN101305356B CN101305356B (zh) | 2010-09-01 |
Family
ID=37938484
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2006800415183A Active CN101305356B (zh) | 2005-11-08 | 2006-11-03 | 用于使内核之间的通信同步的具有标志寄存器的控制装置 |
Country Status (7)
Country | Link |
---|---|
US (1) | US7890736B2 (zh) |
EP (1) | EP1949249A2 (zh) |
JP (1) | JP4940436B2 (zh) |
KR (1) | KR101029392B1 (zh) |
CN (1) | CN101305356B (zh) |
TW (1) | TWI416340B (zh) |
WO (1) | WO2007054871A2 (zh) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9760526B1 (en) | 2011-09-30 | 2017-09-12 | EMC IP Holdings Company LLC | Multiprocessor messaging system |
US9037838B1 (en) | 2011-09-30 | 2015-05-19 | Emc Corporation | Multiprocessor messaging system |
WO2013188565A1 (en) | 2012-06-15 | 2013-12-19 | Soft Machines, Inc. | A semaphore method and system with out of order loads in a memory consistency model that constitutes loads reading from memory in order |
KR101660022B1 (ko) * | 2015-09-10 | 2016-09-27 | 아둘람테크 주식회사 | 버스 인터페이스 효율을 향상시키기 위한 장치 및 방법 |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US690750A (en) * | 1901-02-09 | 1902-01-07 | Nat Carbon Co | Sparking-coil. |
US4594657A (en) * | 1983-04-22 | 1986-06-10 | Motorola, Inc. | Semaphore for memory shared by two asynchronous microcomputers |
JPH0656603B2 (ja) * | 1986-02-10 | 1994-07-27 | 株式会社日立マイコンシステム | デ−タ処理システム |
JPS63654A (ja) * | 1986-06-19 | 1988-01-05 | Fujitsu Ltd | プロセッサ間の通信制御方法 |
US5611053A (en) * | 1994-01-21 | 1997-03-11 | Advanced Micro Devices, Inc. | Apparatus and method for integrating bus master ownership of local bus load by plural data transceivers |
JP2859178B2 (ja) * | 1995-09-12 | 1999-02-17 | 日本電気通信システム株式会社 | プロセッサ間データ転送方式及びプロセッサ間データ転送用リングバッファメモリ |
US5649125A (en) * | 1995-10-30 | 1997-07-15 | Motorola, Inc. | Method and apparatus for address extension across a multiplexed communication bus |
US6711667B1 (en) * | 1996-06-28 | 2004-03-23 | Legerity, Inc. | Microprocessor configured to translate instructions from one instruction set to another, and to store the translated instructions |
US5951659A (en) * | 1997-04-07 | 1999-09-14 | Ncr Corporation | Communications-oriented computer system backplane including a PCI input/output bus for transmission of address, data, and control information, and a time-domain multiplexed signal bus (TDMSB) for transmission of high-speed digitized signal information |
EP0960372A2 (en) * | 1997-10-29 | 1999-12-01 | Koninklijke Philips Electronics N.V. | Method and system for synchronizing block-organized data transfer |
JP4123315B2 (ja) * | 1999-02-19 | 2008-07-23 | 株式会社安川電機 | デュアルポートramのデータ受け渡し装置および方法 |
EP1069512A3 (en) * | 1999-07-12 | 2004-12-15 | Matsushita Electric Industrial Co., Ltd. | Data processing apparatus with buffering between buses |
DE19951541C1 (de) * | 1999-10-26 | 2000-10-26 | Siemens Ag | Integrierter elektronischer Baustein mit duplizierter Kernlogik und Hardware-Fehlereinspeisung für Prüfzwecke |
KR100994003B1 (ko) * | 2001-01-31 | 2010-11-11 | 가부시키가이샤 히타치세이사쿠쇼 | 데이터 처리 시스템 및 데이터 프로세서 |
US6823441B1 (en) * | 2001-04-20 | 2004-11-23 | Daimlerchrysler Corporation | Method of multiplexed address and data bus |
US6907503B2 (en) * | 2001-09-27 | 2005-06-14 | Daimlerchrysler Corporation | Dual port RAM communication protocol |
-
2006
- 2006-11-03 KR KR1020087013591A patent/KR101029392B1/ko active IP Right Grant
- 2006-11-03 EP EP06821324A patent/EP1949249A2/en not_active Withdrawn
- 2006-11-03 CN CN2006800415183A patent/CN101305356B/zh active Active
- 2006-11-03 JP JP2008538485A patent/JP4940436B2/ja active Active
- 2006-11-03 WO PCT/IB2006/054104 patent/WO2007054871A2/en active Application Filing
- 2006-11-03 US US12/092,615 patent/US7890736B2/en active Active
- 2006-11-06 TW TW095141067A patent/TWI416340B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
TWI416340B (zh) | 2013-11-21 |
KR20080077150A (ko) | 2008-08-21 |
TW200811666A (en) | 2008-03-01 |
KR101029392B1 (ko) | 2011-04-14 |
US20080294876A1 (en) | 2008-11-27 |
CN101305356B (zh) | 2010-09-01 |
US7890736B2 (en) | 2011-02-15 |
WO2007054871A2 (en) | 2007-05-18 |
JP2009514118A (ja) | 2009-04-02 |
JP4940436B2 (ja) | 2012-05-30 |
WO2007054871A3 (en) | 2008-04-17 |
EP1949249A2 (en) | 2008-07-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7127563B2 (en) | Shared memory architecture | |
US4443846A (en) | Dual port exchange memory between multiple microprocessors | |
US8364873B2 (en) | Data transmission system and a programmable SPI controller | |
CN101305356B (zh) | 用于使内核之间的通信同步的具有标志寄存器的控制装置 | |
CN110720126B (zh) | 传输数据掩码的方法、内存控制器、内存芯片和计算机系统 | |
US8145852B2 (en) | Device having shared memory and method for providing access status information by shared memory | |
JPS602709B2 (ja) | ビルデイング・ブロツク構造をもつデータ処理システム | |
US20230409332A1 (en) | Devices transferring cache lines, including metadata on external links | |
JPS6312303B2 (zh) | ||
SU693364A1 (ru) | Устройство сопр жени с магистралью | |
JPS6235950A (ja) | メモリ間のデ−タ転送方式 | |
JPS608970A (ja) | マルチコントロ−ラシステム | |
KR20080010022A (ko) | n 비트의 CPU 및 이를 이용한 n 비트보다 큰 대역폭을갖는 주변장치와의 연결 방법 | |
JPS63234749A (ja) | メツセ−ジ伝送装置 | |
JP2008134892A (ja) | 集積回路装置 | |
JPS60100242A (ja) | メモリ制御装置 | |
US20040210730A1 (en) | Dram control circuit | |
JPS62187956A (ja) | Dma制御方式 | |
JPH08202615A (ja) | 記憶装置 | |
JPH02254557A (ja) | 通信制御処理装置 | |
JPH01229353A (ja) | Dmaコントローラ | |
JPH10173618A (ja) | バススイッチ装置およびその転送順序変換方法 | |
JPS6180436A (ja) | デ−タ処理装置 | |
JPS5916064A (ja) | 共有メモリ装置 | |
JPH03211652A (ja) | ダイレクトメモリアクセス回路 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
TR01 | Transfer of patent right |
Effective date of registration: 20170426 Address after: Stockholm Patentee after: Telefonaktiebolaget LM Ericsson (publ) Address before: Stockholm Patentee before: Ericsson, Inc. Effective date of registration: 20170426 Address after: Stockholm Patentee after: Ericsson, Inc. Address before: Swiss Grand saconnex Patentee before: ST-ERICSSON S.A. Effective date of registration: 20170426 Address after: Swiss Grand saconnex Patentee after: ST-ERICSSON S.A. Address before: Swiss Prang Eli Ute Jean Deferre at No. 39 Patentee before: Italian-French Ericsson Limited (in liquidation) Effective date of registration: 20170426 Address after: Swiss Prang Eli Ute Jean Deferre at No. 39 Patentee after: Italian-French Ericsson Limited (in liquidation) Address before: Holland Ian Deho Finn Patentee before: NXP B.V. |
|
TR01 | Transfer of patent right |