CN101266982B - 半导体器件、半导体显示器件 - Google Patents

半导体器件、半导体显示器件 Download PDF

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Publication number
CN101266982B
CN101266982B CN200810085387XA CN200810085387A CN101266982B CN 101266982 B CN101266982 B CN 101266982B CN 200810085387X A CN200810085387X A CN 200810085387XA CN 200810085387 A CN200810085387 A CN 200810085387A CN 101266982 B CN101266982 B CN 101266982B
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CN
China
Prior art keywords
layer
single crystal
soi layer
semiconductor
soi
Prior art date
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Expired - Fee Related
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CN200810085387XA
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English (en)
Chinese (zh)
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CN101266982A (zh
Inventor
山崎舜平
宫入秀和
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Publication of CN101266982A publication Critical patent/CN101266982A/zh
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/40—Crystalline structures
    • H10D62/405—Orientations of crystalline planes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/62—Fin field-effect transistors [FinFET]

Landscapes

  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)
CN200810085387XA 2007-03-16 2008-03-14 半导体器件、半导体显示器件 Expired - Fee Related CN101266982B (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2007068086 2007-03-16
JP2007-068086 2007-03-16
JP2007-133138 2007-05-18
JP2007133138 2007-05-18

Publications (2)

Publication Number Publication Date
CN101266982A CN101266982A (zh) 2008-09-17
CN101266982B true CN101266982B (zh) 2012-01-11

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Country Status (4)

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US (1) US7755113B2 (https=)
JP (1) JP5364281B2 (https=)
KR (1) KR101441941B1 (https=)
CN (1) CN101266982B (https=)

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US7816232B2 (en) * 2007-11-27 2010-10-19 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor substrate and semiconductor substrate manufacturing apparatus
US8093136B2 (en) * 2007-12-28 2012-01-10 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
JP2009231376A (ja) * 2008-03-19 2009-10-08 Shin Etsu Handotai Co Ltd Ｓｏｉウェーハ及び半導体デバイスならびにｓｏｉウェーハの製造方法
JP5654206B2 (ja) * 2008-03-26 2015-01-14 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法及び該ｓｏｉ基板を用いた半導体装置
EP2105957A3 (en) * 2008-03-26 2011-01-19 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing soi substrate and method for manufacturing semiconductor device
JP5478166B2 (ja) * 2008-09-11 2014-04-23 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP5478199B2 (ja) * 2008-11-13 2014-04-23 株式会社半導体エネルギー研究所 半導体装置の作製方法
SG178179A1 (en) * 2009-10-09 2012-03-29 Semiconductor Energy Lab Reprocessing method of semiconductor substrate, manufacturing method of reprocessed semiconductor substrate, and manufacturing method of soi substrate
US8630326B2 (en) 2009-10-13 2014-01-14 Skorpios Technologies, Inc. Method and system of heterogeneous substrate bonding for photonic integration
US9922967B2 (en) 2010-12-08 2018-03-20 Skorpios Technologies, Inc. Multilevel template assisted wafer bonding
US8735191B2 (en) 2012-01-04 2014-05-27 Skorpios Technologies, Inc. Method and system for template assisted wafer bonding using pedestals
JP2012156495A (ja) 2011-01-07 2012-08-16 Semiconductor Energy Lab Co Ltd Ｓｏｉ基板の作製方法
US9123529B2 (en) 2011-06-21 2015-09-01 Semiconductor Energy Laboratory Co., Ltd. Method for reprocessing semiconductor substrate, method for manufacturing reprocessed semiconductor substrate, and method for manufacturing SOI substrate
CN102270576A (zh) * 2011-09-01 2011-12-07 上海宏力半导体制造有限公司 Mos晶体管制造方法
CN102437051A (zh) * 2011-11-24 2012-05-02 上海华力微电子有限公司 硅化物阻止层刻蚀方法、通孔刻蚀停止层形成方法
US8685840B2 (en) * 2011-12-07 2014-04-01 Institute Of Nuclear Energy Research, Atomic Energy Council In-situ gettering method for removing metal impurities from the surface and interior of a upgraded metallurgical grade silicon wafer
US9324449B2 (en) 2012-03-28 2016-04-26 Semiconductor Energy Laboratory Co., Ltd. Driver circuit, signal processing unit having the driver circuit, method for manufacturing the signal processing unit, and display device
JP6178118B2 (ja) * 2013-05-31 2017-08-09 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US9196728B2 (en) * 2013-12-31 2015-11-24 Texas Instruments Incorporated LDMOS CHC reliability
US9209142B1 (en) * 2014-09-05 2015-12-08 Skorpios Technologies, Inc. Semiconductor bonding with compliant resin and utilizing hydrogen implantation for transfer-wafer removal
JP6449798B2 (ja) * 2016-01-26 2019-01-09 太陽誘電株式会社 積層セラミック電子部品及びその製造方法、並びにセラミック素体
US9716088B1 (en) 2016-06-30 2017-07-25 International Business Machines Corporation 3D bonded semiconductor structure with an embedded capacitor
US9941241B2 (en) 2016-06-30 2018-04-10 International Business Machines Corporation Method for wafer-wafer bonding
US9620479B1 (en) * 2016-06-30 2017-04-11 International Business Machines Corporation 3D bonded semiconductor structure with an embedded resistor
US10950703B2 (en) 2017-11-07 2021-03-16 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure for memory device and method for forming the same
CN109637923B (zh) * 2018-11-14 2021-06-11 惠科股份有限公司 一种显示基板及其制作方法和显示装置
CN109659235B (zh) * 2018-12-14 2021-12-03 武汉华星光电半导体显示技术有限公司 Tft的制备方法、tft、阵列基板及显示装置
JP6953480B2 (ja) * 2019-07-31 2021-10-27 株式会社Ｋｏｋｕｓａｉ Ｅｌｅｃｔｒｉｃ 半導体装置の製造方法、基板処理装置、およびプログラム

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Also Published As

Publication number Publication date
US20080224274A1 (en) 2008-09-18
US7755113B2 (en) 2010-07-13
KR20080084699A (ko) 2008-09-19
CN101266982A (zh) 2008-09-17
KR101441941B1 (ko) 2014-09-18
JP5364281B2 (ja) 2013-12-11
JP2009004736A (ja) 2009-01-08

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