CN101246826B - 安装电子部件的方法 - Google Patents

安装电子部件的方法 Download PDF

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Publication number
CN101246826B
CN101246826B CN2008100032543A CN200810003254A CN101246826B CN 101246826 B CN101246826 B CN 101246826B CN 2008100032543 A CN2008100032543 A CN 2008100032543A CN 200810003254 A CN200810003254 A CN 200810003254A CN 101246826 B CN101246826 B CN 101246826B
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adhesive
installation portion
electronic unit
installation
semiconductor element
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CN2008100032543A
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CN101246826A (zh
Inventor
西村隆雄
成泽良明
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Socionext Inc
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Fujitsu Semiconductor Ltd
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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • H05K3/305—Affixing by adhesive
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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    • H05K13/04—Mounting of components, e.g. of leadless components
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Abstract

一种安装电子部件的方法，包括：在布线板上的多个电子部件安装部中的每一个上设置粘合剂的步骤；在所述多个电子部件安装部中的每一个上通过所述粘合剂固定一个所述电子部件的步骤。当在所述多个电子部件安装部中的每一个上设置所述粘合剂时，设置在待安装第N个电子部件的安装部上的粘合剂的体积重心向一方向偏移，该方向为靠近设置有第N-1个或之前的电子部件的安装部的方向，所述设置有第N-1个或之前的电子部件的安装部邻近并毗邻所述待安装第N个电子部件的安装部。

Description

安装电子部件的方法
技术领域
本发明主要涉及安装电子部件的方法。更具体地，本发明涉及通过粘合剂在支撑板上安装多个电子元件的方法。 
背景技术
作为一种在例如布线板的支撑板上安装例如半导体元件的电子元件的方法，其预先向支撑板上电子元件的安装部提供膏状粘合剂，然后在备有粘合剂的安装部按压由吸力工具(suction tool)吸取并保持的电子元件，从而使得电子元件固定在支撑板上。 
这个方法应用在使用所谓倒装芯片接合(倒装焊)方法或所谓芯片接合方法将多个半导体元件安装在大型支撑板上的情况中。 
在这个方法中，具有：设置步骤，在布线板的电子部件预期安装部上设置粘合剂；以及安装步骤，在相互分隔开的电子部件预期安装部上安装电子部件。此外，由于在设置步骤中持续实施设置粘合剂的过程，以及在安装步骤中持续实施安装电子部件的过程，因此存在提高产量的可能。 
在这个方法中，利用分配(dispensing)方法、印刷(printing)方法、或转移(transferring)方法来实现在布线板的电子部件预期安装部上设置 并形成粘合剂。 
在分配方法中，可容易形成微小粘合剂图案。可利用自动机械分配器(dispenser)来设置并形成具有高精密的各种图案的粘合剂。 
此外，位于电子部件预期安装部的中心部分的圆形图案、具有与电子部件的固定区域相似结构的大体为矩形的图案、多点图案、多条线在中心部分相互交叉的放射状图案、或类似图案可用作形成在支撑板上的粘合剂的图案结构。例如，可参见公布号为No.11-176849的日本特开专利申请。 
基于待安装在支撑板上的电子部件的尺寸、粘合剂的材料物理属性、支撑板表面的材料、安装时的操作条件(例如负荷、温度)等，适当地选择设置和形成粘合剂的图案。 
诸如半导体元件之类的电子部件的固定表面通常具有大体为矩形的结构。相应地，通过在点对称形状的支撑板的电子部件预期安装部上形成规定的或成型的粘合剂图案的结构，可使粘合剂的体积分布(volumndistribution)均匀。结果，当利用抽吸工具将电子部件按压在粘合剂上并由此固定在支撑板上时，粘合剂可以以大体为点对称的形状从支撑板的电子部件预期安装部的中心部分均匀展开。结果，电子部件的固定表面达到与粘合剂均匀接触，从而固定在支撑板上。 
图1为说明现有技术中在布线板上安装半导体元件的方法的第一剖面图。在图1所示的实例中，通过利用所谓的倒装芯片接合(倒装焊)方法在支撑板上安装半导体器件。 
在位于支撑板1上表面的多个半导体元件预期安装部S上设置膏状粘合剂2。各半导体元件预期安装部S均设有电极端子3。电极端子3对应于待安装的半导体元件的外部连接端子。 
另一方面，使半导体元件4的主表面(其中配备有外部连接端子5)对着支撑板1，且由抽吸工具6吸取并保持半导体元件4。此外，使半导体元件4的外部连接端子5与支撑板1的电极端子3相互面对，从而完成定位。参见图1中(a)。 
这时，抽吸工具6的抽吸部7的内部为负压。维持这个负压，直至停止由抽吸工具6对半导体元件4的吸取。 
接下来，降低抽吸工具6以使得半导体元件4经由粘合剂2固定在支撑板1上，且半导体元件4的外部连接端子5与支撑板1的电极端子3相互连接。参见图1中(b)。 
此后，停止由抽吸工具6对半导体元件4的吸取，并提高抽吸工具6。参见图1中(c)。 
这时，为了安全停止由抽吸工具6对半导体元件4的吸取，将具有负压的抽吸工具6的抽吸部7内部转换为正压，从而使得压缩气体W从抽吸部7喷射到周围。参见图1中(c)中的箭头。 
这样，根据图1所示现有技术的方法，当在支撑板1的多个半导体元件预期安装部S上持续安装并固定多个半导体元件4时，在半导体元件预期安装部S上固定由抽吸工具6吸取并保持的半导体元件4之后，停止由抽吸工具6执行的吸取并提高抽吸工具6，同时压缩气体从抽吸工具6中喷射到周围。 
图2为说明现有技术中在布线板上安装半导体元件的方法的第二剖面图。在图2中，与图1中所示部件相同的部件用相同的附图标记表示，并略去其介绍。 
在位于支撑板1上表面的多个半导体元件预期安装部S上设置膏状粘合剂2。各半导体元件预期安装部S均配备有电极端子3。电极端子3对应于待安装的半导体元件的外部连接端子。 
另一方面，使半导体元件4的主表面(其具有外部连接端子5)对着支撑板1，且由抽吸工具7吸取并保持半导体元件4。在设置为对半导体元件4进行抽吸的抽吸工具7的抽吸部8的周围配备有孔形成部9。参见图2中(a)。 
当压缩气体W从抽吸工具7的孔形成部9喷射出来时，抽吸工具7降低，从而使得半导体元件4经由粘合剂2固定在支撑板1上，且半导体元件4的外部连接端子5与支撑板1的电极端子3相互连接。参见图2中(b)。 
这时，由于压缩气体W从抽吸工具7的孔形成部9喷射到周围，使得粘合剂2展开并流动到半导体元件4的周围。结果，可防止粘合剂2沿着半导体元件4的侧表面蔓延，从而防止粘合剂2对抽吸工具7的粘附。 
此后，停止由抽吸工具7对半导体元件4的吸取，并提高抽吸工具7。参见图2中(c)。这时，停止压缩气体W从抽吸工具7的孔形成部9的喷射。 
在图1所示的现有技术中，在停止由抽吸工具6对半导体元件4的吸取时，压缩气体W从抽吸工具6的抽吸部7喷射到周围。另一方面，在图2所示的现有技术中，在压缩气体W从抽吸工具7的孔形成部9喷射到周围时，降低抽吸工具7。 
由于这个原因，如图1中(c)和图2中(c)中由虚线圈出的部分所示，由于喷射出的压缩气体W，粘合剂的图案结构可能发生变形，其中该粘合剂被设置在邻近或毗邻未安装半导体元件的半导体元件预期安装部S的表面上。换句话说，在半导体元件预期安装部S处的粘合剂2的体积分布中，可能形成偏移。 
结果，当在半导体元件预期安装部S上安装半导体元件4时，半导体元件预期安装部S上的粘合剂2可能分布不均匀。 
由于这个原因，在粘合剂2的体积分布较小的部分处，产生空白(void)或未填充部分。这使得，在安装半导体元件4后，当粘合剂2 
固化时，半导体元件4将倾斜固定。 
另一方面，在粘合剂2的体积分布较大的部分处，当固定半导体元件4时，粘合剂2展开并流动到半导体元件4的周围。结果，流出的粘合剂2沿着半导体元件4的侧表面蔓延，从而粘附到抽吸工具。 
发明内容
根据本发明实施例的一个方案，提供一种安装电子部件的方法。该方法包括：在布线板上的多个电子部件安装部中的每一个上设置粘合剂的步骤；以及在所述多个电子部件安装部中的每一个上通过所述粘合剂固定一个所述电子部件的步骤；其中，当在所述多个电子部件安装部中的每一个上设置所述粘合剂时，在N是等于或者大于2的整数的情况下，在待安装第N个电子部件的安装部上设置的粘合剂的体积重心向一方向偏移，该方向为靠近待安装第N-1个或之前的电子部件的安装部的方向，且所述待安装第N-1个或之前的电子部件的安装部邻近并毗邻所述待安装第N个电子部件的安装部。 
根据本发明实施例的另一方案，提供一种安装电子部件的方法。该方法包括：在布线板上的多个电子部件安装部中的每一个上设置粘合剂的步骤；以及在所述多个电子部件安装部中的每一个上通过所述粘合剂固定一个所述电子部件的步骤；其中，当在所述多个电子部件安装部中的每一个上设置所述粘合剂后，在利用喷射压缩气体的抽吸工具安装第N-1个或第N-1个之前的电子部件时，设置于待安装第N个电子部件的安装部上的粘合剂的体积重心以远离所述第N-1个或第N-1个之前的电 子部件的安装部的方向移动至待安装第N个电子部件的安装部的中心部，其中，N是等于或者大于2的整数。 
根据本发明实施例的又一方案，提供一种安装电子部件的方法。该方法包括：在布线板上的多个电子部件安装部中的每一个上设置粘合剂；以及在所述多个电子部件安装部中的每一个上通过所述粘合剂固定一个所述电子部件的步骤；其中，当在所述多个电子部件安装部中的每一个上设置所述粘合剂时，在待安装第N个电子元件的所述安装部上设置的所述粘合剂的体积重心以一方向偏移，该方向为指向待安装第N-1个或之前的电子部件的多个安装部的区域中心的矢量的和方向，所述待安装第N-1个或之前的电子部件的多个安装部毗邻所述待安装第N个电子部件的安装部，其中，N是等于或者大于2的整数。 
根据本发明实施例的又一方案，提供一种安装电子部件的方法。该方法包括：在布线板上的多个电子部件安装部中的每一个上设置粘合剂的步骤；以及在所述多个电子部件安装部中的每一个上通过所述粘合剂固定一个所述电子部件的步骤；其中，对应于在安装一个所述电子部件之前安装其它电子部件时从抽吸工具喷射出的压缩气体，定位在待安装该一个所述电子部件的安装部上设置的粘合剂的体积重心。 
附图说明
图1为示出在布线板上安装半导体元件的现有技术方法的第一剖面图； 
图2为示出在布线板上安装半导体元件的现有技术方法的第二剖面图； 
图3为示出本发明第一实施例的在布线板上安装半导体元件的方法的第一平面图； 
图4为示出本发明第一实施例的在布线板上安装半导体元件的方法的第二平面图； 
图5为示出将粘合剂提供至安装部S的方法的示意图； 
图6为示出通过安装部S1上的粘合剂12-1安装半导体元件20-1的方法的第一剖面图； 
图7为示出通过安装部S1上的粘合剂12-1安装半导体元件20-1的方法的第二剖面图； 
图8为利用本发明第一实施例的方法制造的半导体器件的剖面图； 
图9为示出在安装部S1至S5上形成粘合剂图案的第一改进实例的平面图； 
图10为示出在安装部S1至S5上形成粘合剂图案的第二改进实例的平面图； 
图11为示出在安装部S1至S5上形成粘合剂图案的第三改进实例的平面图； 
图12为示出设置图11中所示的粘合剂50-1和50-2的步骤的平面图； 
图13为示出在安装部S1至S5上形成粘合剂图案的第四改进实例的平面图； 
图14为示出在安装部S1至S5上粘合剂的成形图案的第五改进实例的平面图； 
图15为示出本发明第二实施例的在布线板上安装电子部件的方法的平面图； 
图16为示出图15中所示布线板中设有安装部S1至S4的区域的平面图； 
图17为示出在本发明第二实施例的改进实例的在布线板上安装电子部件的方法的平面图； 
图18为示出本发明第三实施例的在布线板上安装电子部件的方法的平面图； 
图19为示出在图18中由虚线包围的封装区的平面图；以及 
图20为沿图19中线X-X′的布线板的剖面图。 
具体实施方式
以下参照图3至图20描述本发明的实施例。 
在下面的介绍中，通过将半导体元件用作电子部件以及将布线板用作支撑板来讨论本发明的实施例。 
[本发明第一实施例] 
参照图3讨论本发明第一实施例的用于在布线板上安装电子部件的方法。 
在本发明第一实施例中，在单个布线板上沿布线板的纵向方向安装多个半导体元件。 
换句话说，沿布线板10的纵向方向以单行方式，在布线板10的主表面上设有五个待安装半导体元件的矩形安装部S1至S5。参见图3中(a)。 
布线板10由下列材料制成，例如，诸如聚酰亚胺、玻璃BT(双马来酰亚胺三嗪，bismaleimide-triazine)、或玻璃钢的有机绝缘材料，诸如陶瓷的无机材料，或者诸如硅(Si)的半导体材料。此外，在布线板10的表面上或布线板10内形成电极(外部连接端子)和布线层。 
如图3中(a)的虚线所示，安装部S1至S5具有大体相同的结构和面积。 
在安装部S1至S5，以线形设有多个相互分开的由铜(Cu)制成的外部连接端子11-1至11-5。在外部连接端子11-1至11-5的表面上形成有镀金(Au)。基于待安装的半导体元件来适当选择形成外部连接终端子11-1至11-5的材料。 
在布线板10中，以这种顺序，即在安装部S1、安装部S2、安装部S3、安装部S4、以及安装部S5上安装半导体元件。 
为了安装半导体元件，预先在安装部S1至S5上选择性地提供膏状粘合剂12(12-1至12-5)。参见图3中(b)。 
由于安装部S1至S5具有大体为矩形的结构，因此能够容易安排粘合剂12的结构。 
基于用于安装半导体元件步骤的倒装芯片方法来适当选择粘合剂12的材料。例如，环氧树脂、聚酰亚胺树脂、丙烯酸树脂、硅树脂、或其它热固性绝缘树脂可用作粘合剂12的材料。粘合剂12可包含例如银(Ag)、焊料或镍(Ni)的导电性微颗粒。 
通过图5中示出的所谓分配方法，在安装部S1至S5上设置并形成粘合剂12。 
换句话说，通过利用图5中(a)示出的具有注射部的分配器15执行的分配方法，在安装部S1至S5上选择性地设置并形成粘合剂12。参见图5中(b)。在分配器15中，应用气体抽吸方法，从而可通过气压 控制粘合剂12的喷射量(jetting amout)。 
也就是说，将粘合剂12预先存储在分配器15的注射器16中。通过连接至压力控制部(未示出)的管17将指定压力的气体推入注射器16，从而压缩位于粘合剂12上及注射器16中的部件19。结果，随着部件19向下移动，粘合剂12从注射针18处喷射出。 
根据这种分配方法，可高精度控制粘合剂12的喷射量，从而能够容易形成粘合剂12的微小图案。因此，对于在布线板10的安装部S上安装薄或小的半导体元件的情况，这种方法是有效的。 
除了气体抽吸型分配方法，可应用一种所谓的重量控制型分配方法，从而通过直接且机械式地控制位于粘合剂12上表面上的部件19来控制粘合剂12从分配器15中喷射的喷射量。 
此外，可使用具有如下装置的自动机械分配器：控制注射部沿水平方向和上下方向移动的装置；控制安装有待喷射物的平台沿水平方向移动的装置；控制喷射量和喷射时间的装置；规划结合了该移动方法和该注射方法的操作顺序的装置；以及以及遵循规划执行该操作顺序的装置。 
通过应用使用这种自动机械分配器的分配方法，可形成具有高精度的粘合剂12的图案。此外，根据自动机械分配方法，通过预先寄存图形图案，可容易选择并切换各种图案。 
接下来，参照图3中(b)讨论在安装部S1至S5上设置并形成的粘合剂12-1至12-5的图案结构。 
如上所述，安装部S1大体为矩形。在安装部S1相对的两侧边上配备有外部连接端子。大体从安装部S1的中心部分沿矩形结构的对角线设置粘合剂12-1，从而使得粘合剂12-1具有X形且大体为点对称形结构。 
换句话说，沿安装部S1的对角线设置粘合剂12-1，且在安装部S1的中心部分设置的粘合剂12-1的量是最大的。 
因此，在安装部S1中，粘合剂12-1的重心(在图3的(b)中用黑色圆标识)位于安装部S1的中心部分。 
在安装部S1中心部分所设置的粘合剂12-1的量是最大的，这使得粘合剂12-1的体积重心位于安装部S1的中心部分。因此，当在安装部S1上固定半导体元件时，粘合剂12-1容易并均匀地展开在安装部S1的 整个区域中。 
另一方面，在安装部S2至S5上设置的粘合剂12-2至12-5具有与在安装部S1上形成的粘合剂12-1的设置图案不同的图案结构。 
在这个实施例中，在安装部S2至S5上设置的粘合剂12-2至12-5具有大体相同的图案结构。因此，通过介绍在安装部S2上形成的粘合剂12-2，可略去有关在安装部S3至S5上形成的粘合剂12-3至12-5的介绍。 
在安装部S2上，沿矩形安装部S2的对角线设置粘合剂12-2。在从安装部S2的中心部分向安装部S1侧(在图3的(b)中示为右侧)偏移的部分上所设置的粘合剂12-2的量最大。 
换句话说，在安装部S2中，粘合剂12-2的重心(在图3的(b)中用粘合剂12-2内的黑色圆标识)位于从安装部S2的中心部分向安装部S1侧偏移的部分上。 
因此，在从安装部S2的中心部分向安装部S1侧(在图3的(b)中示为右侧)偏移的部分上所设置的粘合剂的量最大，这使得粘合剂12-2的重心(在图3的(b)中用粘合剂12-2内的黑色圆标识)位于从安装部S2的中心部分向安装部S1侧(在图3的(b)中示为右侧)偏移的部分上。 
结果，当在安装部S1上固定半导体元件时，由于从抽吸工具喷射出的压缩气体导致粘合剂12-2以远离安装部S1的方向移动，从而使得粘合剂12-2的体积重心移动至安装部S2的中心部分。 
如果在安装部S2上设置的粘合剂12-2的图案结构与安装部S1上的粘合剂12-1的图案结构相同，则当在安装部S1上安装半导体元件时，由于从抽吸工具喷射出的压缩气体导致粘合剂12-2的体积分布将向安装部S3侧偏移。 
将安装部S2上的粘合剂12-2的排布应用于安装部S3至S5上的粘合剂12的排布。这是因为，当在安装部S-n上安装半导体元件时，压缩气体对接下来要安装半导体元件的相邻安装部S-(n+1)上的粘合剂12-(n+1)产生影响。 
将图6示出的方法应用于在布线板10上安装并固定半导体元件4的步骤。 
首先，在安装部S1的上方，通过抽吸工具26吸取并保持半导体元件20-1，其中半导体元件20-1的形成有外部连接端子25的表面朝下。通过凸形电极形成被称为半导体元件20-1的凸点的外部连接端子25。此外，使半导体元件20-1的外部连接端子25与布线板10的外部连接端子11-1相互面对，从而实现定位。参见图6中(a)。这时，布线板被保持在平台(未示出)上。 
为了吸取并保持半导体元件20-1，抽吸工具26的抽吸部27的内部为负压。维持该负压直至停止由抽吸工具26对半导体元件20-1的吸取。参见图6的(a)中的箭头。 
这时，在安装部S2上设置的粘合剂12-2的重心位于从安装部S2的中心部分向安装部S1侧偏移的部分上。 
依赖于该安装方法，从金(Au)、铜(Cu)及其合金、锡(Sn)-银(Ag)焊料、锡(Sn)-银(Ag)-铜(Cu)焊料、以及其它类似物中适当选择用于形成半导体元件20-1的外部连接端子25的材料。 
接下来，当半导体元件20-1的主表面与布线板10的主表面相互平行时降低抽吸工具26，并因此在布线板10上通过粘合剂12-1固定半导体元件20-1。此时，半导体元件20-1的外部连接端子25与布线板10的外部连接端子11-1相互接触。参见图6中(b)。 
抽吸工具26具有加热部(未示出)。因此，在粘合剂12-1由热固性树脂制成的情况下，在被吸取的半导体元件20-1加热到约250℃至300℃时降低抽吸工具26。结果，在安装部S1上安装半导体元件20-1的同时能够使半导体元件20-1固定在布线板10上。 
如上所述，粘合剂12-1在安装部S1的中心部分的设置量最大。所以，粘合剂12-1的体积重心位于安装部S1的中心部分。因此，在这个步骤中，当在安装部S1上安装半导体元件20-1时，粘合剂12-1可容易地并均匀(平坦)地展开在安装部S1的整个区域。从而能够将半导体元件20-1牢固地固定在布线板10上。 
此后，停止由抽吸工具26对半导体元件20-1的吸取。参见图6中(c)。 
此时，为了安全停止由抽吸工具26对半导体元件20-1的吸取，将抽吸工具26的抽吸部27的内部从负压转换为正压，从而使例如干氮(N2) 气体的压缩气体W从抽吸部27喷射到周围。参见图6的(c)中的箭头。 
由于压缩气体W的喷射导致设置在相邻安装部S2上的粘合剂12-2以远离安装部S1的方向移动，这使得粘合剂12-2的体积重心移动至安装部S2的中心部分。 
此后，提高抽吸工具26。 
这样，为了安全地停止由抽吸工具26对半导体元件20-1的吸取，压缩气体W从抽吸部27喷射出来，从而使得设置在相邻安装部S2上的粘合剂12-2以远离安装部S1的方向移动，从而使得粘合剂12-2的体积重心移动至安装部S2的中心部分。 
此外，图7中示出的方法可应用于将半导体元件4安装并固定至布线板10的步骤中。在图7中，与图6中所示的部件相同的部件用相同的附图标记表示，且略去其介绍。 
在图7所示的配置为吸取半导体元件20-1的抽吸工具28的抽吸部27周围配备有孔形成部29。如下所讨论的，压缩气体从孔形成部29喷射出来。 
将半导体元件20-1的设置有外部连接端子25的主表面面对布线板10，并通过抽吸工具28吸取并保持半导体元件20-1。半导体元件20-1的外部连接端子25与布线板10的外部连接端子11-1相互面对，从而实现定位。参见图7中(a)。这时，布线板10被支撑在平台(未示出)上。 
为了吸取并保持半导体元件20-1，抽吸工具26的抽吸部27的内部为负压。维持该负压，直至停止由抽吸工具26对半导体元件20-1的吸取。参见图7的(a)中的箭头。 
这时，在布线板10上，设置在安装部S2上的粘合剂12-2的体积重心位于从中心部分向右侧(即在安装部S1侧)偏移的部分上。 
接下来，当半导体元件20-1的主表面与布线板10的主表面相互平行时，降低具有将例如干氮(N2)气体的压缩气体喷射到周围的孔形成部29的抽吸工具28，由此将半导体元件20-1安装在安装部S1上并固定在布线板10上。 
如上所讨论的，在安装部S1的中心部分的粘合剂12-1的设置量最 大，这使得粘合剂12-1的体积重心位于安装部S1的中心部分。因此，当在安装部S1上固定半导体元件20-1时，粘合剂12-1容易并均匀地展开在安装部S1的整个区域。因此，能够将半导体元件20-1牢固地固定在布线板10上。 
当按压半导体元件20-1时，粘合剂12-1展开从而流动到半导体元件20-1的周围。然而，由于压缩气体W从抽吸工具28的孔形成部29喷射到半导体元件20-1的周围，所以粘合剂12-1没有蔓延到半导体元件20-1的侧表面，从而不会粘附到抽吸工具28。 
基于压缩气体W的喷射，设置在相邻安装部S2上的粘合剂12-2以远离安装部S1的方向移动，这使得粘合剂12-2的体积重心移动至安装部S2的中心部分。 
之后，停止由抽吸工具28对半导体元件20-1的吸取，并提高抽吸工具28。参见图7中(c)。这时，停止从抽吸工具28的孔形成部29喷射出压缩气体。 
为了安全停止由抽吸工具28对半导体元件20-1的吸取，可将抽吸工具28的抽吸部27内部的负压转换为正压，从而使得干氮(N2)气体从抽吸部27喷射到周围。 
然后，提高抽吸工具28。 
这样，压缩气体W从孔形成部29喷射出来，使得设置在相邻安装部S2上的粘合剂12-2以远离安装部S1的方向移动，所以粘合剂12-2的体积重心移动到安装部S2的中心部分。 
根据以上讨论的方法，半导体元件20-1经由粘合剂12-1固定至安装部S1。 
这时，通过设置有布线板10的平台加热布线板10和粘合剂12。通过平台的热度将粘合剂12加热到约50至100℃，因此降低粘合剂12的粘性并提高了粘合剂12的流动能力。 
这样，当半导体元件20-1至20-5经由粘合剂12-1至12-5被安装在安装部S1至S5上时，粘合剂12可容易地展开在半导体器件20的整个粘附表面。 
图4中(c)示出了这样一种状态，其中半导体元件20-1通过图6 或图7所示的方法安装并固定在图3中(b)所示的布线板10的安装部S1上。 
在这种状态下，粘合剂12-2(设置在邻近安装部S1的安装部S2上)的重心(图4的(c)中用粘合剂12-2内的黑色圆标识)移动到安装部S2的中心部分。 
接下来，当在接下来的步骤中将半导体元件20-2固定至安装部S2上时，粘合剂12-2展开到安装部S2的整个区域，这使得半导体元件20-2可牢固固定。 
另一方面，设置在安装部S3至S5上的粘合剂12-3至12-5的重心保持位于从安装部S的中心部分向安装部S1侧偏移的部分上。 
这是因为，安装部S2上的粘合剂12-2作为块能够抵挡从抽吸工具26或28喷射出来的压缩气体W的气流，使得压缩气体W不会对粘合剂12-3至12-5产生影响。 
接下来，半导体元件20-2经由粘合剂12-2安装并固定在安装部S2上。使用与参照图6或图7所讨论的方法相同的方法，来安装并固定半导体元件20-2。参见图4中(d)。 
如上所讨论，设置在安装部S2上的粘合剂12-2的体积重心移动到安装部S2的中心部分。因此，粘合剂12-2在安装部S2的中心部分的设置量最大。 
因此，当将半导体元件20-2固定至安装部S2时，粘合剂12-2铺开至安装部S2的整个区域，使得半导体元件20-2能够安全固定。在固定半导体元件20-2的固定步骤中，由于从抽吸工具26或28喷射出来的压缩气体W的影响，粘合剂12-3(设置在邻近或毗邻安装部S2的安装部S3上并位于从安装部S3的中心部分向安装部S1和S2侧偏移的部分上)移动至安装部S3的中心部分，从而使得粘合剂12-3的体积重心移动至安装部S3的中心部分。 
因此，在下一步骤中，当将半导体元件20-3固定至安装部S3时，粘合剂12-3展开至安装部S3的整个区域，这使得半导体元件20-3可安全固定。 
另一方面，设置在安装部S4和S5上的粘合剂12-4和12-5的体积重 心保持位于从安装部S的中心部分向安装部S1侧偏移的部分。 
这是因为，安装部S3上的粘合剂12-3作为块能够抵挡从抽吸工具26或28喷射出来的压缩气体W的气流，从而使得压缩气体W几乎没有对粘合剂12-4和12-5产生影响。 
接下来，通过相同的方法，在安装部S4上经由粘合剂12-4安装并固定半导体元件20-4，以及在安装部S5上经由粘合剂12-5安装并固定半导体元件20-5。参见图4中(e)。 
这样，当在安装部S1至S5上安装半导体元件20时，粘合剂12展开至安装部S1至S5的整个区域，从而能够将半导体元件20固定在布线板10上。 
因此，可防止在粘合剂12的体积分布中产生小偏差，并避免产生空白或未填充部分，或者产生半导体元件20倾斜固定的情形。 
此后，在安装并固定有多个半导体元件20的布线板10的另一个主表面(后表面)上设置多个外部连接端子30(例如，由锡(Sn)-银(Ag)焊料或锡(Sn)-银(Ag)-铜(Cu)焊料制成的焊料电极)。 
然后，通过切割刀片或类似物切割布线板10，从而形成多片安装部S(分片处(piece forming process))。 
这样，形成半导体器件31，其中通过倒装芯片方法将半导体元件20安装在布线板10上。参见图8。 
如果需要半导体元件20的密封处理，例如，在执行分片处理之前，在安装有半导体元件20的布线板10的表面上执行树脂密封处理。在以独立安装部S为单位的树脂密封处理之后，在厚度方向上切割分离布线板10和密封树脂部分，从而形成树脂密封并制成片的半导体器件13。 
在对布线板10应用切割工艺及其它工艺时，图3和图4中示出的开口可用来定位。 
在这个实施例中，布线板10的安装部S1具有大体为矩形的结构。外部连接端子11-1设置在彼此相对的两侧。粘合剂12-1具有大体为点对称的结构。更具体地，粘合剂12-1具有大体X形结构，其中从具有矩形结构的安装部S1的中心部分沿对角线排布(form)粘合剂12-1。 
换句话说，粘合剂12-1沿安装部S1的对角线排布，且粘合剂12-1 在安装部S1中心部分的设置量最大。 
然而，粘合剂12的结构并不局限于该实例。粘合剂12可具有图9至图11、图13、或图14示出的图案结构。 
图9至图11、图13、及图14示出了在安装部S1及其它安装部S上形成的粘合剂图案的改进实例。在图9至图11、图13、或图14中，(a)示出了安装部S1上的粘合剂的图案结构；(b)示出了其它安装部上的粘合剂的图案结构；以及(c)示出了在压缩气体喷射到邻近或毗邻安装部S之后，安装部S上的粘合剂的图案结构。 
在图9中示出了安装部S上的粘合剂的图案结构的第一改型实例。 
在这个改进示例中，粘合剂40以大体对称的形式设置在具有矩形结构的安装部S上。换句话说，沿安装部S1的对角线设置粘合剂40-1a和40-1b，从而使其相互交叉。 
此外，在安装部S1上设置粘合剂40-1c和40-1d，且粘合剂40-1c和40-1d设置在矩形结构的相对两边的中点之间，从而使其相互交叉。粘合剂40-1c和40-1d的交叉点与大体位于安装部S1的中心部分的粘合剂40-1a和40-1b的交叉点交迭。 
在这种结构下，粘合剂40-1在安装部S1的中心部分的设置量最大，从而使粘合剂40-1的体积重心位于安装部S1的中心(在图9的(a)中用粘合剂40-1内的黑色圆标识)。 
这样，由于粘合剂40-1在矩形结构的中心部分的设置量最大，从而使得粘合剂40-1的体积重心位于矩形结构的中心，进而当在图4中(c)所示的步骤中将安装部S1固定至半导体元件20-1时，粘合剂40-1容易并均匀地展开在安装部S1的整个区域。 
另一方面，设置在安装部S2至S5上的粘合剂与形成在安装部S1上的粘合剂40-1具有不同的图案结构。参见图9中(b)。 
由于形成在安装部S2至S5上的粘合剂的设置图案具有相同的结构，因此仅讨论设置在安装部S2上的粘合剂40-2的图案结构，而略去对设置在安装部S3至S5上的粘合剂40的介绍。 
设置在安装部S2上的粘合剂40-2包括粘合剂40-2a、40-2b、40-2c、和40-2d。粘合剂40-2a和40-2b相互交叉。此外，在安装部S2上设置粘 合剂40-2c和40-2d，且粘合剂40-2c和40-2d设置在矩形结构相对的两边之间，从而使其相互交叉。粘合剂40-2c和40-2d的交叉点与大体位于安装部S2的中心部分的粘合剂40-2a和40-2b的交叉点交迭。 
在这种情况下，形成向图3中所示的安装部S1侧偏移的交叉点。换句话说，粘合剂40-2的重心(图9的(b)中用粘合剂40-2内的黑色圆标识的部分)从安装部S2的中心部分向图3中所示的安装部S1侧偏移。 
这样，根据这种设置排布，当在邻近并毗邻安装部S2的安装部S1上安装半导体元件20-1时，由于从抽吸工具26或28(参见图6或图7)喷射出来的压缩气体的影响，粘合剂40-2以远离安装部S1的方法移动，从而使粘合剂40-2的体积重心移动至安装部S2的中心部分。参见图9中(c)。 
因此，当在安装部S2上固定半导体元件20-2时，粘合剂40-2容易并均匀地展开在安装部S2的整个区域，从而能够将半导体元件20-2牢固地固定在布线板10上。 
在图10中示出了安装部S上的粘合剂的图案结构的第二改进实例。 
在这个改进实例中，以大体对称的形式将粘合剂45设置在具有矩形结构的安装部S上。 
换句话说，沿安装部S1的对角线设置粘合剂45-1a和45-1b，从而使其相互交叉。 
也就是说，在安装部S1上沿安装部S1的对角线设置线形粘合剂45-1a和45-1b，使其相互交叉。进一步，在大体位于安装部S1的中心部分的粘合剂45-1a和45-1b的交叉点上设置具有圆形结构的粘合剂45-1c。参见图10中(a)。 
在这种结构下，粘合剂45-1在安装部S1的中心部分的设置量最大，从而使得粘合剂45-1的体积重心(图10的(a)中用粘合剂45-1内的黑色圆标识)位于具有矩形结构的安装部S1的中心。 
这样，由于粘合剂45-1在具有矩形结构的安装部S1的中心部分的设置量最大，从而使得粘合剂45-1的体积重心位于矩形结构的中心，进而当在图3的(c)所示的步骤中将半导体元件20-1固定在安装部S1上时，粘合剂45-1容易并均匀地展开在安装部S1的整个区域中。 
由于粘合剂45的设置图案由线型粘合剂45-1a和45-1b以及圆形粘合剂45-1c形成，因此在设置粘合剂45时能够容易控制分配量。 
另一方面，设置在安装部S2至S5上的粘合剂与形成在安装部S1上的粘合剂45-1具有不同的图案结构。参见图10中(b)。 
由于形成在安装部S2至S5上的粘合剂的设置图案具有相同的结构，因此仅讨论设置在安装部S2上的粘合剂45-2的图案结构，而略去对设置在安装部S3至S5上的粘合剂40的介绍。 
粘合剂45-2a和45-2b的交叉点以及叠置在粘合剂45-2a和45-2b的交叉点上的粘合剂45-2c的部分，向图3所示的安装部S1侧偏移。 
这种排布通过下列方式形成：以曲线形式设置粘合剂45-2a和45-2b，从而使得粘合剂45-2a和45-2b的交叉点向安装部S1侧偏移，然后在该交叉点上设置粘合剂45-2c。 
换句话说，粘合剂45-2的重心从安装部S2的中心部分向图3示出的安装部S1侧偏移(图10的(b)中用粘合剂45-2内的黑色圆标识的部分)。 
这样，根据这种设置排布，当在邻近并毗邻安装部S2的安装部S1上安装半导体元件20-1时，由于从抽吸工具喷射出来的压缩气体的影响，粘合剂45-2以远离安装部S1的方向移动，从而使粘合剂45-2的体积重心移动至安装部S2的中心部分。参见图10中(c)。 
因此，当在安装部S2上固定半导体元件20-2时，粘合剂45-2容易并均匀地展开在安装部S2的整个区域中，从而能够将半导体元件20-牢固地固定在布线板10上。 
在图11中示出了安装部S上的粘合剂的图案结构的第三改进实例。 
在这个改进实例中，以大体对称的形式在安装部S上设置粘合剂50。 
换句话说，沿安装部S1的对角线设置粘合剂50-1a和50-1b，使其相互交叉。 
也就是说，在安装部S1上沿安装部S1的对角线设置线形粘合剂50-1a和50-1b，使其相互交叉。进一步，在大体位于安装部S1的中心的粘合剂50-1a和50-1b的交叉点上设置具有圆形结构的粘合剂50-1c。参见图11中(a)。 
在这种结构下，粘合剂50-1在安装部S1的中心部分的设置量最大，从而使得粘合剂50-1的体积重心(图11的(a)中用粘合剂50-1内的黑色圆标识)位于具有矩形结构的安装部S1的中心。 
这样，由于粘合剂50-1在具有矩形结构的安装部S1的中心部分的设置量最大，从而使得粘合剂50-1的体积重心位于矩形结构的中心，进而当在图4的(c)所示的步骤中在安装部S1上固定半导体元件20-1时，粘合剂50-1容易并均匀地展开在安装部S1的整个区域。 
既然粘合剂50的设置图案由线形粘合剂50-1a和50-1b以及圆形粘合剂50-1c形成，因此在设置粘合剂50时能够容易控制分配量。 
另一方面，设置在安装部S2至S5上的粘合剂与形成在安装部S1上的粘合剂50-1具有不同的图案结构。参见图11中(b)。 
由于形成在安装部S2至S5上的粘合剂的设置图案具有相同结构，因此仅讨论设置在安装部S2上的粘合剂50-2的图案结构，而略去对设置在安装部S3至S5上的粘合剂40的介绍。 
粘合剂50-2a和50-2b的交叉点以及叠置在粘合剂50-2a和50-2b交叉点上的粘合剂50-2c的部分，向图3所示的安装部S1侧偏移。 
这种排布可通过下列方式形成：设置粘合剂50-2a和50-2b使其相互交叉，且粘合剂50-2a和50-2b的交叉点位于安装部S2的中心，然后设置粘合剂50-2c使其向安装部S1侧偏移。换句话说，粘合剂50-2的重心(图11的(b)中用粘合剂50-2内的黑色圆标识的部分)从安装部S2的中心部分向安装部S1侧偏移。 
这样，根据这种设置排布，当在邻近并毗邻安装部S2的安装部S1上安装半导体元件20-1时，由于从抽吸工具喷射出来的压缩气体的影响，粘合剂50-2的体积重心移动至安装部S2的中心部分。参见图11中(c)。 
因此，当在安装部S2上固定半导体元件20-2时，粘合剂50-2容易并均匀地展开在安装部S2的整个区域，从而能够将半导体元件20-2牢固地固定在布线板10上。 
在此，参照图12讨论设置图案结构的第三改进实例中的粘合剂50的设置方法。 
首先，通过滴胶方法，在布线板10上，沿具有矩形结构的安装部S 的一条对角线形成并设置粘合剂50-1a。参见图12中(a)。 
接下来，在布线板10上，沿具有矩形结构的安装部S的另一条对角线形成并设置粘合剂50-1b。参见图12中(b)。结果，将粘合剂50-1a和50-1b设置为大体在安装部S的中心部分相互交叉。 
随后，粘合剂50-1c以圆形形式设置在粘合剂50-1a和50-1b的交叉点上，也即安装部S1的中心部分。参见图12中(c)。 
另一方面，在安装部S2至S5上，以圆形形式将粘合剂50-2c设置在这样一个位置上，该位置从粘合剂50-2a和50-2b的交叉点向安装部S1侧偏移。参见图12中(c)’。 
如上所讨论的，考虑到从抽吸工具喷射出来的压缩气体的影响而进行这种设置。 
这个设置或形成方法不局限于该第三改进实例，也可应用于第一改进实例和第二改进实例。 
虽然在上述实例中设置在安装部S上的粘合剂具有线形设置的图案结构，但本发明不局限于这些实例。 
在图13中示出了安装部S上的粘合剂的图案结构的第四改进实例。 
在该第四改进实例中，具有相对大面积的粘合剂55-1a以圆形形式设置在具有矩形结构的安装部S1的中心部分上。具有相对小面积的粘合剂55-1b以圆形形式设置在安装部S1的中心部分与四个角之间。参见图13中(a)。 
在这种结构下，粘合剂55-1在安装部S1的中心部分的设置量最大，从而使得粘合剂55-1的体积重心(图11的(a)中用粘合剂55-1内的黑色圆标识)位于具有矩形结构的安装部S1的中心。因此，当在安装部S1上固定半导体元件20-1时，粘合剂55-1容易并均匀地展开在安装部S1的整个区域，从而能够将半导体元件20-1牢固地固定在布线板10上。 
另一方面，设置在安装部S2至S5上的粘合剂55与形成在安装部S1上的粘合剂55-1具有不同的图案结构。参见图13中(b)。 
由于形成在安装部S2至S5上的粘合剂的设置图案具有相同的结构，因此仅讨论设置在安装部S2上的粘合剂55-2的图案结构，而略去对设置在安装部S3至S5上的粘合剂55的介绍。 
换句话说，具有相对大面积的粘合剂55-2a以圆形形式设置在安装部S2上，并使其向图3中所示的安装部S1侧偏移。 
此外，具有相对小面积的粘合剂55-2b以圆形形式设置在安装部的中心部分和四个角之间，并使其稍微向安装部S1侧偏移。 
根据以上讨论的排布，在布线板上设置粘合剂55-2，以使粘合剂55-2的体积重心(图13的(b)中用粘合剂55-2内的黑色圆标识的部分)从安装部S2的中心部分向安装部S1侧偏移。 
这样，根据这种设置排布，当在邻近并毗邻安装部S2的安装部S1上安装半导体元件20-1时，由于从抽吸工具喷射出来的压缩气体的影响，粘合剂55-2的体积重心移动至安装部S2的中心部分。参见图13中(c)。 
因此，当在安装部S2上固定半导体元件20-2时，粘合剂55-2容易并均匀地展开在安装部S2的整个区域中，从而能够将半导体元件20-2牢固地固定在布线板10上。 
在图14中示出了安装部S上的粘合剂的图案结构的第五改进实例。 
在这个第五改进实例中，具有相对大面积的粘合剂60-1a以圆形形式大体设置在具有矩形结构的安装部S1的中心部分。具有相对小面积的粘合剂60-1b和60-1c以圆形形式设置在安装部S1的中心部分和四个角之间，以使其围绕粘合剂60-1a。参见图14中(a)。 
在这种结构下，粘合剂60-1的体积重心(图14的(a)中用粘合剂60-1内的黑色圆标识)位于具有矩形结构的安装部S1的中心。 
因此，当在安装部S1上固定半导体元件20-1时，粘合剂60-1容易并均匀的展开在安装部S1的整个区域中，从而能够将半导体元件20-1牢固地固定在布线板10上。 
另一方面，设置在安装部S2至S5上的粘合剂60与形成在安装部S1上的粘合剂60-1具有不同的图案结构。参见图14中(b)。 
由于形成在安装部S2至S5上的粘合剂的设置图案具有相同的结构，因此仅讨论设置在安装部S2上的粘合剂60-2的图案结构，而略去对设置在安装部S3至S5上的粘合剂60的介绍。 
换句话说，在安装部S2上以圆形形式设置具有相对大面积的粘合剂60-2a，以使其向图3中所示的安装部S1侧偏移。 
此外，将具有相对小面积的粘合剂60-2b和60-2c以圆形形式设置在安装部S2的中心部分和四个角之间，以使其围绕粘合剂60-2a并稍微向安装部S1侧偏移。 
也就是说，在布线板上设置粘合剂60-2，以使粘合剂60-2的体积重心(图14的(b)中用粘合剂60-2内的黑色圆标识的部分)从安装部S2的中心部分向安装部S1侧偏移。 
这样，根据这种设置排布，当在邻近并毗邻安装部S2的安装部S1上安装半导体元件20-1时，由于从抽吸工具喷射出来的压缩气体的影响，粘合剂60-2的体积重心移动至安装部S2的中心部分。参见图14中(c)。 
因此，当在安装部S2上固定半导体元件20-2时，粘合剂60-2容易并均匀地展开在安装部S2的整个区域中，从而能够将半导体元件20-2牢固地固定在布线板10上。 
本发明不局限于在多个改进实例的安装部S1至S5上形成的图案结构。 
换句话说，本发明不存在限制，只要当在单个安装部Sn上固定半导体元件时，粘合剂均匀地展开在安装部Sn的整个区域中，从而使得半导体元件可牢固地固定在布线板上，而不产生粘合剂的体积分布的偏差即可。 
因此，在安装部Sn上选择性地设置粘合剂，以使得安装部Sn上的粘合剂的体积重心向邻近并毗邻安装部Sn的安装部Sm的方向偏移，在安装部Sm上安装半导体元件早于在安装部Sn上安装半导体元件。 
这样，根据本发明实施例，在将例如半导体元件的电子部件经由粘合剂固定在安装部S上时，基于待安装的电子部件的位置或次序，预先设定在安装部S上设置的粘合剂的体积中心或设置图案结构。 
因此，当在布线板上固定电子部件时，对应于从用于吸取并保持电子部件的抽吸工具喷射出的压缩气体的喷射，粘合剂的体积重心移动至安装部S的中心部分。 
此外，当在特定安装部S上安装电子部件时，在毗邻或邻近的安装部S上的粘合剂的体积重心移动时，电子元件被安装并固定在各安装部S上。 
之后，为每个安装部S切割布线板10，从而形成各半导体器件。 
在本发明第一实施例及其改进实例中，在具有矩形结构的单个布线板上，沿布线板的纵向方向安装一行例如半导体元件的多个电子部件。 
接下来，针对在设有多个安装部S的布线板上依次安装并固定电子部件的情况，讨论用于设置粘合剂以及安装并固定例如半导体元件的电子部件的方法。 
[本发明第二实施例] 
参照图15讨论本发明第二实施例的在布线板上安装电子部件的方法。 
在本发明第二实施例中，在单个布线板上沿布线板的纵向方向安装多行(至少两行)半导体元件。在图15中，与图4中的部件相同的部件用相同的附图标记表示，且略去其介绍。 
在这个实施例中，在布线板10的主表面上，在布线板10的纵向方向上设有两行半导体元件的安装部S。安装部S具有如图15中虚线所示的矩形结构。 
依次在安装部S1、安装部S2、安装部S3、…、安装部S11、以及安装部S12上安装半导体元件S。 
由于安装部S的排布以及在安装部S上安装并固定半导体元件的次序，当在安装部S上安装并固定半导体元件时，有必要考虑压缩气体对位于周围的多个安装部S中的每一个上的粘合剂的影响。 
换句话说，当将半导体元件安装并固定在某一安装部S上时，有必要考虑压缩气体对位于下列方向上的安装部S的影响，所述方向不仅为设置有安装部S的布线板的纵向方向，而且为垂直于纵向方向的方向，和夹在纵向方向与垂直于纵向方向的方向之间的倾斜方向(例如，45度方向)。 
根据压缩空气在多个方向上的影响，参照图16讨论粘合剂的设置图案结构。 
在此，讨论设置在安装部S1至S4上的粘合剂100-1至100-4的图案结构。 
首先，在安装部S1上安装并固定半导体元件20(图16中未示出)。 
因此，在安装部S1上设置粘合剂100-1，使得粘合剂100-1的体积重心位于安装部S1的中心。 
换句话说，具有相对大面积的粘合剂100-1a以圆形形式设置在具有矩形结构的安装部S1上。具有相对小面积的粘合剂100-1b至100-1d以圆形形式设置在安装部S1的中心部分和四个角之间。 
根据这种排布，粘合剂100-1的体积重心(图16中用粘合剂100-1内的黑色圆标识)位于具有矩形结构的安装部S1的中心。 
因此，当在安装部S1上固定半导体元件20-1时，粘合剂100-1容易并均匀地展开在安装部S1的整个区域中，从而能够将半导体元件20-1牢固地固定在布线板10上。 
另一方面，在毗邻或邻近安装部S1的安装部S2至S4上，通过考虑与各安装部S毗邻或邻近的其它安装部S的位置(方向)、距离、半导体元件的固定次序、以及其它方面，来确定在安装部S上设置并形成的粘合剂的成形图案。 
换句话说，在安装部S2上，当在安装部S1上安装或固定半导体元件20时，从抽吸工具喷射出来的压缩气体沿垂直于布线板10的纵向方向的方向流动。因此，将具有相对大面积的圆形粘合剂100-2a设置为从安装部S2的中心部分向图16中安装部S1侧偏移。 
类似地，将具有相对小面积的圆形粘合剂100-2b至100-2d设置在安装部S2的中心部分和四个角之间，并使其稍微向图16中安装部S1侧偏移。这样，粘合剂100-2的体积重心从安装部S2的中心部分向安装部S1侧偏移。 
这样，通过在安装部S2上排布粘合剂100-2，当在安装部S1上安装半导体元件20时，由于从抽吸工具喷射出的压缩气体的影响，粘合剂100-2的体积重心移动至安装部S2的中心部分。 
因此，当在安装部S1上安装半导体元件20时，粘合剂100-2容易并均匀地展开在安装部S2的整个区域中，从而能够将半导体元件20牢固地固定在布线板10上。 
在安装部S3中，当在安装部S1上安装或固定半导体元件20时，从抽吸工具喷射出的压缩气体以平行于布线板10的纵向方向的方向上流 动。进一步地，当在安装部S2上安装并固定半导体元件20时，从抽吸工具喷射出的压缩气体以夹在布线板10的纵向方向与垂直于该纵向方向的方向之间约45度的方向上流动。压缩气体以两个方向流动的流动时间互不相同。 
因此，将具有相对大面积的圆形粘合剂100-3a设置在安装部S3上，以使其从安装部S3的中心部分向安装部S1和S2侧偏移，即向在矢量和的方向上偏移的部分偏移，其中该矢量和为指向安装部S1的方向矢量与指向安装部S2的方向矢量的和。 
类似地，将具有相对小面积的圆形粘合剂100-3b至100-3d设置在安装部S3的中心部分与四个角之间，并使其稍微向图16中的安装部S1和S2侧偏移，即向指向安装部S1的方向矢量与指向安装部S2的方向矢量的和方向部分偏移。 
根据这种排布，设置粘合剂100-3，以使得粘合剂100-3的体积重心向安装部S1和S2侧偏移，即向指向安装部S1的方向矢量与指向安装部S2的方向矢量的和方向部分偏移。 
这样，通过在安装部S3上排布粘合剂100-3，当在安装部S1和S2上安装半导体元件20时，由于从抽吸工具喷射出的压缩气体的影响，粘合剂100-3的体积重心移动至安装部S3的中心部分。 
因此，当在安装部S3上固定半导体元件20时，粘合剂100-3容易并均匀地展开在安装部S3的整个区域中，从而能够将半导体元件牢固地固定在布线板10上。 
在安装部S4中，当在安装部S1上安装或固定半导体元件20时，从抽吸工具喷射出的压缩气体以夹在布线板的纵向方向与垂直于该纵向方向的方向之间的45度的方向流动。进一步地，当在安装部S2上安装并固定半导体元件20时，从抽吸工具喷射出的压缩气体以平行于纵向方向的方向流动。此外，当在安装部S3上安装并固定半导体元件20时，从抽吸工具喷射出的压缩气体以垂直于布线板的纵向方向的方向流动。压缩气体以三个方向流动的流动时间互不相同。 
因此，将具有相对大面积的圆形粘合剂100-4a设置在安装部S4上，并使其从安装部S4的中心部分向安装部S1、S2和S3侧偏移，即向指向 安装部S1的方向矢量、指向安装部S2的方向矢量、以及指向安装部S3的方向矢量的和方向部分偏移。 
类似地，将具有相对小区域的圆形粘合剂100-4b至100-4d设置在安装部S4的中心部分和四个角之间，并使其稍微向安装部S1、S2和S3侧偏移，即向指向安装部S1的方向矢量、指向安装部S2的方向矢量、以及指向安装部S3的方向矢量的和方向部分偏移。 
根据这种排布，设置粘合剂100-4，使粘合剂100-4的体积重心向安装部S1、S2和S3侧偏移，即向指向安装部S1的方向矢量、指向安装部S2的方向矢量、以及指向安装部S3的方向矢量的和方向部分偏移。 
这样，通过在安装部S4上排布粘合剂100-4，当在安装部S1、S2和S3上安装半导体元件20时，由于从抽吸工具喷射出的压缩气体的影响，粘合剂100-4的体积重心移动至安装部S4的中心部分。 
因此，当在安装部S4上安装半导体元件20时，粘合剂100-4容易并均匀地展开在安装部S4的整个区域中，从而能够将半导体元件20牢固地固定在布线板10上。 
类似地，对于粘合剂100-5至100-12的粘附，考虑来自安装部S1至安装部S(n-1)的压缩气体的影响，其中，在安装部S5至S12上安装半导体元件之前刚刚在安装部S(n-1)上安装了半导体元件20。 
换句话说，在各安装部S设置粘合剂100，以使得粘合剂100的体积重心偏移。由于从抽吸工具喷射出的压缩气体的影响，正好在指定安装区域Sn上安装半导体元件之前，指定安装区域Sn上的粘合剂100的体积重心移动至安装部Sn的中心部分。 
因此，当在安装部Sn上安装半导体元件20时，粘合剂100容易并均匀地展开在安装部Sn的整个区域中，从而能够将半导体元件20牢固地固定在布线板10上，而不产生粘合剂100的体积分布的偏差。 
这样，通过设有指定图案的粘合剂100，在安装部S1至S12上安装并固定半导体元件20。 
设置在安装部S上的粘合剂的成形图案(forming pattern)可与图17中示出的相同。在此，图17示出了本发明第二实施例的在布线板上设置的粘合剂的改进实例。 
在这个改进实例中，例如，沿安装部S1的对角线以线形方式设置粘合剂110-1a和110-1b，使其相互交叉。根据这种设置排布，粘合剂110-1在交叉点上的设置量最大，从而使得粘合剂100-1的体积重心位于安装部S1上的交叉点上。 
对于定位粘合剂110-na和110-nb的交叉部分(即体积重心向指向多个毗邻或邻近安装部S的矢量的和方向偏移的部分)，考虑来自安装部S1至安装部S(n-1)的压缩气体的影响，其中在安装部S5至S12上安装半导体元件之前刚刚在安装部S(n-1)上安装了半导体元件20。由于交叉部分的偏移，如果需要则弯曲粘合剂110-na和110-nb，并选择粘合剂110-na和110-nb的长度或宽度。 
这样，由于从抽吸工具喷射出的压缩气体的影响，正好在半导体元件被安装在指定安装区域Sn上之前，指定安装区域Sn上的粘合剂100的体积重心移动至安装部Sn的中心部分。 
因此，当在安装部Sn上固定半导体元件20时，粘合剂110容易并均匀地展开在安装部Sn的整个区域中，从而能够将半导体元件20牢固地固定在布线板10上，而不产生粘合剂110的体积分布的偏差。 
[本发明第三实施例] 
接下来，参照图18和图19讨论本发明第三实施例的在布线板上安装电子部件的方法。 
在本发明第三实施例中，沿单个布线板的纵向方向设置多行(至少两行)的插件板组件(package board part)。在插件板组件上安装多个半导体元件。 
在图18中示出的实例中，在布线板10上，沿布线板10的纵向方向设置两行插件板组件，其中每行插件板组件有5个插件板组件150，且各插件板组件150分别具有4个安装半导体元件的安装部SP。 
图19为由图18中虚线包围的插件板组件150部分的展开图。此外，图20示出了在一个插件板组件150上安装并固定半导体元件180的状态。 
在单个插件板组件150上，在安装部S1、安装部S2、安装部S3、以及安装部S4上依次安装并固定4个半导体元件。根据待安装的半导体元件的高度(厚度)或安装部SP之间的距离来确定半导体元件的安装顺 序。 
如图19中所示，沿具有矩形结构的安装部SP1的对角线设置粘合剂160-1a和160-1b，以使其相互交叉。此外，圆形粘合剂160-1c和160-1d设置在位于安装部SP1的中心部分的粘合剂160-1a和160-1b的交叉点附近。 
根据这种设置排列，粘合剂160-1在安装部SP1的中心部分附近的设置量最大，从而使得粘合剂160-1的体积重心(图19中用粘合剂160-1内的黑色圆标识的部分)位于交叉点上。 
换句话说，粘合剂160-1在第一安装部S1的中心部分的设置量最大，从而使得粘合剂160-1的体积重心位于具有矩形结构的安装部S1的中心部分。因此，当在安装部S1上固定半导体元件180-1时，粘合剂160-1容易并均匀地展开在安装部S1的整个区域中。 
由于粘合剂160-1的设置图案由线形粘合剂160-1a和160-1b以及圆形粘合剂160-1c和160-1d形成，从而在设置粘合剂160-1时能够容易地控制滴胶。因此，能够将半导体元件180-1牢固地固定在布线板上，而不产生粘合剂160-1的体积分布的偏差。 
另一方面，设置在安装部SP2至SP4上的粘合剂160-2至160-4与形成在安装部SP1上的粘合剂160-1具有不同的图案结构。 
沿具有矩形结构且设置有多个外部连接端子170-2的第二安装部SP2的对角线设置粘合剂160-2a和160-2b，使其相互交叉。此外，将圆形粘合剂160-2c设置为从安装部SP2的中心部分向安装部S1侧偏移。 
结果，粘合剂160-2的体积重心在图19中标识为粘合剂160-2内的黑色圆。 
这样，通过在安装部SP2上排布粘合剂160-2，当在安装部SP1上安装半导体元件时，由于从抽吸工具喷射出的压缩气体W的影响，粘合剂160-2的体积重心移动至安装部SP2的中心部分。 
因此，当在安装部SP2上固定半导体元件180-2时，粘合剂160-2容易并均匀地展开在安装部SP2的整个区域中，从而能够将导体元件180-2牢固地固定在布线板10上。 
在沿矩形区域的四边设置有多个外部连接端子170-3的安装部SP3 中，沿矩形区域的对角线设置粘合剂160-3a和160-3b，使其相互交叉。在安装部SP3上设置圆形粘合剂160-3c，使其从安装部SP3的中心部分以指向安装部SP1的方向矢量与指向安装部SP2的方向矢量的和方向偏移。 
结果，粘合剂160-3的体积重心为图19中用粘合剂160-3内的黑色圆标识的部分。 
根据粘合剂160-3的设置排布，当在安装部SP1和SP2上安装半导体元件时，由于从抽吸工具喷射出的压缩气体W的影响，粘合剂160-3的体积重心移动至安装部SP3的中心部分。 
因此，当在安装部SP3上固定半导体元件180-3时，粘合剂160-3容易并均匀地展开在安装部SP3的整个区域中，从而能够将半导体元件180-3牢固地固定在布线板10上，而不产生粘合剂160-3的体积分布的偏差。 
在沿矩形区域的四边设置有多个外部连接端子170-4的安装部SP4中，沿矩形区域的对角线设置粘合剂160-4a和160-4b，使其相互交叉。在安装部SP4上设置圆形粘合剂160-4c，使其从安装部SP4的中心部分以指向安装部SP2的方向矢量与指向安装部SP3的方向矢量的和方向偏移。 
结果，粘合剂160-4的体积重心为图19中用粘合剂160-4内的黑色圆标识的部分。 
根据粘合剂160-4的设置排布，当在安装部SP1和SP3上安装半导体元件时，由于从抽吸工具喷射出的压缩气体W的影响，粘合剂160-4的体积重心移动至安装部SP4的中心部分。 
因此，当在安装部SP4上固定半导体元件180-4时，粘合剂160-4容易并均匀地展开在安装部SP4的整个区域中，从而能够将半导体元件180-4牢固地固定在布线板10上，而不产生粘合剂160-4的体积分布的偏差。 
因此，在将4个半导体元件安装并固定在布线板10的第一插件板组件150-1上之后，将4个半导体元件安装并固定在第二插件板组件150-2上。 
此后，通过相同的安装方法，在布线板10的其它插件板组件150上安装并固定半导体元件。 
此后，在安装并固定有多个半导体元件20的布线板10的另一个主表面(后表面)上，设置多个外部连接端子30(例如，由锡(Sn)-银(Ag)焊料或锡(Sn)-银(Ag)-铜(Cu)焊料制成的焊料电极)。 
在图20中，示出了这样一种状态，其中半导体元件180安装在布线板10的插件板组件150上，且外部连接端子30被设置在布线板10的另一个主表面上。图20为沿图19中线X-X′获取的剖面图。 
此后，利用切割刀片或类似物切割布线板10，从而形成多片插件板组件150(分片处理)。至此，形成了半导体元件180-1至180-4安装在安装部S1至S4上的封装结构。 
设置在插件板150的安装部SP1至SP4上的粘合剂160的成形图案为实例。本发明不局限于这个实例。 
换句话说，粘合剂160的设置图案可具有图9、图10、图13、图14、或图17中示出的结构。 
换句话说，本发明不存在限制，只要当在单个安装部SP上固定半导体元件时，粘合剂均匀地展开在安装部SP的整个区域中，从而能够将半导体元件牢固地固定在布线板上，而不产生粘合剂体积分布的偏差即可。 
也即，设置粘合剂，使设置在安装部SO上的粘合剂的体积重心位于以指向安装部SPn的一个矢量方向(多个矢量的和方向)偏移的部分，其中在安装部SPn安装半导体元件早于在安装部SP安装半导体元件。 
结果，在半导体元件安装在安装部SP上之前，当在安装部SPn上安装半导体元件时，由于从抽吸工具喷射出的压缩气体的影响，粘合剂的体积重心移动至安装部SP的中心部分。 
在图18中示出的布线板10上，选择在插件板组件150-1至150-10的4个安装部SP上设置的粘合剂的图案结构。 
另一方面，在相邻插件板组件之间存在足够的间隙，例如，在插件板组件150-1和150-2、150-1和150-9、或150-1和150-10之间。因此，即使在相邻插件板组件上安装半导体元件，不存在从抽吸工具喷射出的压缩气体的影响，也即不存在粘合剂的变形或移动。 
即使插件板组件之间存在由于抽吸工具的压缩气体导致的影响，也能够通过遵循本发明实施例来适当排布粘合剂。 
尽管为了完整并清楚地公开已通过特定实施例对本发明进行了介绍，但所附权利要求并不局限于此，而应解释为包括本领域技术人员在于此提出的技术启示下可实现的所有改进和替换结构。 
本专利申请以2007年2月15日提交的日本在先专利申请No.2007-35280为基础，且该在先申请的全部内容通过引用并入本申请。 

Claims (13)

1.一种安装电子部件的方法，包括：
在布线板上的多个电子部件安装部中的每一个上设置粘合剂的步骤；以及
在所述多个电子部件安装部中的每一个上通过所述粘合剂固定一个所述电子部件的步骤；
其中，当在所述多个电子部件安装部中的每一个上设置所述粘合剂时，在N是等于或者大于2的整数的情况下，在待安装第N个电子部件的安装部上设置的粘合剂的体积重心向一方向偏移，该方向为更靠近待安装第N-1个或之前的电子部件的安装部的方向，所述待安装第N-1个或之前的电子部件的安装部邻近并毗邻所述待安装第N个电子部件的安装部。
2.如权利要求1所述的安装电子部件的方法，其中，
对在所述待安装第N个电子部件的安装部上设置的粘合剂的体积重心进行设置，以使其以朝向所述待安装第N-1个或之前的电子部件的安装部中的一个毗邻安装部的区域中心的方向偏移。
3.如权利要求1所述的安装电子部件的方法，其中，
通过分配方法设置所述粘合剂；以及
将所述粘合剂分配在所述布线板的电子部件安装部上的图案中。
4.如权利要求3所述的安装电子部件的方法，其中，
分配在图案中的所述粘合剂具有为线形或圆形的图案结构。
5.如权利要求3所述的安装电子部件的方法，其中，
在分配于所述待安装第N个电子部件的安装部上的图案中的粘合剂中，至少设置在所述待安装第N个电子部件的安装部的中心或中心附近的粘合剂以如下方式来分配：使其对应于正安装第N-1个或之前的电子部件时从抽吸工具喷射出的压缩气体。
6.如权利要求1所述的安装电子部件的方法，其中，
在固定所述电子部件的步骤中，加热所述布线板和形成在所述布线板的每一所述电子部件安装部上的所述粘合剂。
7.如权利要求1所述的安装电子部件的方法，其中，
所述布线板的电子部件安装部具有矩形结构。
8.如权利要求1所述的安装电子部件的方法，其中，
所述电子部件为具有主表面的半导体元件，所述主表面设置有外部连接端子。
9.如权利要求1所述的安装电子部件的方法，还包括：
在所述电子部件安装部上安装所述电子部件之后，为每个电子部件安装部切割所述布线板的步骤。
10.如权利要求1所述的安装电子部件的方法，其中，
在所述布线板上形成多个插件板组件；
在所述插件板组件上安装所述电子部件之后，为每个插件板组件切割所述布线板。
11.一种安装电子部件的方法，包括：
在布线板上的多个电子部件安装部中的每一个上设置粘合剂的步骤；以及
在所述多个电子部件安装部中的每一个上通过所述粘合剂固定一个所述电子部件的步骤；
其中，当在所述多个电子部件安装部中的每一个上设置所述粘合剂后，在利用喷射压缩气体的抽吸工具安装第N-1个或第N-1个之前的电子部件时，设置于待安装第N个电子部件的安装部上的粘合剂的体积重心以远离所述第N-1个或第N-1个之前的电子部件的安装部的方向移动至待安装第N个电子部件的安装部的中心部；
其中，N是等于或者大于2的整数。
12.如权利要求11所述的安装电子部件的方法，其中，
所述粘合剂为热固性树脂，
所述抽吸工具包括加热部；以及
在固定所述电子部件的步骤中，当通过所述加热部加热所述电子部件时，降低所述抽吸工具。
13.一种安装电子部件的方法，包括：
在布线板上的多个电子部件安装部中的每一个上设置粘合剂的步骤；以
及
在所述多个电子部件安装部中的每一个上通过所述粘合剂固定一个所述电子部件的步骤；
其中，当在所述多个电子部件安装部中的每一个上设置所述粘合剂时，在N是等于或者大于2的整数的情况下，在待安装第N个电子部件的安装部上设置的粘合剂的体积重心向一方向偏移，该方向为指向待安装第N-1个或之前的电子部件的多个安装部的区域中心的矢量和的方向，所述待安装第N-1个或之前的电子部件的多个安装部毗邻所述待安装第N个电子部件的安装部。
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US9368374B2 (en) 2009-02-27 2016-06-14 Dexerials Corporation Method of manufacturing semiconductor device
US10568210B2 (en) 2015-09-02 2020-02-18 At & S Austria Technologie & Systemtechnik Aktiengesellschaft Electronic device with embedded electronic component
DE102016114463B4 (de) 2016-08-04 2019-10-17 Infineon Technologies Ag Die-befestigungsverfahren und halbleiterbauelemente, die auf der grundlage solcher verfahren hergestellt werden
JP7127269B2 (ja) * 2017-10-23 2022-08-30 昭和電工マテリアルズ株式会社 部材接続方法
KR102074951B1 (ko) 2019-07-11 2020-02-07 이연수 공기환경개선장치

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4593462A (en) * 1984-09-24 1986-06-10 Tdk Corporation Apparatus for automatically mounting chip-type circuit elements on substrate
JPH07109957B2 (ja) * 1988-06-21 1995-11-22 松下電器産業株式会社 電子部品装着方法
JPH0283945A (ja) * 1988-09-21 1990-03-26 Oki Electric Ind Co Ltd 樹脂コーティング装置
JPH0567648A (ja) * 1991-09-09 1993-03-19 Fujitsu Ltd 半導体実装方法とその装置
JPH08316690A (ja) * 1995-05-18 1996-11-29 Fuji Mach Mfg Co Ltd 電子部品取外し装置
AU6015596A (en) * 1995-06-13 1997-01-09 Hitachi Chemical Company, Ltd. Semiconductor device, wiring board for mounting semiconducto r and method of production of semiconductor device
JPH10125724A (ja) * 1996-10-16 1998-05-15 Matsushita Electric Ind Co Ltd フリップチップのボンディング方法
JP3416032B2 (ja) * 1997-09-08 2003-06-16 富士通株式会社 接着剤塗布方法、接着剤塗布装置、及び半導体部品実装方法
JP2997231B2 (ja) * 1997-09-12 2000-01-11 富士通株式会社 マルチ半導体ベアチップ実装モジュールの製造方法
DE69831101T2 (de) 1997-10-02 2006-06-08 Matsushita Electric Industrial Co., Ltd., Kadoma Montagemethode für Halbleiterbauteile auf einer Leiterplatte
JPH11176849A (ja) 1997-12-05 1999-07-02 Mitsui High Tec Inc 半導体装置の製造方法
SG83785A1 (en) * 1999-04-30 2001-10-16 Esec Trading Sa Apparatus and method for mounting semiconductor chips on a substrate
JP2001044241A (ja) 1999-07-30 2001-02-16 Toppan Forms Co Ltd Ｉｃチップの実装方法
JP2001217388A (ja) * 2000-02-01 2001-08-10 Sony Corp 電子装置およびその製造方法
SG97938A1 (en) * 2000-09-21 2003-08-20 Micron Technology Inc Method to prevent die attach adhesive contamination in stacked chips
JP2005123322A (ja) * 2003-10-15 2005-05-12 Matsushita Electric Ind Co Ltd 半導体製造装置および製造方法
JP3798003B2 (ja) * 2004-02-05 2006-07-19 沖電気工業株式会社 ダイスボンド装置及びダイスボンド方法
JP4215685B2 (ja) 2004-06-10 2009-01-28 シャープ株式会社 電子回路素子の製造方法
CN100562980C (zh) * 2005-10-06 2009-11-25 富士通微电子株式会社 半导体器件及其制造方法

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TW200834759A (en) 2008-08-16
CN101246826A (zh) 2008-08-20
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US20080196245A1 (en) 2008-08-21

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