CN101199024B - 利用改变字线条件来补偿较慢擦除的存储器单元以擦除非易失性存储器 - Google Patents
利用改变字线条件来补偿较慢擦除的存储器单元以擦除非易失性存储器 Download PDFInfo
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- CN101199024B CN101199024B CN2006800099947A CN200680009994A CN101199024B CN 101199024 B CN101199024 B CN 101199024B CN 2006800099947 A CN2006800099947 A CN 2006800099947A CN 200680009994 A CN200680009994 A CN 200680009994A CN 101199024 B CN101199024 B CN 101199024B
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- memory device
- volatile memory
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- voltage
- memory cell
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-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/344—Arrangements for verifying correct erasure or for detecting overerased cells
- G11C16/3445—Circuits or methods to verify correct erasure of nonvolatile memory cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
- G11C11/5635—Erasing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/08—Address circuits; Decoders; Word-line control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/12—Programming voltage switching circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
- G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3404—Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3404—Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
- G11C16/3409—Circuits or methods to recover overerased nonvolatile memory cells detected during erase verification, usually by means of a "soft" programming step
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/344—Arrangements for verifying correct erasure or for detecting overerased cells
- G11C16/345—Circuits or methods to detect overerased nonvolatile memory cells, usually during erasure verification
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
- G11C16/3472—Circuits or methods to verify correct erasure of nonvolatile memory cells whilst erasing is in progress, e.g. by detecting onset or cessation of current flow in cells and using the detector output to terminate erasure
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
- G11C16/3477—Circuits or methods to prevent overerasing of nonvolatile memory cells, e.g. by detecting onset or cessation of current flow in cells and using the detector output to terminate erasing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/562—Multilevel memory programming aspects
- G11C2211/5621—Multilevel programming verification
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
- G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
- G11C2216/18—Flash erasure of all the cells in an array, sector or block simultaneously
Abstract
Description
Claims (27)
Applications Claiming Priority (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US66704305P | 2005-03-31 | 2005-03-31 | |
US60/667,043 | 2005-03-31 | ||
US11/295,755 US7430138B2 (en) | 2005-03-31 | 2005-12-06 | Erasing non-volatile memory utilizing changing word line conditions to compensate for slower erasing memory cells |
US11/295,755 | 2005-12-06 | ||
US11/296,032 US7403428B2 (en) | 2005-03-31 | 2005-12-06 | Systems for erasing non-volatile memory utilizing changing word line conditions to compensate for slower erasing memory cells |
US11/296,032 | 2005-12-06 | ||
PCT/US2006/011651 WO2006124122A2 (en) | 2005-03-31 | 2006-03-29 | Erasing non-volatile memory utilizing changing word line conditions to compensate for slower frasing memory cells |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101199024A CN101199024A (zh) | 2008-06-11 |
CN101199024B true CN101199024B (zh) | 2010-09-01 |
Family
ID=37074447
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2006800099947A Active CN101199024B (zh) | 2005-03-31 | 2006-03-29 | 利用改变字线条件来补偿较慢擦除的存储器单元以擦除非易失性存储器 |
Country Status (8)
Country | Link |
---|---|
EP (1) | EP1864292B1 (zh) |
JP (1) | JP4762305B2 (zh) |
KR (1) | KR100909720B1 (zh) |
CN (1) | CN101199024B (zh) |
AT (1) | ATE457518T1 (zh) |
DE (1) | DE602006012170D1 (zh) |
TW (1) | TWI319878B (zh) |
WO (1) | WO2006124122A2 (zh) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2057635B1 (en) * | 2006-10-13 | 2014-03-19 | SanDisk Technologies Inc. | Partitioned erase and erase verification in non-volatile memory |
US7639540B2 (en) * | 2007-02-16 | 2009-12-29 | Mosaid Technologies Incorporated | Non-volatile semiconductor memory having multiple external power supplies |
KR100960479B1 (ko) * | 2007-12-24 | 2010-06-01 | 주식회사 하이닉스반도체 | 플래시 메모리 장치 및 동작 방법 |
JP4975794B2 (ja) | 2009-09-16 | 2012-07-11 | 株式会社東芝 | 不揮発性半導体記憶装置 |
KR101972167B1 (ko) * | 2012-05-29 | 2019-04-24 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 및 그것의 동작 방법 |
KR102218735B1 (ko) | 2014-01-21 | 2021-02-23 | 삼성전자주식회사 | 불휘발성 메모리 장치를 포함하는 메모리 시스템 및 그것의 소거 방법 |
US9652381B2 (en) * | 2014-06-19 | 2017-05-16 | Sandisk Technologies Llc | Sub-block garbage collection |
JP5952366B2 (ja) | 2014-10-02 | 2016-07-13 | ウィンボンド エレクトロニクス コーポレーション | 高信頼性不揮発性半導体メモリ |
JP5883494B1 (ja) * | 2014-11-19 | 2016-03-15 | ウィンボンド エレクトロニクス コーポレーション | 不揮発性半導体記憶装置 |
KR102347182B1 (ko) | 2015-09-04 | 2022-01-04 | 삼성전자주식회사 | 메모리 장치, 메모리 시스템, 상기 메모리 장치의 동작 방법 및 상기 메모리 시스템의 동작 방법 |
CN105976867A (zh) * | 2016-07-06 | 2016-09-28 | 北京兆易创新科技股份有限公司 | 一种存储单元的擦除方法 |
KR102545044B1 (ko) * | 2018-06-01 | 2023-06-19 | 삼성전자주식회사 | 비휘발성 메모리 장치의 데이터 소거 방법 및 이를 수행하는 비휘발성 메모리 장치 |
KR20220019547A (ko) * | 2020-08-10 | 2022-02-17 | 삼성전자주식회사 | 불휘발성 메모리 장치를 포함하는 메모리 시스템 및 이의 소거 방법 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5576993A (en) * | 1995-05-05 | 1996-11-19 | United Microelectronics Corporation | Flash memory array with self-limiting erase |
US6249459B1 (en) * | 1999-06-24 | 2001-06-19 | Amic Technology, Inc. | Circuit and method for equalizing erase rate of non-volatile memory cells |
US6452840B1 (en) * | 2000-10-21 | 2002-09-17 | Advanced Micro Devices, Inc. | Feedback method to optimize electric field during channel erase of flash memory devices |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5995417A (en) * | 1998-10-20 | 1999-11-30 | Advanced Micro Devices, Inc. | Scheme for page erase and erase verify in a non-volatile memory array |
JP4641697B2 (ja) * | 1999-12-17 | 2011-03-02 | スパンション エルエルシー | 信頼性の改善のためにeepromの消去中に減じられた一定の電界を提供するための方法 |
KR100414146B1 (ko) * | 2000-06-27 | 2004-01-13 | 주식회사 하이닉스반도체 | 플래쉬 메모리 소자의 소거 방법 |
JP4005895B2 (ja) * | 2002-09-30 | 2007-11-14 | 株式会社東芝 | 不揮発性半導体メモリ装置 |
-
2006
- 2006-03-29 CN CN2006800099947A patent/CN101199024B/zh active Active
- 2006-03-29 WO PCT/US2006/011651 patent/WO2006124122A2/en active Application Filing
- 2006-03-29 KR KR1020077023541A patent/KR100909720B1/ko active IP Right Grant
- 2006-03-29 DE DE602006012170T patent/DE602006012170D1/de active Active
- 2006-03-29 JP JP2008504364A patent/JP4762305B2/ja not_active Expired - Fee Related
- 2006-03-29 AT AT06784329T patent/ATE457518T1/de not_active IP Right Cessation
- 2006-03-29 EP EP06784329A patent/EP1864292B1/en active Active
- 2006-03-31 TW TW095111549A patent/TWI319878B/zh not_active IP Right Cessation
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5576993A (en) * | 1995-05-05 | 1996-11-19 | United Microelectronics Corporation | Flash memory array with self-limiting erase |
US6249459B1 (en) * | 1999-06-24 | 2001-06-19 | Amic Technology, Inc. | Circuit and method for equalizing erase rate of non-volatile memory cells |
US6452840B1 (en) * | 2000-10-21 | 2002-09-17 | Advanced Micro Devices, Inc. | Feedback method to optimize electric field during channel erase of flash memory devices |
Also Published As
Publication number | Publication date |
---|---|
CN101199024A (zh) | 2008-06-11 |
EP1864292A2 (en) | 2007-12-12 |
TWI319878B (en) | 2010-01-21 |
JP2008536249A (ja) | 2008-09-04 |
TW200703339A (en) | 2007-01-16 |
DE602006012170D1 (de) | 2010-03-25 |
KR20080044203A (ko) | 2008-05-20 |
ATE457518T1 (de) | 2010-02-15 |
EP1864292B1 (en) | 2010-02-10 |
WO2006124122A2 (en) | 2006-11-23 |
JP4762305B2 (ja) | 2011-08-31 |
WO2006124122A3 (en) | 2006-12-28 |
KR100909720B1 (ko) | 2009-07-29 |
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