CN101133491A - 不含铅且多层被预镀敷的引线框 - Google Patents

不含铅且多层被预镀敷的引线框 Download PDF

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CN101133491A
CN101133491A CNA2005800488777A CN200580048877A CN101133491A CN 101133491 A CN101133491 A CN 101133491A CN A2005800488777 A CNA2005800488777 A CN A2005800488777A CN 200580048877 A CN200580048877 A CN 200580048877A CN 101133491 A CN101133491 A CN 101133491A
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layer
metal
matrix metal
lead frame
plating
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唐纳德·C·阿博特
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Texas Instruments Inc
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Texas Instruments Inc
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Abstract

本发明提供一种引线框，其具有基质金属(105)、所述基质金属上的镍层(201)、所述镍层上的钯层(202)，和与所述钯层接触的最外锡层(203)，在所述锡层上的选定区域上具有开口和银层(330)。

Description

不含铅且多层被预镀敷的引线框
技术领域
本发明一般涉及半导体装置和工艺的领域，且更明确地说，涉及用于半导体装置的引线框的材料和制造。
背景技术
用于半导体装置的引线框提供稳定的支撑衬垫以用于在封装内稳固地定位半导体芯片(通常为集成电路(IC)芯片)。由于所述引线框(包含衬垫)是由导电材料制成的，所以所述衬垫在需要时可被偏置到包括半导体装置的网络所需的任何电位，尤其是接地电位。
另外，引线框提供多个导电区段，以使各种电导体紧密接近芯片。所述区段的内部末端与IC表面上的接触衬垫之间的剩余间隙是桥接连接器，通常为个别地接合到IC接触衬垫和引线框区段的细金属线。因此，内部区段末端的表面必须适合缝线附接连接器。
同样，引线区段远离IC芯片的末端(“外部”末端)需要电连接和机械连接到外部电路，以(例如)组装印制电路板。在许多电子应用中，通过焊接(常规上在210到220℃范围中的回流温度下用铅锡(Pb/Sn)低共熔焊料)执行此附接。因此，外部区段末端的表面必须对回流金属或合金具有亲和力。
最终，引线框提供用于密封敏感芯片和易坏连接线的框架。使用塑料材料(而不是金属罐或陶瓷)进行密封已由于低成本的缘故而成为优选的方法。175℃下的用于环氧树脂基热固化合物的传递模制工艺已实践多年。用于模制和模具固化(聚合作用)的175℃的温度与用于低共熔焊料回流的210到220℃的温度兼容。
潮湿环境中的可靠性测试需要模制化合物对引线框和其密封的装置零件具有良好的粘附力。两个有助于良好粘附力的主要因素是模具化合物对引线框的金属的化学亲和力和引线框的表面制备。
在电子产业中避免Pb并使用不含Pb焊料的最近的一般趋势将回流温度范围推进到约260℃的附近。此较高的回流温度范围使得更加难以维持模具化合物对引线框的粘附力。对于QFN(四方扁平无引线)和SON(小外形无引线)装置中具有的非常小的引线框表面来说尤其如此。对于此温度范围，已知的引线框无法以良好的粘附力结合低成本、简单的可制造性和对晶须的避免来提供金属化。
一般惯例是由薄(约120到250μm)金属片制造单片引线框。出于易于制造的原因，一般选择的起始金属是铜、铜合金和铁镍合金(例如，所谓的“合金42”)。从原始的片中蚀刻或压印出引线框的所需形状。以此方式，引线框的个别区段采用薄金属条带的形式，且通过设计来确定其特定的几何形状。对于大多数情况，典型区段的长度显著地长于其宽度。
发明内容
因此需要一种低成本、可靠的引线框，其结合了对模具化合物的粘附力、用于连接线的可接合性、暴露的引线框区段的可焊接性，以及没有锡树突生长的风险。当引线框和其制造方法具有低成本，且足够灵活而可应用于不同的半导体产品系列和广泛范围的设计和组装变化，并实现朝着改进的工艺良率和装置可靠性的目标的改进时，存在许多技术优势。当使用安装好的设备基础实现这些创新从而不需要投资于新的制造机器时，存在进一步的技术优势。
本发明的一个实施例是具有由基质金属制成的结构的引线框，其中所述结构具有多个表面。这些表面中的每一者上的是粘附到基质金属的堆叠中的金属层。所述堆叠包括与基质金属接触的镍层、与镍层接触的钯层和与钯层接触的最外锡层。
在优选的层厚度方面，镍层的厚度在约0.5与2.0μm之间，钯层的厚度在约5与150nm之间，且锡层的厚度小于约5nm，优选为约3nm。在此厚度处，锡不能形成晶须，但提供对聚合密封材料的极好的粘附力，用于可靠的缝线接合的改进的特征，以及对回流金属(焊料)的亲和力。通过替代常规的金层，锡层提供低成本的替代方案。
本发明的另一实施例是半导体装置，其具有具有由基质金属制成的结构的引线框，其中所述结构包括芯片安装衬垫和多个引线区段。所述基质金属依次具有与基质金属接触的粘附的镍层、与镍层接触的钯层和与钯层接触的最外锡层。半导体芯片附接到所述安装衬垫，且导电连接系住芯片和引线区段。聚合密封材料覆盖所述芯片、连接件和引线区段的部分。
本发明的另一实施例是一种用于制造引线框的方法，其中提供具有多个表面的基质金属结构。在结构表面的每一者上镀敷粘附到基质金属的金属层堆叠。这个镀敷步骤包括：镀敷镍层，其厚度在约0.5与2.0μm之间，并与基质金属接触；接下来，镀敷钯层，其厚度在约5与150nm之间，并与镍层接触；且最后镀敷锡层，其厚度小于约5nm，并与钯层接触。可在没有掩盖或选择性镀敷的情况下执行所有三个镀敷步骤。
以下属于本发明的技术优势：没有毒性或形成晶须的材料用于镀敷步骤，提高向下接合的能力，并改进湿度水平质量。此外，所需的镀敷过程较廉价且易于制造。
附图说明
图1是具有所形成的引线框结构的引线框条带的一部分的基质金属结构的示意性截面。
图2说明具有基质金属结构和多个表面的引线框条带部分的示意性截面，其中所述表面已镀敷有根据本发明的粘附层堆叠。
图3说明本发明的装置实施例，示意性截面展示根据本发明的实施例制备的引线框条带的一部分，和组装并密封在一个引线框表面上的多个半导体芯片。
具体实施方式
图1是引线框部分的示意性和简化的截面，所述引线框部分概括表示为100。所述引线框具有多个表面：第一表面101、第二表面102，和多个侧边表面110a、110b……110n。虽然表面101和102源自起始材料薄片，但已通过引线框结构的形成工艺产生侧边表面110a到110n。所描绘的引线框部分含有多个芯片安装衬垫103和多个引线区段104。所述引线框由基质金属105制成。
如本文中所界定，引线框的起始材料被称作“基质金属”，其指示金属类型。因此，不应以电化学意义(如与“贵重金属”相对)或结构意义来理解术语“基质金属”。
基质金属105通常为铜或铜合金。其它选择包括黄铜、铝、铁镍合金(“合金42”)和科瓦铁镍钴合金(Kovar)。
基质金属105源于优选厚度范围为从100到300μm的金属片，更薄的薄片也是可以的。此厚度范围中的延展性提供5到15％的延长，这有助于某些已完成装置所需要的区段弯曲和成形操作。从起始金属片压印或蚀刻引线框部件(例如，芯片安装衬垫、引线区段、连接轨道(图1中未示，但由虚线示意))。如所述，这些压印或蚀刻过程产生引线框部件的许多侧边110a、110b……110n。
图2说明根据本发明的实施例的引线框的示意性截面。引线框结构具有基质金属105，其具有由压印或蚀刻工艺产生的多个表面。金属层堆叠粘附到结构表面中的每一者。所述堆叠包括：与基质金属105接触的镍层201，所述镍层的优选厚度范围是在约0.5与2.0μm之间；接下来是与镍层接触的钯层202，所述钯层的优选厚度范围是在约5与150nm之间。最后，最外层203是与钯层接触的薄锡层，所述锡层的优选厚度小于约5nm，最优选为约3nm。最外薄锡显著地提高对聚合密封剂(例如，聚酰亚胺和环氧树脂)的粘附力，对于某些模制化合物来说，已测量到与常规上常使用的金层相比提高了15倍的粘附力。另外，锡层支持钯对例如焊料(优选为锡和例如锡/银/铜的锡合金)等回流金属的亲和力。此外，锡层的薄度允许对钯的可靠的线缝线接合(例如，金线)，且由于其薄度的缘故而不存在生长出晶须的可能。
因为所有这些金属层均匀地覆盖引线框表面，因此优选通过镀敷整个引线框条带(参看下文)来实现层沉积，且可避免掩模。然而，如果某些装置需要锡层在选定区域中具有多个窗口，以便暴露下面的钯来用于特殊的金属接合，那么必须用施加到引线框表面101的掩模来镀敷锡层。所得窗口的实例在图2中用240表示。
在另一实施例中，某些线缝线接合可能在在锡层上的选定区域中需要额外的银层。在这种情况下，必须使用掩模(参看下文)镀敷银。所得的选定银点在图2中用230表示。
本发明的另一实施例是半导体装置，如图3中的四方扁平无引线(QFN)和小外形无引线(SON)装置所示范。实际上，图3展示在单体化之前具有多个经组装和封装装置的引线框条带。在本发明的实施例中，所述装置具有一种引线框，所述引线框具有基质金属301以及第一表面301a和第二表面301b。基质金属的一个实例是铜。此外，引线框被结构化成芯片安装衬垫302和多个引线区段303。每一引线区段具有靠近芯片安装衬垫302的第一末端303a和远离安装衬垫302的第二末端303b。
第一引线框表面301a、第二引线框表面301b和所有侧边都被层堆叠覆盖，所述层堆叠向引线框提供对聚合材料的可靠的粘附力以及对回流金属的亲和力。层堆叠包括与基质金属接触的镍层304、与镍层接触的钯层305，和与钯层接触的最外锡层306。
通过粘附层311将半导体芯片310(例如，集成电路芯片)附接到每一芯片安装衬垫302。接合线312使芯片310与引线区段303的第一末端303a互连。缝线接合312a被焊接到最外锡层306，其中其通常突破锡层，并实际上附接到钯层305。在某些实施例中，选择性的银区域330支持线312的缝线附接。在其它实施例中，建议在最外锡层306中保留窗口340以用于缝线附接到钯层305。
聚合密封材料320(例如，环氧树脂基模制化合物)覆盖芯片310、接合线312和引线区段的第一末端303a。聚合材料320还填充芯片310与引线区段的第一末端之间的间隙，并因此覆盖引线框侧边。因此，聚合材料320还在与最外表面层306相同的平面中形成表面321。
回流金属可覆盖第二引线框表面的某些部分或全部。举例来说，锡合金可覆盖引线区段的至少第二末端，或者替代地覆盖所有的引线区段和暴露的外部芯片衬垫表面。
在图3中，虚线330指示锯子将把完成的引线框条带切割成个别装置的位置。所述锯子切割穿过密封材料320并且还穿过引线框区段。
本发明的另一实施例是用于制造引线框的方法，其开始于向基质金属结构提供多个表面的步骤，且继续为在这些表面上镀敷金属层的步骤。连续的镀敷步骤的顺序是：
在基质金属上镀敷厚度范围在从约0.5到2.0μm的镍层。
在镍层上镀敷厚度范围在从约5到150nm的钯层。
在钯层上镀敷厚度范围在从约5到2nm的锡层。
本发明的某些实施例需要选择性的镀敷。这些实施例的实例是在选定区域中在锡层上需要额外的银层的装置，或在锡层中需要窗口以便暴露下面的钯的装置。只要上述方法需要在引线框上选择性地沉积一金属层，便使用廉价的、临时的掩盖步骤，其仅使期望用以接纳金属层的那些引线框部分暴露。由于较快的镀敷时间，所以可考虑常规的选择性的点镀敷技术，尤其是可再使用的橡胶掩模。对于薄金属镀敷，轮盘系统是优选的。
虽然已参考说明性实施例描述了本发明，但此描述并不期望以限制意义来解释。通过参考描述内容，所属领域的技术人员将容易了解说明性实施例的各种修改和组合，以及本发明的其它实施例。举例来说，本发明适用于使用任何类型的半导体芯片、离散或集成电路的产品，且半导体芯片的材料可包括硅、硅锗、砷化镓，或用于集成电路制造中的任何其它半导体或复合材料。
作为另一实例，从基质金属片压印引线框的加工步骤之后可为选择性蚀刻尤其是对暴露的基质金属表面的选择性蚀刻的工序，以便产生大面积的有轮廓的表面以实现对模制化合物的改进的粘附力。根据本发明的镀敷层的序列可容纳任何此类特殊蚀刻的引线框基底结构。
因此，期望所界定的本发明涵盖任何此类修改或实施例。

Claims (9)

1.一种引线框条带，其包括：
由基质金属制成的结构，所述结构具有多个表面；以及
金属层堆叠，其在所述结构表面中的每一者上粘附到所述基质金属，所述堆叠依次包括：
镍层，其大体上覆盖所述整个基质金属表面；
钯层，其大体上覆盖所述整个镍层；以及
最外锡层，其大体上覆盖所述整个钯层。
2.根据权利要求1所述的引线框，其中所述基质金属是从由铜、铜合金、铝、铁镍合金和科瓦铁镍钴合金组成的群组中选出的。
3.根据权利要求1或2所述的引线框，其进一步在所述第一表面上具有适合金属焊接和接合的银层的选择性区域。
4.根据权利要求1-4中任一权利要求所述的引线框，其中所述最外锡层在选定区域中具有多个窗口，以便暴露所述下面的钯以助于金属接合附接。
5.一种半导体装置，其包括：
引线框，其具有由基质金属制成的结构，所述结构包括芯片安装衬垫和多个引线区段；
所述基质金属依次具有：大体上覆盖所述基质金属的镍层、大体上覆盖所述镍层的钯，和大体上覆盖所述钯层的最外锡层，所述基质金属在所述装置的多个外侧处暴露；
半导体芯片，其附接到所述安装衬垫；
从所述芯片到所述引线区段的导电连接件；以及
聚合密封材料，其覆盖所述芯片、所述连接件和所述引线区段的部分。
6.根据权利要求5所述的装置，其进一步包括所述区段的未由所述密封材料覆盖的那些部分上的回流金属。
7.一种用于制造引线框的方法，其包括以下步骤：
提供具有多个表面的结构化基质金属条带；以及
在所述结构化表面中的每一者上镀敷粘附到所述基质金属的金属层堆叠，所述步骤依次包括：
镀敷大体上覆盖所述基质金属的镍层；
镀敷大体上覆盖所述镍层的钯层；以及
镀敷大体上覆盖所述钯层的最外锡层。
8.根据权利要求7所述的方法，其进一步包括以下步骤：镀敷所述锡层以使得其留下向下面的钯层敞开的选定窗口。
9.根据权利要求7或8所述的方法，其进一步包括以下步骤：选择性地镀敷与所述锡层接触的银层。
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US7872336B2 (en) 2011-01-18
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