CN100536094C - 制作具有含凹口的控制电极的半导体器件的方法及其结构 - Google Patents

制作具有含凹口的控制电极的半导体器件的方法及其结构 Download PDF

Info

Publication number
CN100536094C
CN100536094C CNB2005800097006A CN200580009700A CN100536094C CN 100536094 C CN100536094 C CN 100536094C CN B2005800097006 A CNB2005800097006 A CN B2005800097006A CN 200580009700 A CN200580009700 A CN 200580009700A CN 100536094 C CN100536094 C CN 100536094C
Authority
CN
China
Prior art keywords
conductive layer
insulating layer
patterned
patterned conductive
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB2005800097006A
Other languages
English (en)
Chinese (zh)
Other versions
CN101091239A (zh
Inventor
马瑞斯·K.·奥罗斯基
詹姆斯·D.·伯纳特
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of CN101091239A publication Critical patent/CN101091239A/zh
Application granted granted Critical
Publication of CN100536094C publication Critical patent/CN100536094C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28114—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor characterised by the sectional shape, e.g. T, inverted-T

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Memories (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)
CNB2005800097006A 2004-03-26 2005-01-21 制作具有含凹口的控制电极的半导体器件的方法及其结构 Expired - Fee Related CN100536094C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/811,461 US7105430B2 (en) 2004-03-26 2004-03-26 Method for forming a semiconductor device having a notched control electrode and structure thereof
US10/811,461 2004-03-26

Publications (2)

Publication Number Publication Date
CN101091239A CN101091239A (zh) 2007-12-19
CN100536094C true CN100536094C (zh) 2009-09-02

Family

ID=34990536

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2005800097006A Expired - Fee Related CN100536094C (zh) 2004-03-26 2005-01-21 制作具有含凹口的控制电极的半导体器件的方法及其结构

Country Status (5)

Country Link
US (1) US7105430B2 (enExample)
EP (1) EP1728274A4 (enExample)
JP (1) JP5025462B2 (enExample)
CN (1) CN100536094C (enExample)
WO (1) WO2005104225A2 (enExample)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1320629C (zh) * 2004-06-28 2007-06-06 中芯国际集成电路制造(上海)有限公司 集成电路器件形成隔离物后修复等离子体损伤的方法
US8993055B2 (en) 2005-10-27 2015-03-31 Asm International N.V. Enhanced thin film deposition
US8053849B2 (en) * 2005-11-09 2011-11-08 Advanced Micro Devices, Inc. Replacement metal gate transistors with reduced gate oxide leakage
EP1906461B1 (de) * 2006-09-26 2020-03-18 OSRAM Opto Semiconductors GmbH Verfahren zur Herstellung eines optoelektronischen Bauelements und optoelektronisches Bauelement
KR101263648B1 (ko) * 2007-08-31 2013-05-21 삼성전자주식회사 핀 전계 효과 트랜지스터 및 그 제조 방법.
JP2010027638A (ja) * 2008-07-15 2010-02-04 Sumitomo Electric Ind Ltd 半導体装置の製造方法および半導体装置
WO2010023608A2 (en) * 2008-08-25 2010-03-04 Nxp B.V. Low cost mos transistor for rf applications
US9128699B2 (en) * 2008-12-22 2015-09-08 Intel Corporation Method and system for queuing transfers of multiple non-contiguous address ranges with a single command
DE102010042229B4 (de) * 2010-10-08 2012-10-25 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Verfahren zum Steigern der Integrität eines Gatestapels mit großem ε durch Erzeugen einer gesteuerten Unterhöhlung auf der Grundlage einer Nasschemie und mit den Verfahren hergestellter Transistor
US9166004B2 (en) 2010-12-23 2015-10-20 Intel Corporation Semiconductor device contacts
US8383469B2 (en) * 2011-01-07 2013-02-26 Eastman Kodak Company Producing transistor including reduced channel length
US8314022B1 (en) * 2011-05-20 2012-11-20 Intermolecular, Inc. Method for etching gate stack
KR20150113009A (ko) * 2013-02-01 2015-10-07 피에스4 뤽스코 에스.에이.알.엘. 반도체 장치 및 그 제조 방법
US9412602B2 (en) 2013-03-13 2016-08-09 Asm Ip Holding B.V. Deposition of smooth metal nitride films
US8841182B1 (en) 2013-03-14 2014-09-23 Asm Ip Holding B.V. Silane and borane treatments for titanium carbide films
US8846550B1 (en) 2013-03-14 2014-09-30 Asm Ip Holding B.V. Silane or borane treatment of metal thin films
US9394609B2 (en) 2014-02-13 2016-07-19 Asm Ip Holding B.V. Atomic layer deposition of aluminum fluoride thin films
US10643925B2 (en) 2014-04-17 2020-05-05 Asm Ip Holding B.V. Fluorine-containing conductive films
KR102216575B1 (ko) 2014-10-23 2021-02-18 에이에스엠 아이피 홀딩 비.브이. 티타늄 알루미늄 및 탄탈륨 알루미늄 박막들
US9941425B2 (en) 2015-10-16 2018-04-10 Asm Ip Holdings B.V. Photoactive devices and materials
US9786492B2 (en) 2015-11-12 2017-10-10 Asm Ip Holding B.V. Formation of SiOCN thin films
US9786491B2 (en) 2015-11-12 2017-10-10 Asm Ip Holding B.V. Formation of SiOCN thin films
KR102378021B1 (ko) 2016-05-06 2022-03-23 에이에스엠 아이피 홀딩 비.브이. SiOC 박막의 형성
US10186420B2 (en) 2016-11-29 2019-01-22 Asm Ip Holding B.V. Formation of silicon-containing thin films
US10847529B2 (en) 2017-04-13 2020-11-24 Asm Ip Holding B.V. Substrate processing method and device manufactured by the same
US10504901B2 (en) 2017-04-26 2019-12-10 Asm Ip Holding B.V. Substrate processing method and device manufactured using the same
CN114875388A (zh) 2017-05-05 2022-08-09 Asm Ip 控股有限公司 用于受控形成含氧薄膜的等离子体增强沉积方法
TWI761636B (zh) 2017-12-04 2022-04-21 荷蘭商Ａｓｍ Ｉｐ控股公司 電漿增強型原子層沉積製程及沉積碳氧化矽薄膜的方法
US12359315B2 (en) 2019-02-14 2025-07-15 Asm Ip Holding B.V. Deposition of oxides and nitrides
US12142479B2 (en) 2020-01-17 2024-11-12 Asm Ip Holding B.V. Formation of SiOCN thin films
US12341005B2 (en) 2020-01-17 2025-06-24 Asm Ip Holding B.V. Formation of SiCN thin films

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6225168B1 (en) * 1998-06-04 2001-05-01 Advanced Micro Devices, Inc. Semiconductor device having metal gate electrode and titanium or tantalum nitride gate dielectric barrier layer and process of fabrication thereof
US6399469B1 (en) * 2000-07-10 2002-06-04 Advanced Micro Devices, Inc. Fabrication of a notched gate structure for a field effect transistor using a single patterning and etch process

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6635853B2 (en) * 1909-08-09 2003-10-21 Ibiden Co., Ltd. Hot plate unit
US5543646A (en) 1988-09-08 1996-08-06 Mitsubishi Denki Kabushiki Kaisha Field effect transistor with a shaped gate electrode
JP3350246B2 (ja) * 1994-09-30 2002-11-25 株式会社東芝 半導体装置の製造方法
KR100207472B1 (ko) * 1996-06-07 1999-07-15 윤종용 티타늄 질화막 적층 구조의 게이트 전극을 갖춘 반도체장치 및 그 제조 방법
AU2169200A (en) 1998-12-07 2000-06-26 Intel Corporation Transistor with notched gate
US6596598B1 (en) * 2000-02-23 2003-07-22 Advanced Micro Devices, Inc. T-shaped gate device and method for making
JP4447128B2 (ja) 2000-07-12 2010-04-07 富士通マイクロエレクトロニクス株式会社 絶縁ゲート型半導体装置の製造方法
US6403456B1 (en) * 2000-08-22 2002-06-11 Advanced Micro Devices, Inc. T or T/Y gate formation using trim etch processing
US6440830B1 (en) * 2000-08-30 2002-08-27 Advanced Micro Devices, Inc. Method of copper-polysilicon gate formation
US6645840B2 (en) 2000-10-19 2003-11-11 Texas Instruments Incorporated Multi-layered polysilicon process
US6646326B1 (en) 2000-11-15 2003-11-11 Advanced Micro Devices, Inc. Method and system for providing source/drain-gate spatial overlap engineering for low-power devices
US6891235B1 (en) * 2000-11-15 2005-05-10 International Business Machines Corporation FET with T-shaped gate
JP4628644B2 (ja) * 2001-10-04 2011-02-09 富士通セミコンダクター株式会社 半導体装置の製造方法
US7199011B2 (en) * 2003-07-16 2007-04-03 Texas Instruments Incorporated Method to reduce transistor gate to source/drain overlap capacitance by incorporation of carbon

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6225168B1 (en) * 1998-06-04 2001-05-01 Advanced Micro Devices, Inc. Semiconductor device having metal gate electrode and titanium or tantalum nitride gate dielectric barrier layer and process of fabrication thereof
US6399469B1 (en) * 2000-07-10 2002-06-04 Advanced Micro Devices, Inc. Fabrication of a notched gate structure for a field effect transistor using a single patterning and etch process

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
A notched metal gate MOSFET for sub-0.1 μm operation. S.Pidin ,M.Mushiga,H.Shido,T.Yamamoto,Y.Sambonsugi,Y.Tamura,and T. Sugii.Electron Devices Meeting, 2000. IEDM Technical Digest. International. 2000
A notched metal gate MOSFET for sub-0.1 μm operation. S.Pidin ,M.Mushiga,H.Shido,T.Yamamoto,Y.Sambonsugi,Y.Tamura,and T. Sugii.Electron Devices Meeting, 2000. IEDM Technical Digest. International. 2000 *

Also Published As

Publication number Publication date
WO2005104225A2 (en) 2005-11-03
US20050215008A1 (en) 2005-09-29
WO2005104225A3 (en) 2006-06-08
JP5025462B2 (ja) 2012-09-12
EP1728274A4 (en) 2008-11-05
CN101091239A (zh) 2007-12-19
JP2007531268A (ja) 2007-11-01
EP1728274A2 (en) 2006-12-06
US7105430B2 (en) 2006-09-12

Similar Documents

Publication Publication Date Title
CN100536094C (zh) 制作具有含凹口的控制电极的半导体器件的方法及其结构
TWI783439B (zh) 半導體裝置及其形成方法
US9659962B2 (en) Semiconductor devices and methods of manufacture thereof
CN102388451B (zh) 形成半导体器件的方法
JP2007208260A (ja) 二重仕事関数金属ゲートスタックを備えるｃｍｏｓ半導体装置
US7396711B2 (en) Method of fabricating a multi-cornered film
CN102446729B (zh) 用湿式化学方法形成受控底切而有优异完整性的高介电系数栅极堆栈
KR20170010706A (ko) 반도체 컴포넌트 및 이의 제조 방법
US12278233B2 (en) Semiconductor device and manufacturing method thereof
JP2009509359A (ja) ミラー容量低下及び駆動電流改善のための単一ゲート上の複数の低及び高ｋゲート酸化物
US7579282B2 (en) Method for removing metal foot during high-k dielectric/metal gate etching
JP2007288096A (ja) 半導体装置及びその製造方法
US8928051B2 (en) Metal oxide semiconductor (MOS) device with locally thickened gate oxide
CN119300455A (zh) 半导体器件及其形成方法
KR101140001B1 (ko) 노칭된 제어 전극을 구비한 반도체 디바이스를 형성하는방법 및 그에 의한 구조
JP2007287793A (ja) 半導体装置の製造方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CP01 Change in the name or title of a patent holder

Address after: Texas in the United States

Patentee after: NXP USA, Inc.

Address before: Texas in the United States

Patentee before: FREESCALE SEMICONDUCTOR, Inc.

CP01 Change in the name or title of a patent holder
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20090902

CF01 Termination of patent right due to non-payment of annual fee