CN100468738C - 具有电容器的半导体设备及其制造方法 - Google Patents

具有电容器的半导体设备及其制造方法 Download PDF

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Publication number
CN100468738C
CN100468738C CNB031478204A CN03147820A CN100468738C CN 100468738 C CN100468738 C CN 100468738C CN B031478204 A CNB031478204 A CN B031478204A CN 03147820 A CN03147820 A CN 03147820A CN 100468738 C CN100468738 C CN 100468738C
Authority
CN
China
Prior art keywords
memory node
bond pad
cup
pad shapes
vertical shaft
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CNB031478204A
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English (en)
Chinese (zh)
Other versions
CN1536669A (zh
Inventor
郑泰荣
李宰求
朴济民
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of CN1536669A publication Critical patent/CN1536669A/zh
Application granted granted Critical
Publication of CN100468738C publication Critical patent/CN100468738C/zh
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes
    • H01L28/82Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/90Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
    • H01L28/91Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • H10B12/033Making the capacitor or connections thereto the capacitor extending over the transistor
    • H10B12/0335Making a connection between the transistor and the capacitor, e.g. plug
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76895Local interconnects; Local pads, as exemplified by patent document EP0896365
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/315DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with the capacitor higher than a bit line

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
CNB031478204A 2003-04-03 2003-06-25 具有电容器的半导体设备及其制造方法 Expired - Lifetime CN100468738C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR20989/2003 2003-04-03
KR10-2003-0020989A KR100522544B1 (ko) 2003-04-03 2003-04-03 캐패시터를 구비하는 반도체 장치 및 그 제조 방법

Publications (2)

Publication Number Publication Date
CN1536669A CN1536669A (zh) 2004-10-13
CN100468738C true CN100468738C (zh) 2009-03-11

Family

ID=29707778

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB031478204A Expired - Lifetime CN100468738C (zh) 2003-04-03 2003-06-25 具有电容器的半导体设备及其制造方法

Country Status (6)

Country Link
JP (1) JP2004311918A (ko)
KR (1) KR100522544B1 (ko)
CN (1) CN100468738C (ko)
DE (1) DE10348200A1 (ko)
GB (1) GB2400236B (ko)
TW (1) TWI291231B (ko)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010034198A (ja) 2008-07-28 2010-02-12 Elpida Memory Inc 半導体装置及びその製造方法
JP5641681B2 (ja) 2008-08-08 2014-12-17 ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. 半導体装置の製造方法
JP2011061067A (ja) 2009-09-11 2011-03-24 Elpida Memory Inc 半導体装置の製造方法及び半導体装置
KR101877878B1 (ko) 2012-06-11 2018-07-13 에스케이하이닉스 주식회사 복층의 스토리지노드를 구비한 반도체장치 및 그 제조 방법
WO2015117222A1 (en) * 2014-02-05 2015-08-13 Conversant Intellectual Property Management Inc. A dram memory device with manufacturable capacitor
CN107845633B (zh) * 2017-10-30 2023-05-12 长鑫存储技术有限公司 存储器及其制造方法
CN107887388B (zh) * 2017-11-27 2023-06-20 长鑫存储技术有限公司 晶体管结构、存储单元、存储器阵列及其制备方法
CN114188282B (zh) * 2020-09-14 2022-10-28 长鑫存储技术有限公司 半导体器件及其制备方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4070919B2 (ja) * 1999-01-22 2008-04-02 富士通株式会社 半導体装置及びその製造方法
KR100331568B1 (ko) * 2000-05-26 2002-04-06 윤종용 반도체 메모리 소자 및 그 제조방법
KR100375221B1 (ko) * 2000-07-10 2003-03-08 삼성전자주식회사 스토리지 노드 형성방법
KR100416601B1 (ko) * 2001-06-30 2004-02-05 삼성전자주식회사 실린더형 커패시터를 포함하는 반도체 소자 및 그 제조 방법
GB2386471B (en) * 2001-12-11 2004-04-07 Samsung Electronics Co Ltd A method for fabricating a one-cylinder stack capacitor

Also Published As

Publication number Publication date
TW200421609A (en) 2004-10-16
JP2004311918A (ja) 2004-11-04
DE10348200A1 (de) 2004-11-04
TWI291231B (en) 2007-12-11
GB0324534D0 (en) 2003-11-26
CN1536669A (zh) 2004-10-13
GB2400236A (en) 2004-10-06
KR100522544B1 (ko) 2005-10-19
GB2400236B (en) 2005-09-14
KR20040086649A (ko) 2004-10-12

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Granted publication date: 20090311