CN100364052C - 晶格调谐半导体衬底的形成 - Google Patents

晶格调谐半导体衬底的形成 Download PDF

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Publication number
CN100364052C
CN100364052C CNB038209543A CN03820954A CN100364052C CN 100364052 C CN100364052 C CN 100364052C CN B038209543 A CNB038209543 A CN B038209543A CN 03820954 A CN03820954 A CN 03820954A CN 100364052 C CN100364052 C CN 100364052C
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sige layer
layer
insulating mechanism
sige
parallel
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Expired - Fee Related
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Chinese (zh)
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CN1714427A (zh
Inventor
亚当·丹尼尔·开普维尔
蒂莫西·约翰·格拉斯彼
埃文·休伯特·克雷斯威尔·帕克
特伦斯·霍尔
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AdvanceSis Ltd
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University of Warwick
AdvanceSis Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02647—Lateral overgrowth
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/933—Germanium or silicon or Ge-Si on III-V

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)
CNB038209543A 2002-09-03 2003-08-12 晶格调谐半导体衬底的形成 Expired - Fee Related CN100364052C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GBGB0220438.6A GB0220438D0 (en) 2002-09-03 2002-09-03 Formation of lattice-turning semiconductor substrates
GB0220438.6 2002-09-03

Publications (2)

Publication Number Publication Date
CN1714427A CN1714427A (zh) 2005-12-28
CN100364052C true CN100364052C (zh) 2008-01-23

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CNB038209543A Expired - Fee Related CN100364052C (zh) 2002-09-03 2003-08-12 晶格调谐半导体衬底的形成

Country Status (8)

Country Link
US (1) US7179727B2 (enExample)
EP (1) EP1540715A1 (enExample)
JP (1) JP2005537672A (enExample)
KR (1) KR20050038037A (enExample)
CN (1) CN100364052C (enExample)
AU (1) AU2003251376A1 (enExample)
GB (1) GB0220438D0 (enExample)
WO (1) WO2004023536A1 (enExample)

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WO2006011107A1 (en) * 2004-07-22 2006-02-02 Koninklijke Philips Electronics N.V. Method of manufacturing a semiconductor device and semiconductor device obtained with such a method
GB2418531A (en) * 2004-09-22 2006-03-29 Univ Warwick Formation of lattice-tuning semiconductor substrates
US9153645B2 (en) 2005-05-17 2015-10-06 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US8324660B2 (en) 2005-05-17 2012-12-04 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
EP1911086A2 (en) 2005-07-26 2008-04-16 Amberwave Systems Corporation Solutions integrated circuit integration of alternative active area materials
US7638842B2 (en) 2005-09-07 2009-12-29 Amberwave Systems Corporation Lattice-mismatched semiconductor structures on insulators
WO2007112066A2 (en) * 2006-03-24 2007-10-04 Amberwave Systems Corporation Lattice-mismatched semiconductor structures and related methods for device fabrication
US7476606B2 (en) * 2006-03-28 2009-01-13 Northrop Grumman Corporation Eutectic bonding of ultrathin semiconductors
EP2062290B1 (en) 2006-09-07 2019-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Defect reduction using aspect ratio trapping
US7875958B2 (en) 2006-09-27 2011-01-25 Taiwan Semiconductor Manufacturing Company, Ltd. Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures
WO2008051503A2 (en) 2006-10-19 2008-05-02 Amberwave Systems Corporation Light-emitter-based devices with lattice-mismatched semiconductor structures
US8237151B2 (en) 2009-01-09 2012-08-07 Taiwan Semiconductor Manufacturing Company, Ltd. Diode-based devices and methods for making the same
US8304805B2 (en) * 2009-01-09 2012-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor diodes fabricated by aspect ratio trapping with coalesced films
US9508890B2 (en) * 2007-04-09 2016-11-29 Taiwan Semiconductor Manufacturing Company, Ltd. Photovoltaics on silicon
US7825328B2 (en) 2007-04-09 2010-11-02 Taiwan Semiconductor Manufacturing Company, Ltd. Nitride-based multi-junction solar cell modules and methods for making the same
US8329541B2 (en) 2007-06-15 2012-12-11 Taiwan Semiconductor Manufacturing Company, Ltd. InP-based transistor fabrication
JP2010538495A (ja) * 2007-09-07 2010-12-09 アンバーウェーブ・システムズ・コーポレーション 多接合太陽電池
KR20100094460A (ko) * 2007-12-28 2010-08-26 스미또모 가가꾸 가부시키가이샤 반도체 기판, 반도체 기판의 제조 방법 및 전자 디바이스
US8183667B2 (en) 2008-06-03 2012-05-22 Taiwan Semiconductor Manufacturing Co., Ltd. Epitaxial growth of crystalline material
US8274097B2 (en) 2008-07-01 2012-09-25 Taiwan Semiconductor Manufacturing Company, Ltd. Reduction of edge effects from aspect ratio trapping
US8981427B2 (en) 2008-07-15 2015-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Polishing of small composite semiconductor materials
CN102160145B (zh) 2008-09-19 2013-08-21 台湾积体电路制造股份有限公司 通过外延层过成长的元件形成
US20100072515A1 (en) * 2008-09-19 2010-03-25 Amberwave Systems Corporation Fabrication and structures of crystalline material
US8253211B2 (en) 2008-09-24 2012-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor sensor structures with reduced dislocation defect densities
KR20110081804A (ko) * 2008-10-02 2011-07-14 스미또모 가가꾸 가부시키가이샤 반도체 디바이스용 기판, 반도체 디바이스 장치, 설계 시스템, 제조 방법 및 설계 방법
CN102379046B (zh) 2009-04-02 2015-06-17 台湾积体电路制造股份有限公司 从晶体材料的非极性平面形成的器件及其制作方法
CN102439696A (zh) 2009-05-22 2012-05-02 住友化学株式会社 半导体基板及其制造方法、电子器件及其制造方法
JP6706414B2 (ja) * 2015-11-27 2020-06-10 国立研究開発法人情報通信研究機構 Ｇｅ単結晶薄膜の製造方法及び光デバイス

Citations (12)

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GB2215514A (en) * 1988-03-04 1989-09-20 Plessey Co Plc Terminating dislocations in semiconductor epitaxial layers
US5108947A (en) * 1989-01-31 1992-04-28 Agfa-Gevaert N.V. Integration of gaas on si substrates
US5158907A (en) * 1990-08-02 1992-10-27 At&T Bell Laboratories Method for making semiconductor devices with low dislocation defects
US5238869A (en) * 1988-07-25 1993-08-24 Texas Instruments Incorporated Method of forming an epitaxial layer on a heterointerface
US5272105A (en) * 1988-02-11 1993-12-21 Gte Laboratories Incorporated Method of manufacturing an heteroepitaxial semiconductor structure
US5410167A (en) * 1992-07-10 1995-04-25 Fujitsu Limited Semiconductor device with reduced side gate effect
US5442205A (en) * 1991-04-24 1995-08-15 At&T Corp. Semiconductor heterostructure devices with strained semiconductor layers
US6039803A (en) * 1996-06-28 2000-03-21 Massachusetts Institute Of Technology Utilization of miscut substrates to improve relaxed graded silicon-germanium and germanium layers on silicon
EP1052684A1 (en) * 1999-05-10 2000-11-15 Toyoda Gosei Co., Ltd. A method for manufacturing group III nitride compound semiconductor and a light-emitting device using group III nitride compound semiconductor
WO2001001465A1 (en) * 1999-06-25 2001-01-04 Massachusetts Institute Of Technology Cyclic thermal anneal for dislocation reduction
CN1336684A (zh) * 2000-08-01 2002-02-20 三菱麻铁里亚尔株式会社 半导体衬底、场效应晶体管、锗化硅层形成方法及其制造方法
CN1364309A (zh) * 2000-03-27 2002-08-14 松下电器产业株式会社 半导体晶片及其制造方法

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JPH04315419A (ja) * 1991-04-12 1992-11-06 Nec Corp 元素半導体基板上の絶縁膜／化合物半導体積層構造
JPH06260427A (ja) * 1993-03-05 1994-09-16 Nec Corp 半導体膜の選択成長方法
EP1036412A1 (en) 1997-09-16 2000-09-20 Massachusetts Institute Of Technology CO-PLANAR Si AND Ge COMPOSITE SUBSTRATE AND METHOD OF PRODUCING SAME
DE19802977A1 (de) 1998-01-27 1999-07-29 Forschungszentrum Juelich Gmbh Verfahren zur Herstellung einer einkristallinen Schicht auf einem nicht gitterangepaßten Substrat, sowie eine oder mehrere solcher Schichten enthaltendes Bauelement
JP4345244B2 (ja) * 2001-05-31 2009-10-14 株式会社Ｓｕｍｃｏ ＳｉＧｅ層の形成方法及びこれを用いた歪みＳｉ層の形成方法と電界効果型トランジスタの製造方法
JP2004055943A (ja) * 2002-07-23 2004-02-19 Matsushita Electric Ind Co Ltd 半導体装置とその製造方法

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5272105A (en) * 1988-02-11 1993-12-21 Gte Laboratories Incorporated Method of manufacturing an heteroepitaxial semiconductor structure
GB2215514A (en) * 1988-03-04 1989-09-20 Plessey Co Plc Terminating dislocations in semiconductor epitaxial layers
US5238869A (en) * 1988-07-25 1993-08-24 Texas Instruments Incorporated Method of forming an epitaxial layer on a heterointerface
US5108947A (en) * 1989-01-31 1992-04-28 Agfa-Gevaert N.V. Integration of gaas on si substrates
US5158907A (en) * 1990-08-02 1992-10-27 At&T Bell Laboratories Method for making semiconductor devices with low dislocation defects
US5442205A (en) * 1991-04-24 1995-08-15 At&T Corp. Semiconductor heterostructure devices with strained semiconductor layers
US5410167A (en) * 1992-07-10 1995-04-25 Fujitsu Limited Semiconductor device with reduced side gate effect
US6039803A (en) * 1996-06-28 2000-03-21 Massachusetts Institute Of Technology Utilization of miscut substrates to improve relaxed graded silicon-germanium and germanium layers on silicon
EP1052684A1 (en) * 1999-05-10 2000-11-15 Toyoda Gosei Co., Ltd. A method for manufacturing group III nitride compound semiconductor and a light-emitting device using group III nitride compound semiconductor
WO2001001465A1 (en) * 1999-06-25 2001-01-04 Massachusetts Institute Of Technology Cyclic thermal anneal for dislocation reduction
CN1364309A (zh) * 2000-03-27 2002-08-14 松下电器产业株式会社 半导体晶片及其制造方法
CN1336684A (zh) * 2000-08-01 2002-02-20 三菱麻铁里亚尔株式会社 半导体衬底、场效应晶体管、锗化硅层形成方法及其制造方法

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Publication number Publication date
JP2005537672A (ja) 2005-12-08
EP1540715A1 (en) 2005-06-15
CN1714427A (zh) 2005-12-28
GB0220438D0 (en) 2002-10-09
US20050245055A1 (en) 2005-11-03
KR20050038037A (ko) 2005-04-25
US7179727B2 (en) 2007-02-20
WO2004023536A1 (en) 2004-03-18
AU2003251376A1 (en) 2004-03-29

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