CH397871A - Verfahren zur Herstellung einer grossflächigen, ebenflächigen gleichrichtenden Sperrschicht gesteuerter Tiefe in einer Halbleiterscheibe - Google Patents

Verfahren zur Herstellung einer grossflächigen, ebenflächigen gleichrichtenden Sperrschicht gesteuerter Tiefe in einer Halbleiterscheibe

Info

Publication number
CH397871A
CH397871A CH1081760A CH1081760A CH397871A CH 397871 A CH397871 A CH 397871A CH 1081760 A CH1081760 A CH 1081760A CH 1081760 A CH1081760 A CH 1081760A CH 397871 A CH397871 A CH 397871A
Authority
CH
Switzerland
Prior art keywords
production
barrier layer
semiconductor wafer
controlled depth
rectifying barrier
Prior art date
Application number
CH1081760A
Other languages
German (de)
English (en)
Inventor
Nelson Herbert
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rca Corp filed Critical Rca Corp
Publication of CH397871A publication Critical patent/CH397871A/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/223—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/24—Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
  • Recrystallisation Techniques (AREA)
CH1081760A 1959-09-29 1960-09-26 Verfahren zur Herstellung einer grossflächigen, ebenflächigen gleichrichtenden Sperrschicht gesteuerter Tiefe in einer Halbleiterscheibe CH397871A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US84318659A 1959-09-29 1959-09-29

Publications (1)

Publication Number Publication Date
CH397871A true CH397871A (de) 1965-08-31

Family

ID=25289283

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1081760A CH397871A (de) 1959-09-29 1960-09-26 Verfahren zur Herstellung einer grossflächigen, ebenflächigen gleichrichtenden Sperrschicht gesteuerter Tiefe in einer Halbleiterscheibe

Country Status (6)

Country Link
CH (1) CH397871A (is")
DE (1) DE1219127B (is")
DK (1) DK119168B (is")
ES (1) ES261334A1 (is")
GB (1) GB952361A (is")
NL (1) NL256342A (is")

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL292671A (is") 1962-05-14
JPS577131A (en) * 1980-06-16 1982-01-14 Junichi Nishizawa Manufacture of p-n junction

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2629672A (en) * 1949-07-07 1953-02-24 Bell Telephone Labor Inc Method of making semiconductive translating devices
USRE24537E (en) * 1952-07-29 1958-09-23 Unsymmetrical conductor arrangements
US2765245A (en) * 1952-08-22 1956-10-02 Gen Electric Method of making p-n junction semiconductor units
US2821493A (en) * 1954-03-18 1958-01-28 Hughes Aircraft Co Fused junction transistors with regrown base regions
GB864771A (en) * 1956-11-23 1961-04-06 Pye Ltd Improvements in or relating to junction transistors
DE1062823B (de) * 1957-07-13 1959-08-06 Telefunken Gmbh Verfahren zur Herstellung von Kristalloden des Legierungstyps
NL243304A (is") 1959-09-12 1900-01-01

Also Published As

Publication number Publication date
ES261334A1 (es) 1961-03-16
NL256342A (is")
GB952361A (en) 1964-03-18
DE1219127B (de) 1966-06-16
DK119168B (da) 1970-11-23

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