CA946524A - Electrically alterable floating gate device and method for altering same - Google Patents
Electrically alterable floating gate device and method for altering sameInfo
- Publication number
- CA946524A CA946524A CA132,413A CA132413A CA946524A CA 946524 A CA946524 A CA 946524A CA 132413 A CA132413 A CA 132413A CA 946524 A CA946524 A CA 946524A
- Authority
- CA
- Canada
- Prior art keywords
- floating gate
- gate device
- electrically alterable
- altering
- same
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
- H01L29/7884—Programmable transistors with only two possible levels of programmation charging by hot carrier injection
- H01L29/7886—Hot carrier produced by avalanche breakdown of a PN junction, e.g. FAMOS
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0416—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Non-Volatile Memory (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10664371A | 1971-01-15 | 1971-01-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA946524A true CA946524A (en) | 1974-04-30 |
Family
ID=22312502
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA132,413A Expired CA946524A (en) | 1971-01-15 | 1972-01-14 | Electrically alterable floating gate device and method for altering same |
Country Status (8)
| Country | Link |
|---|---|
| JP (1) | JPS5146382B1 (fr) |
| BE (1) | BE777996A (fr) |
| CA (1) | CA946524A (fr) |
| DE (1) | DE2201028C3 (fr) |
| FR (1) | FR2121824B1 (fr) |
| GB (1) | GB1383981A (fr) |
| IT (1) | IT962050B (fr) |
| NL (1) | NL7200562A (fr) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3797000A (en) * | 1972-12-29 | 1974-03-12 | Ibm | Non-volatile semiconductor storage device utilizing avalanche injection and extraction of stored information |
| US3836992A (en) * | 1973-03-16 | 1974-09-17 | Ibm | Electrically erasable floating gate fet memory cell |
| JPS5613029B2 (fr) * | 1973-09-21 | 1981-03-25 | ||
| DE2812049C2 (de) * | 1974-09-20 | 1982-05-27 | Siemens AG, 1000 Berlin und 8000 München | n-Kanal-Speicher-FET |
| DE2638730C2 (de) * | 1974-09-20 | 1982-10-28 | Siemens AG, 1000 Berlin und 8000 München | n-Kanal-Speicher-FET, Verfahren zum Entladen des Speichergate des n-Kanal-Speicher-FET und Verwendung des n-Kanal-Speicher-FET |
| DE2643987C2 (de) * | 1974-09-20 | 1984-03-29 | Siemens AG, 1000 Berlin und 8000 München | n-Kanal-Speicher-FET |
| DE2445079C3 (de) * | 1974-09-20 | 1981-06-04 | Siemens AG, 1000 Berlin und 8000 München | Speicher-Feldeffekttransistor |
| DE2525062C2 (de) | 1975-06-05 | 1983-02-17 | Siemens AG, 1000 Berlin und 8000 München | Matrixanordnung aus n-Kanal-Speicher-FET |
| DE2505816C3 (de) * | 1974-09-20 | 1982-04-22 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum Betrieb eines n-Kanal-Speicher-FET, n-Kanal-Speicher-FET zur Ausübung des Verfahrens und Anwendung des Verfahrens auf die n-Kanal-Speicher-FETs einer Speichermatrix |
| DE2513207C2 (de) * | 1974-09-20 | 1982-07-01 | Siemens AG, 1000 Berlin und 8000 München | n-Kanal-Speicher-FET |
| DE2560220C2 (de) * | 1975-03-25 | 1982-11-25 | Siemens AG, 1000 Berlin und 8000 München | n-Kanal-Speicher-FET |
| JPS5554415A (en) * | 1978-10-16 | 1980-04-21 | Nippon Gakki Seizo Kk | Method and device for space set averaging for reverberation waveform |
| DE2845328C2 (de) * | 1978-10-18 | 1986-04-30 | Deutsche Itt Industries Gmbh, 7800 Freiburg | Speichertransistor |
| JPS6162824A (ja) * | 1985-06-22 | 1986-03-31 | Nippon Gakki Seizo Kk | 残響デ−タ圧縮取込方法およびその装置 |
| WO2001024268A1 (fr) * | 1999-09-24 | 2001-04-05 | Intel Corporation | Dispositif a memoire remanente avec grille flottante hautement fonctionnelle et son procede de fabrication |
| US6518618B1 (en) | 1999-12-03 | 2003-02-11 | Intel Corporation | Integrated memory cell and method of fabrication |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3500142A (en) * | 1967-06-05 | 1970-03-10 | Bell Telephone Labor Inc | Field effect semiconductor apparatus with memory involving entrapment of charge carriers |
| CA813537A (en) * | 1967-10-17 | 1969-05-20 | Joseph H. Scott, Jr. | Semiconductor memory device |
-
1972
- 1972-01-11 DE DE19722201028 patent/DE2201028C3/de not_active Expired
- 1972-01-13 BE BE777996A patent/BE777996A/fr unknown
- 1972-01-13 FR FR7201101A patent/FR2121824B1/fr not_active Expired
- 1972-01-14 CA CA132,413A patent/CA946524A/en not_active Expired
- 1972-01-14 IT IT1937872A patent/IT962050B/it active
- 1972-01-14 GB GB196072A patent/GB1383981A/en not_active Expired
- 1972-01-14 NL NL7200562A patent/NL7200562A/xx not_active Application Discontinuation
- 1972-01-17 JP JP626172A patent/JPS5146382B1/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| FR2121824A1 (fr) | 1972-08-25 |
| DE2201028A1 (de) | 1972-08-31 |
| DE2201028C3 (de) | 1981-07-09 |
| IT962050B (it) | 1973-12-20 |
| GB1383981A (en) | 1974-02-12 |
| NL7200562A (fr) | 1972-07-18 |
| JPS5146382B1 (fr) | 1976-12-08 |
| FR2121824B1 (fr) | 1977-04-01 |
| BE777996A (fr) | 1972-05-02 |
| DE2201028B2 (de) | 1979-01-18 |
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