CA1106980A - Circuit integre cellulaire et methode hierarchique - Google Patents

Circuit integre cellulaire et methode hierarchique

Info

Publication number
CA1106980A
CA1106980A CA304,470A CA304470A CA1106980A CA 1106980 A CA1106980 A CA 1106980A CA 304470 A CA304470 A CA 304470A CA 1106980 A CA1106980 A CA 1106980A
Authority
CA
Canada
Prior art keywords
basic
basic cells
grid
cells
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA304,470A
Other languages
English (en)
Inventor
Hisashige Ando
Hung C. Lai
John J. Zasio
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of CA1106980A publication Critical patent/CA1106980A/fr
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118—Masterslice integrated circuits
    • H01L27/11803—Masterslice integrated circuits using field effect technology
    • H01L27/11807—CMOS gate arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Geometry (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
CA304,470A 1977-05-31 1978-05-31 Circuit integre cellulaire et methode hierarchique Expired CA1106980A (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US80190777A 1977-05-31 1977-05-31
US801,907 1977-05-31
US84747877A 1977-11-01 1977-11-01
US847,478 1977-11-01

Publications (1)

Publication Number Publication Date
CA1106980A true CA1106980A (fr) 1981-08-11

Family

ID=27122394

Family Applications (1)

Application Number Title Priority Date Filing Date
CA304,470A Expired CA1106980A (fr) 1977-05-31 1978-05-31 Circuit integre cellulaire et methode hierarchique

Country Status (6)

Country Link
JP (1) JPS54116186A (fr)
CA (1) CA1106980A (fr)
DE (1) DE2823555A1 (fr)
FR (1) FR2393427A1 (fr)
GB (1) GB1604550A (fr)
NL (1) NL185431C (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4737836A (en) * 1983-12-30 1988-04-12 International Business Machines Corporation VLSI integrated circuit having parallel bonding areas

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4295149A (en) * 1978-12-29 1981-10-13 International Business Machines Corporation Master image chip organization technique or method
FR2495834A1 (fr) * 1980-12-05 1982-06-11 Cii Honeywell Bull Dispositif a circuits integres de haute densite
US4377849A (en) * 1980-12-29 1983-03-22 International Business Machines Corporation Macro assembler process for automated circuit design
JPS5832445A (ja) * 1981-08-20 1983-02-25 Nec Corp 集積回路装置及びその製造方法
JPS5857749A (ja) * 1981-10-01 1983-04-06 Seiko Epson Corp 半導体装置
JPS5890758A (ja) * 1981-11-25 1983-05-30 Mitsubishi Electric Corp 相補形集積回路装置
JPS58111347A (ja) * 1981-12-24 1983-07-02 Matsushita Electric Ind Co Ltd 半導体装置
JPH0669142B2 (ja) * 1983-04-15 1994-08-31 株式会社日立製作所 半導体集積回路装置
JPH0758761B2 (ja) * 1983-12-30 1995-06-21 インターナショナル・ビジネス・マシーンズ・コーポレーション 半導体集積回路チップ
KR910005605B1 (en) * 1987-06-08 1991-07-31 Fujitsu Ltd Master-slice type semiconductor device imbeded multi gate
JP5552775B2 (ja) 2009-08-28 2014-07-16 ソニー株式会社 半導体集積回路
JP7004038B2 (ja) * 2020-07-28 2022-01-21 ソニーグループ株式会社 半導体集積回路

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3983619A (en) * 1968-01-26 1976-10-05 Hitachi, Ltd. Large scale integrated circuit array of unit cells and method of manufacturing same
JPS492796B1 (fr) * 1969-02-28 1974-01-22
NL176029C (nl) * 1973-02-01 1985-02-01 Philips Nv Geintegreerde logische schakeling met komplementaire transistoren.
GB1440512A (en) * 1973-04-30 1976-06-23 Rca Corp Universal array using complementary transistors
JPS50134385A (fr) * 1974-04-09 1975-10-24
JPS5314469B2 (fr) * 1974-05-17 1978-05-17
US3999214A (en) * 1974-06-26 1976-12-21 Ibm Corporation Wireable planar integrated circuit chip structure
CA1024661A (fr) * 1974-06-26 1978-01-17 International Business Machines Corporation Arrangement cablable de pastilles sur circuit integre planaire
JPS5816176Y2 (ja) * 1976-07-16 1983-04-01 三洋電機株式会社 大規模集積回路装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4737836A (en) * 1983-12-30 1988-04-12 International Business Machines Corporation VLSI integrated circuit having parallel bonding areas

Also Published As

Publication number Publication date
JPH0113222B2 (fr) 1989-03-03
FR2393427A1 (fr) 1978-12-29
NL7805833A (nl) 1978-12-04
FR2393427B1 (fr) 1983-09-09
GB1604550A (en) 1981-12-09
DE2823555A1 (de) 1978-12-07
NL185431C (nl) 1990-04-02
NL185431B (nl) 1989-11-01
JPS54116186A (en) 1979-09-10

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