BR9907083A - Dispositivo deintercalação/desintercalação e método para sistema de comunicação - Google Patents

Dispositivo deintercalação/desintercalação e método para sistema de comunicação

Info

Publication number
BR9907083A
BR9907083A BR9907083-9A BR9907083A BR9907083A BR 9907083 A BR9907083 A BR 9907083A BR 9907083 A BR9907083 A BR 9907083A BR 9907083 A BR9907083 A BR 9907083A
Authority
BR
Brazil
Prior art keywords
deinterleaving
address
communication system
bro
reading
Prior art date
Application number
BR9907083-9A
Other languages
English (en)
Other versions
BR9907083B1 (pt
Inventor
Min-Goo Kim
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of BR9907083A publication Critical patent/BR9907083A/pt
Publication of BR9907083B1 publication Critical patent/BR9907083B1/pt

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2789—Interleaver providing variable interleaving, e.g. variable block sizes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/275—Interleaver wherein the permutation pattern is obtained using a congruential operation of the type y=ax+b modulo c
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/276—Interleaving address generation
    • H03M13/2764—Circuits therefore

Abstract

<B>DISPOSITIVO DE INTERCALAçãO/DESINTERCALAçãO E MéTODO PARA SISTEMA DE COMUNICAçãO<D> Um dispositivo para armazenar seq³encialmente símbolos de bits de entrada de um dado tamanho de intercalador N em uma memória em um endereço de 1 a N a ler os símbolos de bits armazenados da memória. O dispositivo compreende uma tabela de consulta para fornecer uma primeira variável m e uma segunda J satisfazendo a equação N=2^ m^xJ; e um gerador de endereço para gerar um endereço de leitura dependendo das primeira e segunda variáveis m e J fornecidas da tabela de consulta. O endereço de leitura é determinado por 2^ m^(K mod J) + BRO(K/J), onde K (0<243>K<243>(N-1)), denota uma seq³ência de leitura e BRO é uma função para converter um valor binário em um valor decimal por inversão de bits.
BRPI9907083-9B1A 1998-12-10 1999-12-10 dispositivo de intercalaÇço/desintercalaÇço e mÉtodo para sistema de comunicaÇço BR9907083B1 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1019980054131A KR100306282B1 (ko) 1998-12-10 1998-12-10 통신시스템의인터리빙/디인터리빙장치및방법
PCT/KR1999/000759 WO2000035102A1 (en) 1998-12-10 1999-12-10 Interleaving / deinterleaving device and method for communication system

Publications (2)

Publication Number Publication Date
BR9907083A true BR9907083A (pt) 2000-10-17
BR9907083B1 BR9907083B1 (pt) 2013-09-17

Family

ID=36129280

Family Applications (2)

Application Number Title Priority Date Filing Date
BRPI9907083-9B1A BR9907083B1 (pt) 1998-12-10 1999-12-10 dispositivo de intercalaÇço/desintercalaÇço e mÉtodo para sistema de comunicaÇço
BRPI9917623-8A BR9917623B1 (pt) 1998-12-10 1999-12-10 Dispositivo de intercalação/desintercalação e método para sistema de comunicação

Family Applications After (1)

Application Number Title Priority Date Filing Date
BRPI9917623-8A BR9917623B1 (pt) 1998-12-10 1999-12-10 Dispositivo de intercalação/desintercalação e método para sistema de comunicação

Country Status (11)

Country Link
US (3) US6668350B1 (pt)
EP (3) EP1492240B1 (pt)
JP (3) JP3612023B2 (pt)
KR (1) KR100306282B1 (pt)
CN (1) CN1122371C (pt)
AU (1) AU736189B2 (pt)
BR (2) BR9907083B1 (pt)
CA (1) CA2315648A1 (pt)
DE (4) DE69923723T2 (pt)
RU (1) RU2216099C2 (pt)
WO (1) WO2000035102A1 (pt)

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Also Published As

Publication number Publication date
KR100306282B1 (ko) 2001-11-02
JP2004088789A (ja) 2004-03-18
AU736189B2 (en) 2001-07-26
JP2004080802A (ja) 2004-03-11
CN1287718A (zh) 2001-03-14
EP1376880A1 (en) 2004-01-02
US20040139382A1 (en) 2004-07-15
AU1693100A (en) 2000-06-26
BR9907083B1 (pt) 2013-09-17
DE69930021T2 (de) 2006-08-10
DE69923723T2 (de) 2005-07-14
EP1492240B1 (en) 2006-03-01
DE29924366U1 (de) 2002-12-19
EP1492240A1 (en) 2004-12-29
US20050071729A1 (en) 2005-03-31
KR20000038953A (ko) 2000-07-05
JP3612023B2 (ja) 2005-01-19
WO2000035102A1 (en) 2000-06-15
EP1062733A1 (en) 2000-12-27
DE69930021D1 (de) 2006-04-27
CA2315648A1 (en) 2000-06-15
EP1062733B1 (en) 2003-09-03
DE69910989T2 (de) 2004-05-19
DE69910989D1 (de) 2003-10-09
DE69923723D1 (de) 2005-03-17
EP1376880B1 (en) 2005-02-09
JP3730241B2 (ja) 2005-12-21
RU2216099C2 (ru) 2003-11-10
US7302620B2 (en) 2007-11-27
US6668350B1 (en) 2003-12-23
BR9917623B1 (pt) 2014-09-09
CN1122371C (zh) 2003-09-24
JP2002532940A (ja) 2002-10-02

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B09A Decision: intention to grant [chapter 9.1 patent gazette]
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Free format text: EM VIRTUDE DA EXTINCAO PUBLICADA NA RPI 2648 DE 05-10-2021 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDA A EXTINCAO DA PATENTE E SEUS CERTIFICADOS, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013.