CA2445715A1 - Interleaving/deinterleaving device and method for communication system - Google Patents

Interleaving/deinterleaving device and method for communication system Download PDF

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Publication number
CA2445715A1
CA2445715A1 CA002445715A CA2445715A CA2445715A1 CA 2445715 A1 CA2445715 A1 CA 2445715A1 CA 002445715 A CA002445715 A CA 002445715A CA 2445715 A CA2445715 A CA 2445715A CA 2445715 A1 CA2445715 A1 CA 2445715A1
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Canada
Prior art keywords
interleaving
address
communication system
bro
quotient
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002445715A
Other languages
French (fr)
Other versions
CA2445715C (en
Inventor
Min-Goo Kim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co., Ltd.
Min-Goo Kim
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1019980054131A external-priority patent/KR100306282B1/en
Application filed by Samsung Electronics Co., Ltd., Min-Goo Kim filed Critical Samsung Electronics Co., Ltd.
Publication of CA2445715A1 publication Critical patent/CA2445715A1/en
Application granted granted Critical
Publication of CA2445715C publication Critical patent/CA2445715C/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

A device for sequentially storing input bit symbols of a given interleaver size N in a memory at an address from 0 to N-1 and reading the stored bit symbols from the memory. The device comprises a look-up table for providing a first variable m and a second variable J satisfying the equation N=2m×J; and an address generator for generating a read address depending on the first and second variables m and J provided from the look-up table. The read address is determined by 2m(K mod J)+ BRO m(K/J), where K(0<=K<=(N-1)) denotes a reading sequence, BRO m(y) is the bit-reversed m-bit value of y and / is a function in which a quotient of K divided by J is obtained, the quotient being an integer.
CA002445715A 1998-12-10 1999-12-10 Interleaving/deinterleaving device and method for communication system Expired - Lifetime CA2445715C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
KR54131/1998 1998-12-10
KR1019980054131A KR100306282B1 (en) 1998-12-10 1998-12-10 Apparatus and for interleaving and deinterleaving frame date in communication system
CA002315648A CA2315648A1 (en) 1998-12-10 1999-12-10 Interleaving / deinterleaving device and method for communication system

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
CA002315648A Division CA2315648A1 (en) 1998-12-10 1999-12-10 Interleaving / deinterleaving device and method for communication system

Publications (2)

Publication Number Publication Date
CA2445715A1 true CA2445715A1 (en) 2000-06-15
CA2445715C CA2445715C (en) 2007-06-05

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ID=30001266

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002445715A Expired - Lifetime CA2445715C (en) 1998-12-10 1999-12-10 Interleaving/deinterleaving device and method for communication system

Country Status (1)

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CA (1) CA2445715C (en)

Also Published As

Publication number Publication date
CA2445715C (en) 2007-06-05

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