BR9812817A - Amplificador de detecção para memórias-flash - Google Patents
Amplificador de detecção para memórias-flashInfo
- Publication number
- BR9812817A BR9812817A BR9812817-5A BR9812817A BR9812817A BR 9812817 A BR9812817 A BR 9812817A BR 9812817 A BR9812817 A BR 9812817A BR 9812817 A BR9812817 A BR 9812817A
- Authority
- BR
- Brazil
- Prior art keywords
- amplifier
- differential input
- coupled
- output
- detection amplifier
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
- G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5642—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
- G11C7/062—Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
- G11C7/065—Differential amplifiers of latching type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/564—Miscellaneous aspects
- G11C2211/5642—Multilevel memory with buffers, latches, registers at input or output
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
- Amplifiers (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/931,247 US5973957A (en) | 1997-09-16 | 1997-09-16 | Sense amplifier comprising a preamplifier and a differential input latch for flash memories |
| PCT/US1998/014797 WO1999014758A1 (en) | 1997-09-16 | 1998-07-17 | Sense amplifier for flash memories |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| BR9812817A true BR9812817A (pt) | 2001-12-18 |
Family
ID=25460470
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BR9812817-5A BR9812817A (pt) | 1997-09-16 | 1998-07-17 | Amplificador de detecção para memórias-flash |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US5973957A (enExample) |
| EP (1) | EP1023731B1 (enExample) |
| JP (1) | JP2001516932A (enExample) |
| KR (1) | KR100382693B1 (enExample) |
| AU (1) | AU8409898A (enExample) |
| BR (1) | BR9812817A (enExample) |
| DE (1) | DE69835896T2 (enExample) |
| TW (1) | TW422989B (enExample) |
| WO (1) | WO1999014758A1 (enExample) |
Families Citing this family (37)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA2217359C (en) * | 1997-09-30 | 2005-04-12 | Mosaid Technologies Incorporated | Method for multilevel dram sensing |
| IT1302433B1 (it) * | 1998-08-13 | 2000-09-05 | Texas Instruments Italia Spa | Circuito di lettura per dispositivi di memoria flash con perfezionatimargini di programmazione e procedimento di funzionamento |
| US6297990B1 (en) * | 1998-09-29 | 2001-10-02 | Texas Instruments Incorporated | Balanced reference sensing circuit |
| FR2786910B1 (fr) * | 1998-12-04 | 2002-11-29 | St Microelectronics Sa | Memoire a grille flottante multiniveau |
| US6232801B1 (en) | 1999-08-04 | 2001-05-15 | Vlsi Technology, Inc. | Comparators and comparison methods |
| US6188606B1 (en) | 1999-08-06 | 2001-02-13 | Advanced Micro Devices, Inc. | Multi state sensing of NAND memory cells by varying source bias |
| US6108258A (en) * | 1999-08-19 | 2000-08-22 | United Integrated Circuits Corp. | Sense amplifier for high-speed integrated circuit memory device |
| US6141244A (en) * | 1999-09-02 | 2000-10-31 | Advanced Micro Devices, Inc. | Multi level sensing of NAND memory cells by external bias current |
| US6191620B1 (en) * | 1999-11-04 | 2001-02-20 | International Business Machines Corporation | Sense amplifier/comparator circuit and data comparison method |
| US7082056B2 (en) * | 2004-03-12 | 2006-07-25 | Super Talent Electronics, Inc. | Flash memory device and architecture with multi level cells |
| US6392448B1 (en) | 2000-02-03 | 2002-05-21 | Teradyne, Inc. | Common-mode detection circuit with cross-coupled compensation |
| US6300804B1 (en) | 2000-02-09 | 2001-10-09 | Teradyne, Inc. | Differential comparator with dispersion reduction circuitry |
| US6396733B1 (en) * | 2000-07-17 | 2002-05-28 | Micron Technology, Inc. | Magneto-resistive memory having sense amplifier with offset control |
| US6538921B2 (en) | 2000-08-17 | 2003-03-25 | Nve Corporation | Circuit selection of magnetic memory cells and related cell structures |
| US6515906B2 (en) * | 2000-12-28 | 2003-02-04 | Intel Corporation | Method and apparatus for matched-reference sensing architecture for non-volatile memories |
| US6744086B2 (en) | 2001-05-15 | 2004-06-01 | Nve Corporation | Current switched magnetoresistive memory cell |
| US6518798B2 (en) * | 2001-06-07 | 2003-02-11 | Atmel Corporation | Sense amplifier with improved latching |
| US7348206B2 (en) * | 2001-10-26 | 2008-03-25 | The Regents Of The University Of California | Formation of self-assembled monolayers of redox SAMs on silicon for molecular memory applications |
| KR100455441B1 (ko) * | 2001-12-29 | 2004-11-06 | 주식회사 하이닉스반도체 | 멀티레벨 플래쉬 메모리 셀 센싱 회로 |
| US6747893B2 (en) | 2002-03-14 | 2004-06-08 | Intel Corporation | Storing data in non-volatile memory devices |
| US6535443B1 (en) * | 2002-06-13 | 2003-03-18 | Dmel Incorporated | Reduction of standby current |
| US7023735B2 (en) * | 2003-06-17 | 2006-04-04 | Ramot At Tel-Aviv University Ltd. | Methods of increasing the reliability of a flash memory |
| JP2005092923A (ja) * | 2003-09-12 | 2005-04-07 | Renesas Technology Corp | 半導体記憶装置 |
| KR100621632B1 (ko) * | 2005-03-22 | 2006-09-19 | 삼성전자주식회사 | 시리얼 센싱 동작을 수행하는 노어 플래시 메모리 장치 |
| US7466613B2 (en) * | 2005-04-15 | 2008-12-16 | Atmel Corporation | Sense amplifier for flash memory device |
| US7272041B2 (en) * | 2005-06-30 | 2007-09-18 | Intel Corporation | Memory array with pseudo single bit memory cell and method |
| US20070024325A1 (en) * | 2005-08-01 | 2007-02-01 | Chung-Kuang Chen | Sense amplifier with input offset compensation |
| DE102006020485B4 (de) * | 2006-04-28 | 2019-07-04 | Atmel Corp. | Operationsverstärker |
| US7688648B2 (en) * | 2008-09-02 | 2010-03-30 | Juhan Kim | High speed flash memory |
| US7542348B1 (en) | 2007-12-19 | 2009-06-02 | Juhan Kim | NOR flash memory including bipolar segment read circuit |
| KR101057725B1 (ko) * | 2008-12-31 | 2011-08-18 | 주식회사 하이닉스반도체 | 멀티 레벨 셀 데이터 센싱 장치 및 그 방법 |
| US8363475B2 (en) | 2010-03-30 | 2013-01-29 | Ememory Technology Inc. | Non-volatile memory unit cell with improved sensing margin and reliability |
| US8509003B2 (en) * | 2011-09-20 | 2013-08-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Read architecture for MRAM |
| US9478297B2 (en) | 2014-01-31 | 2016-10-25 | Taiwan Semiconductor Manufacturing Company Limited | Multiple-time programmable memory |
| US9728278B2 (en) | 2014-10-24 | 2017-08-08 | Micron Technology, Inc. | Threshold voltage margin analysis |
| JP2018125796A (ja) | 2017-02-03 | 2018-08-09 | 富士通株式会社 | Ｐａｍ受信回路及び受信装置 |
| CN116524975B (zh) * | 2023-07-03 | 2023-09-15 | 芯天下技术股份有限公司 | 一种用于存储芯片的快速读取电路、存储芯片及电子设备 |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3753235A (en) * | 1971-08-18 | 1973-08-14 | Ibm | Monolithic memory module redundancy scheme using prewired substrates |
| JPS51113545A (en) * | 1975-03-31 | 1976-10-06 | Hitachi Ltd | Memory |
| US5587952A (en) * | 1984-12-17 | 1996-12-24 | Hitachi, Ltd. | Dynamic random access memory including read preamplifiers activated before rewrite amplifiers |
| US4933907A (en) * | 1987-12-03 | 1990-06-12 | Mitsubishi Denki Kabushiki Kaisha | Dynamic random access memory device and operating method therefor |
| US5268870A (en) * | 1988-06-08 | 1993-12-07 | Eliyahou Harari | Flash EEPROM system and intelligent programming and erasing methods therefor |
| US5325335A (en) * | 1991-05-30 | 1994-06-28 | Integrated Device Technology, Inc. | Memories and amplifiers suitable for low voltage power supplies |
| US5550772A (en) * | 1995-02-13 | 1996-08-27 | National Semiconductor Corporation | Memory array utilizing multi-state memory cells |
| JP2689948B2 (ja) * | 1995-04-28 | 1997-12-10 | 日本電気株式会社 | 多値メモリセルを有する半導体記憶装置 |
| TW326535B (en) * | 1995-08-08 | 1998-02-11 | Hitachi Ltd | Semiconductor memory device and read-out circuit |
| US5640356A (en) * | 1995-12-29 | 1997-06-17 | Cypress Semiconductor Corp. | Two-stage differential sense amplifier with positive feedback in the first and second stages |
| US5668766A (en) * | 1996-05-16 | 1997-09-16 | Intel Corporation | Method and apparatus for increasing memory read access speed using double-sensing |
-
1997
- 1997-09-16 US US08/931,247 patent/US5973957A/en not_active Expired - Lifetime
-
1998
- 1998-07-17 KR KR10-2000-7002791A patent/KR100382693B1/ko not_active Expired - Fee Related
- 1998-07-17 JP JP2000512209A patent/JP2001516932A/ja active Pending
- 1998-07-17 AU AU84098/98A patent/AU8409898A/en not_active Abandoned
- 1998-07-17 WO PCT/US1998/014797 patent/WO1999014758A1/en not_active Ceased
- 1998-07-17 BR BR9812817-5A patent/BR9812817A/pt not_active Application Discontinuation
- 1998-07-17 DE DE69835896T patent/DE69835896T2/de not_active Expired - Fee Related
- 1998-07-17 EP EP98934611A patent/EP1023731B1/en not_active Expired - Lifetime
- 1998-07-23 TW TW087112050A patent/TW422989B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR100382693B1 (ko) | 2003-05-09 |
| JP2001516932A (ja) | 2001-10-02 |
| AU8409898A (en) | 1999-04-05 |
| EP1023731A4 (en) | 2001-04-11 |
| DE69835896T2 (de) | 2007-04-26 |
| EP1023731B1 (en) | 2006-09-13 |
| US5973957A (en) | 1999-10-26 |
| TW422989B (en) | 2001-02-21 |
| WO1999014758A1 (en) | 1999-03-25 |
| EP1023731A1 (en) | 2000-08-02 |
| HK1028131A1 (en) | 2001-02-02 |
| KR20010024053A (ko) | 2001-03-26 |
| DE69835896D1 (de) | 2006-10-26 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| B06A | Patent application procedure suspended [chapter 6.1 patent gazette] | ||
| B11B | Dismissal acc. art. 36, par 1 of ipl - no reply within 90 days to fullfil the necessary requirements |